1 /******************************************************************************* 2 3 Copyright (c) 2001-2005, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 *******************************************************************************/ 33 34 /* $OpenBSD: ixgb_ee.c,v 1.7 2015/11/24 17:11:40 mpi Exp $ */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/sockio.h> 39 #include <sys/mbuf.h> 40 #include <sys/malloc.h> 41 #include <sys/kernel.h> 42 #include <sys/device.h> 43 #include <sys/socket.h> 44 45 #include <net/if.h> 46 #include <net/if_media.h> 47 48 #include <netinet/in.h> 49 #include <netinet/if_ether.h> 50 51 #include <uvm/uvm_extern.h> 52 53 #include <dev/pci/pcireg.h> 54 #include <dev/pci/pcivar.h> 55 56 #include <dev/pci/ixgb_hw.h> 57 #include <dev/pci/ixgb_ee.h> 58 59 /* Local prototypes */ 60 static uint16_t ixgb_shift_in_bits(struct ixgb_hw *hw); 61 62 static void ixgb_shift_out_bits(struct ixgb_hw *hw, uint16_t data, 63 uint16_t count); 64 static void ixgb_standby_eeprom(struct ixgb_hw *hw); 65 66 static boolean_t ixgb_wait_eeprom_command(struct ixgb_hw *hw); 67 68 static void ixgb_cleanup_eeprom(struct ixgb_hw *hw); 69 70 /****************************************************************************** 71 * Raises the EEPROM's clock input. 72 * 73 * hw - Struct containing variables accessed by shared code 74 * eecd_reg - EECD's current value 75 *****************************************************************************/ 76 static void 77 ixgb_raise_clock(struct ixgb_hw *hw, uint32_t *eecd_reg) 78 { 79 /* Raise the clock input to the EEPROM (by setting the SK bit), and 80 * then wait 50 microseconds. */ 81 *eecd_reg = *eecd_reg | IXGB_EECD_SK; 82 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 83 usec_delay(50); 84 return; 85 } 86 87 /****************************************************************************** 88 * Lowers the EEPROM's clock input. 89 * 90 * hw - Struct containing variables accessed by shared code 91 * eecd_reg - EECD's current value 92 *****************************************************************************/ 93 static void 94 ixgb_lower_clock(struct ixgb_hw *hw, uint32_t *eecd_reg) 95 { 96 /* Lower the clock input to the EEPROM (by clearing the SK bit), and 97 * then wait 50 microseconds. */ 98 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK; 99 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 100 usec_delay(50); 101 return; 102 } 103 104 /****************************************************************************** 105 * Shift data bits out to the EEPROM. 106 * 107 * hw - Struct containing variables accessed by shared code 108 * data - data to send to the EEPROM 109 * count - number of bits to shift out 110 *****************************************************************************/ 111 static void 112 ixgb_shift_out_bits(struct ixgb_hw *hw, uint16_t data, uint16_t count) 113 { 114 uint32_t eecd_reg; 115 uint32_t mask; 116 117 /* We need to shift "count" bits out to the EEPROM. So, value in the 118 * "data" parameter will be shifted out to the EEPROM one bit at a 119 * time. In order to do this, "data" must be broken down into bits. */ 120 mask = 0x01 << (count - 1); 121 eecd_reg = IXGB_READ_REG(hw, EECD); 122 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI); 123 do { 124 /* A "1" is shifted out to the EEPROM by setting bit "DI" to a 125 * "1", and then raising and then lowering the clock (the SK 126 * bit controls the clock input to the EEPROM). A "0" is 127 * shifted out to the EEPROM by setting "DI" to "0" and then 128 * raising and then lowering the clock. */ 129 eecd_reg &= ~IXGB_EECD_DI; 130 131 if(data & mask) 132 eecd_reg |= IXGB_EECD_DI; 133 134 IXGB_WRITE_REG(hw, EECD, eecd_reg); 135 136 usec_delay(50); 137 138 ixgb_raise_clock(hw, &eecd_reg); 139 ixgb_lower_clock(hw, &eecd_reg); 140 141 mask = mask >> 1; 142 143 } while(mask); 144 145 /* We leave the "DI" bit set to "0" when we leave this routine. */ 146 eecd_reg &= ~IXGB_EECD_DI; 147 IXGB_WRITE_REG(hw, EECD, eecd_reg); 148 return; 149 } 150 151 /****************************************************************************** 152 * Shift data bits in from the EEPROM 153 * 154 * hw - Struct containing variables accessed by shared code 155 *****************************************************************************/ 156 static uint16_t 157 ixgb_shift_in_bits(struct ixgb_hw *hw) 158 { 159 uint32_t eecd_reg; 160 uint32_t i; 161 uint16_t data; 162 163 /* In order to read a register from the EEPROM, we need to shift 16 164 * bits in from the EEPROM. Bits are "shifted in" by raising the clock 165 * input to the EEPROM (setting the SK bit), and then reading the value 166 * of the "DO" bit. During this "shifting in" process the "DI" bit 167 * should always be clear.. */ 168 169 eecd_reg = IXGB_READ_REG(hw, EECD); 170 171 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI); 172 data = 0; 173 174 for(i = 0; i < 16; i++) { 175 data = data << 1; 176 ixgb_raise_clock(hw, &eecd_reg); 177 178 eecd_reg = IXGB_READ_REG(hw, EECD); 179 180 eecd_reg &= ~(IXGB_EECD_DI); 181 if(eecd_reg & IXGB_EECD_DO) 182 data |= 1; 183 184 ixgb_lower_clock(hw, &eecd_reg); 185 } 186 187 return data; 188 } 189 190 /****************************************************************************** 191 * Prepares EEPROM for access 192 * 193 * hw - Struct containing variables accessed by shared code 194 * 195 * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This 196 * function should be called before issuing a command to the EEPROM. 197 *****************************************************************************/ 198 static void 199 ixgb_setup_eeprom(struct ixgb_hw *hw) 200 { 201 uint32_t eecd_reg; 202 203 eecd_reg = IXGB_READ_REG(hw, EECD); 204 205 /* Clear SK and DI */ 206 eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI); 207 IXGB_WRITE_REG(hw, EECD, eecd_reg); 208 209 /* Set CS */ 210 eecd_reg |= IXGB_EECD_CS; 211 IXGB_WRITE_REG(hw, EECD, eecd_reg); 212 return; 213 } 214 215 /****************************************************************************** 216 * Returns EEPROM to a "standby" state 217 * 218 * hw - Struct containing variables accessed by shared code 219 *****************************************************************************/ 220 static void 221 ixgb_standby_eeprom(struct ixgb_hw *hw) 222 { 223 uint32_t eecd_reg; 224 225 eecd_reg = IXGB_READ_REG(hw, EECD); 226 227 /* Deselct EEPROM */ 228 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK); 229 IXGB_WRITE_REG(hw, EECD, eecd_reg); 230 usec_delay(50); 231 232 /* Clock high */ 233 eecd_reg |= IXGB_EECD_SK; 234 IXGB_WRITE_REG(hw, EECD, eecd_reg); 235 usec_delay(50); 236 237 /* Select EEPROM */ 238 eecd_reg |= IXGB_EECD_CS; 239 IXGB_WRITE_REG(hw, EECD, eecd_reg); 240 usec_delay(50); 241 242 /* Clock low */ 243 eecd_reg &= ~IXGB_EECD_SK; 244 IXGB_WRITE_REG(hw, EECD, eecd_reg); 245 usec_delay(50); 246 return; 247 } 248 249 /****************************************************************************** 250 * Raises then lowers the EEPROM's clock pin 251 * 252 * hw - Struct containing variables accessed by shared code 253 *****************************************************************************/ 254 static void 255 ixgb_clock_eeprom(struct ixgb_hw *hw) 256 { 257 uint32_t eecd_reg; 258 259 eecd_reg = IXGB_READ_REG(hw, EECD); 260 261 /* Rising edge of clock */ 262 eecd_reg |= IXGB_EECD_SK; 263 IXGB_WRITE_REG(hw, EECD, eecd_reg); 264 usec_delay(50); 265 266 /* Falling edge of clock */ 267 eecd_reg &= ~IXGB_EECD_SK; 268 IXGB_WRITE_REG(hw, EECD, eecd_reg); 269 usec_delay(50); 270 return; 271 } 272 273 /****************************************************************************** 274 * Terminates a command by lowering the EEPROM's chip select pin 275 * 276 * hw - Struct containing variables accessed by shared code 277 *****************************************************************************/ 278 static void 279 ixgb_cleanup_eeprom(struct ixgb_hw *hw) 280 { 281 uint32_t eecd_reg; 282 283 eecd_reg = IXGB_READ_REG(hw, EECD); 284 285 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI); 286 287 IXGB_WRITE_REG(hw, EECD, eecd_reg); 288 289 ixgb_clock_eeprom(hw); 290 return; 291 } 292 293 /****************************************************************************** 294 * Waits for the EEPROM to finish the current command. 295 * 296 * hw - Struct containing variables accessed by shared code 297 * 298 * The command is done when the EEPROM's data out pin goes high. 299 * 300 * Returns: 301 * TRUE: EEPROM data pin is high before timeout. 302 * FALSE: Time expired. 303 *****************************************************************************/ 304 static boolean_t 305 ixgb_wait_eeprom_command(struct ixgb_hw *hw) 306 { 307 uint32_t eecd_reg; 308 uint32_t i; 309 310 /* Toggle the CS line. This in effect tells to EEPROM to actually 311 * execute the command in question. */ 312 ixgb_standby_eeprom(hw); 313 314 /* Now read DO repeatedly until is high (equal to '1'). The EEEPROM 315 * will signal that the command has been completed by raising the DO 316 * signal. If DO does not go high in 10 milliseconds, then error out. */ 317 for(i = 0; i < 200; i++) { 318 eecd_reg = IXGB_READ_REG(hw, EECD); 319 320 if(eecd_reg & IXGB_EECD_DO) 321 return (TRUE); 322 323 usec_delay(50); 324 } 325 ASSERT(0); 326 return (FALSE); 327 } 328 329 /****************************************************************************** 330 * Verifies that the EEPROM has a valid checksum 331 * 332 * hw - Struct containing variables accessed by shared code 333 * 334 * Reads the first 64 16 bit words of the EEPROM and sums the values read. 335 * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is 336 * valid. 337 * 338 * Returns: 339 * TRUE: Checksum is valid 340 * FALSE: Checksum is not valid. 341 *****************************************************************************/ 342 boolean_t 343 ixgb_validate_eeprom_checksum(struct ixgb_hw *hw) 344 { 345 uint16_t checksum = 0; 346 uint16_t i; 347 348 for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) 349 checksum += ixgb_read_eeprom(hw, i); 350 351 if(checksum == (uint16_t)EEPROM_SUM) 352 return (TRUE); 353 else 354 return (FALSE); 355 } 356 357 /****************************************************************************** 358 * Calculates the EEPROM checksum and writes it to the EEPROM 359 * 360 * hw - Struct containing variables accessed by shared code 361 * 362 * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA. 363 * Writes the difference to word offset 63 of the EEPROM. 364 *****************************************************************************/ 365 void 366 ixgb_update_eeprom_checksum(struct ixgb_hw *hw) 367 { 368 uint16_t checksum = 0; 369 uint16_t i; 370 371 for(i = 0; i < EEPROM_CHECKSUM_REG; i++) 372 checksum += ixgb_read_eeprom(hw, i); 373 374 checksum = (uint16_t)EEPROM_SUM - checksum; 375 376 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum); 377 return; 378 } 379 380 /****************************************************************************** 381 * Writes a 16 bit word to a given offset in the EEPROM. 382 * 383 * hw - Struct containing variables accessed by shared code 384 * reg - offset within the EEPROM to be written to 385 * data - 16 bit word to be writen to the EEPROM 386 * 387 * If ixgb_update_eeprom_checksum is not called after this function, the 388 * EEPROM will most likely contain an invalid checksum. 389 * 390 *****************************************************************************/ 391 void 392 ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data) 393 { 394 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 395 396 /* Prepare the EEPROM for writing */ 397 ixgb_setup_eeprom(hw); 398 399 /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit 400 * opcode plus 4-bit dummy). This puts the EEPROM into write/erase 401 * mode. */ 402 ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5); 403 ixgb_shift_out_bits(hw, 0, 4); 404 405 /* Prepare the EEPROM */ 406 ixgb_standby_eeprom(hw); 407 408 /* Send the Write command (3-bit opcode + 6-bit addr) */ 409 ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3); 410 ixgb_shift_out_bits(hw, offset, 6); 411 412 /* Send the data */ 413 ixgb_shift_out_bits(hw, data, 16); 414 415 ixgb_wait_eeprom_command(hw); 416 417 /* Recover from write */ 418 ixgb_standby_eeprom(hw); 419 420 /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit 421 * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase 422 * mode. */ 423 ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5); 424 ixgb_shift_out_bits(hw, 0, 4); 425 426 /* Done with writing */ 427 ixgb_cleanup_eeprom(hw); 428 429 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */ 430 ee_map->init_ctrl_reg_1 = le16_to_cpu(EEPROM_ICW1_SIGNATURE_CLEAR); 431 432 return; 433 } 434 435 /****************************************************************************** 436 * Reads a 16 bit word from the EEPROM. 437 * 438 * hw - Struct containing variables accessed by shared code 439 * offset - offset of 16 bit word in the EEPROM to read 440 * 441 * Returns: 442 * The 16-bit value read from the eeprom 443 *****************************************************************************/ 444 uint16_t 445 ixgb_read_eeprom(struct ixgb_hw *hw, uint16_t offset) 446 { 447 uint16_t data; 448 449 /* Prepare the EEPROM for reading */ 450 ixgb_setup_eeprom(hw); 451 452 /* Send the READ command (opcode + addr) */ 453 ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3); 454 /* 455 * We have a 64 word EEPROM, there are 6 address bits 456 */ 457 ixgb_shift_out_bits(hw, offset, 6); 458 459 /* Read the data */ 460 data = ixgb_shift_in_bits(hw); 461 462 /* End this read operation */ 463 ixgb_standby_eeprom(hw); 464 465 return (data); 466 } 467 468 /****************************************************************************** 469 * Reads eeprom and stores data in shared structure. 470 * Validates eeprom checksum and eeprom signature. 471 * 472 * hw - Struct containing variables accessed by shared code 473 * 474 * Returns: 475 * TRUE: if eeprom read is successful 476 * FALSE: otherwise. 477 *****************************************************************************/ 478 boolean_t 479 ixgb_get_eeprom_data(struct ixgb_hw *hw) 480 { 481 uint16_t i; 482 uint16_t checksum = 0; 483 struct ixgb_ee_map_type *ee_map; 484 485 DEBUGFUNC("ixgb_get_eeprom_data"); 486 487 ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 488 489 DEBUGOUT("ixgb_ee: Reading eeprom data\n"); 490 for(i = 0; i < IXGB_EEPROM_SIZE; i++) { 491 uint16_t ee_data; 492 493 ee_data = ixgb_read_eeprom(hw, i); 494 checksum += ee_data; 495 hw->eeprom[i] = le16_to_cpu(ee_data); 496 } 497 498 if(checksum != (uint16_t)EEPROM_SUM) { 499 DEBUGOUT("ixgb_ee: Checksum invalid.\n"); 500 /* clear the init_ctrl_reg_1 to signify that the cache is 501 * invalidated */ 502 ee_map->init_ctrl_reg_1 = le16_to_cpu(EEPROM_ICW1_SIGNATURE_CLEAR); 503 return (FALSE); 504 } 505 506 if((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK)) 507 != le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) { 508 DEBUGOUT("ixgb_ee: Signature invalid.\n"); 509 return (FALSE); 510 } 511 512 return (TRUE); 513 } 514 515 /****************************************************************************** 516 * Local function to check if the eeprom signature is good 517 * If the eeprom signature is good, calls ixgb)get_eeprom_data. 518 * 519 * hw - Struct containing variables accessed by shared code 520 * 521 * Returns: 522 * TRUE: eeprom signature was good and the eeprom read was successful 523 * FALSE: otherwise. 524 ******************************************************************************/ 525 static boolean_t 526 ixgb_check_and_get_eeprom_data(struct ixgb_hw *hw) 527 { 528 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 529 530 if((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK)) 531 == le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) { 532 return (TRUE); 533 } else { 534 return ixgb_get_eeprom_data(hw); 535 } 536 } 537 538 /****************************************************************************** 539 * return a word from the eeprom 540 * 541 * hw - Struct containing variables accessed by shared code 542 * index - Offset of eeprom word 543 * 544 * Returns: 545 * Word at indexed offset in eeprom, if valid, 0 otherwise. 546 ******************************************************************************/ 547 uint16_t 548 ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index) 549 { 550 551 if((index < IXGB_EEPROM_SIZE) && 552 (ixgb_check_and_get_eeprom_data(hw) == TRUE)) { 553 return (hw->eeprom[index]); 554 } 555 556 return (0); 557 } 558 559 /****************************************************************************** 560 * return the mac address from EEPROM 561 * 562 * hw - Struct containing variables accessed by shared code 563 * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise 564 * 565 * Returns: None. 566 ******************************************************************************/ 567 void 568 ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t *mac_addr) 569 { 570 int i; 571 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 572 573 DEBUGFUNC("ixgb_get_ee_mac_addr"); 574 575 if(ixgb_check_and_get_eeprom_data(hw) == TRUE) { 576 for(i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) { 577 mac_addr[i] = ee_map->mac_addr[i]; 578 DEBUGOUT2("mac(%d) = %.2X\n", i, mac_addr[i]); 579 } 580 } 581 } 582 583 584 /****************************************************************************** 585 * return the Printed Board Assembly number from EEPROM 586 * 587 * hw - Struct containing variables accessed by shared code 588 * 589 * Returns: 590 * PBA number if EEPROM contents are valid, 0 otherwise 591 ******************************************************************************/ 592 uint32_t 593 ixgb_get_ee_pba_number(struct ixgb_hw *hw) 594 { 595 if(ixgb_check_and_get_eeprom_data(hw) == TRUE) 596 return (le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG]) 597 | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG]) << 16)); 598 599 return (0); 600 } 601 602 603 /****************************************************************************** 604 * return the Device Id from EEPROM 605 * 606 * hw - Struct containing variables accessed by shared code 607 * 608 * Returns: 609 * Device Id if EEPROM contents are valid, 0 otherwise 610 ******************************************************************************/ 611 uint16_t 612 ixgb_get_ee_device_id(struct ixgb_hw *hw) 613 { 614 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 615 616 if(ixgb_check_and_get_eeprom_data(hw) == TRUE) 617 return (le16_to_cpu(ee_map->device_id)); 618 619 return (0); 620 } 621 622