xref: /openbsd/sys/dev/pci/pcivar.h (revision 404b540a)
1 /*	$OpenBSD: pcivar.h,v 1.59 2009/05/05 14:16:17 kettenis Exp $	*/
2 /*	$NetBSD: pcivar.h,v 1.23 1997/06/06 23:48:05 thorpej Exp $	*/
3 
4 /*
5  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
6  * Copyright (c) 1994 Charles Hannum.  All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by Charles Hannum.
19  * 4. The name of the author may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #ifndef _DEV_PCI_PCIVAR_H_
35 #define	_DEV_PCI_PCIVAR_H_
36 
37 /*
38  * Definitions for PCI autoconfiguration.
39  *
40  * This file describes types and functions which are used for PCI
41  * configuration.  Some of this information is machine-specific, and is
42  * provided by pci_machdep.h.
43  */
44 
45 #include <sys/device.h>
46 #include <sys/malloc.h>
47 #include <sys/extent.h>
48 #include <machine/bus.h>
49 #include <dev/pci/pcireg.h>
50 
51 /*
52  * Structures and definitions needed by the machine-dependent header.
53  */
54 typedef u_int32_t pcireg_t;		/* configuration space register XXX */
55 
56 /*
57  * Power Management (PCI 2.2)
58  */
59 #define PCI_PWR_D0	0
60 #define PCI_PWR_D1	1
61 #define PCI_PWR_D2	2
62 #define PCI_PWR_D3	3
63 
64 #ifdef _KERNEL
65 
66 struct pcibus_attach_args;
67 struct pci_softc;
68 
69 /*
70  * Machine-dependent definitions.
71  */
72 #if defined(__alpha__)
73 #include <alpha/pci/pci_machdep.h>
74 #elif defined(__i386__)
75 #include <i386/pci/pci_machdep.h>
76 #elif defined(__powerpc__)
77 #include <powerpc/pci/pci_machdep.h>
78 #elif defined(__sgi__)
79 #include <sgi/pci/pci_machdep.h>
80 #else
81 #include <machine/pci_machdep.h>
82 #endif
83 
84 /*
85  * PCI bus attach arguments.
86  */
87 struct pcibus_attach_args {
88 	char	*pba_busname;		/* XXX should be common */
89 	bus_space_tag_t pba_iot;	/* pci i/o space tag */
90 	bus_space_tag_t pba_memt;	/* pci mem space tag */
91 	bus_dma_tag_t pba_dmat;		/* DMA tag */
92 	pci_chipset_tag_t pba_pc;
93 
94 	struct extent	*pba_ioex;
95 	struct extent	*pba_memex;
96 	struct extent	*pba_pmemex;
97 
98 	int		pba_domain;	/* PCI domain */
99 	int		pba_bus;	/* PCI bus number */
100 
101 	/*
102 	 * Pointer to the pcitag of our parent bridge.  If there is no
103 	 * parent bridge, then we assume we are a root bus.
104 	 */
105 	pcitag_t	*pba_bridgetag;
106 	pci_intr_handle_t *pba_bridgeih;
107 
108 	/*
109 	 * Interrupt swizzling information.  These fields
110 	 * are only used by secondary busses.
111 	 */
112 	u_int		pba_intrswiz;	/* how to swizzle pins */
113 	pcitag_t	pba_intrtag;	/* intr. appears to come from here */
114 };
115 
116 /*
117  * PCI device attach arguments.
118  */
119 struct pci_attach_args {
120 	bus_space_tag_t pa_iot;		/* pci i/o space tag */
121 	bus_space_tag_t pa_memt;	/* pci mem space tag */
122 	bus_dma_tag_t pa_dmat;		/* DMA tag */
123 	pci_chipset_tag_t pa_pc;
124 	int		pa_flags;	/* flags; see below */
125 
126 	struct extent	*pa_ioex;
127 	struct extent	*pa_memex;
128 	struct extent	*pa_pmemex;
129 
130 	u_int           pa_domain;
131 	u_int           pa_bus;
132 	u_int		pa_device;
133 	u_int		pa_function;
134 	pcitag_t	pa_tag;
135 	pcireg_t	pa_id, pa_class;
136 
137 	pcitag_t	*pa_bridgetag;
138 	pci_intr_handle_t *pa_bridgeih;
139 
140 	/*
141 	 * Interrupt information.
142 	 *
143 	 * "Intrline" is used on systems whose firmware puts
144 	 * the right routing data into the line register in
145 	 * configuration space.  The rest are used on systems
146 	 * that do not.
147 	 */
148 	u_int		pa_intrswiz;	/* how to swizzle pins if ppb */
149 	pcitag_t	pa_intrtag;	/* intr. appears to come from here */
150 	pci_intr_pin_t	pa_intrpin;	/* intr. appears on this pin */
151 	pci_intr_line_t	pa_intrline;	/* intr. routing information */
152 	pci_intr_pin_t	pa_rawintrpin;	/* unswizzled pin */
153 };
154 
155 /*
156  * Flags given in the bus and device attachment args.
157  *
158  * OpenBSD doesn't actually use them yet -- csapuntz@cvs.openbsd.org
159  */
160 #define	PCI_FLAGS_IO_ENABLED	0x01		/* I/O space is enabled */
161 #define	PCI_FLAGS_MEM_ENABLED	0x02		/* memory space is enabled */
162 #define	PCI_FLAGS_MRL_OKAY	0x04		/* Memory Read Line okay */
163 #define	PCI_FLAGS_MRM_OKAY	0x08		/* Memory Read Multiple okay */
164 #define	PCI_FLAGS_MWI_OKAY	0x10		/* Memory Write and Invalidate
165 						   okay */
166 
167 /*
168  *
169  */
170 struct pci_quirkdata {
171 	pci_vendor_id_t		vendor;		/* Vendor ID */
172 	pci_product_id_t	product;	/* Product ID */
173 	int			quirks;		/* quirks; see below */
174 };
175 #define	PCI_QUIRK_MULTIFUNCTION		1
176 #define	PCI_QUIRK_MONOFUNCTION		2
177 
178 struct pci_softc {
179 	struct device sc_dev;
180 	bus_space_tag_t sc_iot, sc_memt;
181 	bus_dma_tag_t sc_dmat;
182 	pci_chipset_tag_t sc_pc;
183 	struct extent *sc_ioex;
184 	struct extent *sc_memex;
185 	struct extent *sc_pmemex;
186 	void *sc_powerhook;
187 	LIST_HEAD(, pci_dev) sc_devs;
188 	int sc_domain, sc_bus, sc_maxndevs;
189 	pcitag_t *sc_bridgetag;
190 	pci_intr_handle_t *sc_bridgeih;
191 	u_int sc_intrswiz;
192 	pcitag_t sc_intrtag;
193 };
194 
195 extern int pci_ndomains;
196 
197 /*
198  * Locators devices that attach to 'pcibus', as specified to config.
199  */
200 #define	pcibuscf_bus		cf_loc[0]
201 #define	PCIBUS_UNK_BUS		-1		/* wildcarded 'bus' */
202 
203 /*
204  * Locators for PCI devices, as specified to config.
205  */
206 #define	pcicf_dev		cf_loc[0]
207 #define	PCI_UNK_DEV		-1		/* wildcarded 'dev' */
208 
209 #define	pcicf_function		cf_loc[1]
210 #define	PCI_UNK_FUNCTION	-1		/* wildcarded 'function' */
211 
212 /*
213  * Configuration space access and utility functions.  (Note that most,
214  * e.g. make_tag, conf_read, conf_write are declared by pci_machdep.h.)
215  */
216 int	pci_mapreg_probe(pci_chipset_tag_t, pcitag_t, int, pcireg_t *);
217 pcireg_t pci_mapreg_type(pci_chipset_tag_t, pcitag_t, int);
218 int	pci_mapreg_info(pci_chipset_tag_t, pcitag_t, int, pcireg_t,
219 	    bus_addr_t *, bus_size_t *, int *);
220 int	pci_mapreg_map(struct pci_attach_args *, int, pcireg_t, int,
221 	    bus_space_tag_t *, bus_space_handle_t *, bus_addr_t *,
222 	    bus_size_t *, bus_size_t);
223 
224 
225 int	pci_io_find(pci_chipset_tag_t, pcitag_t, int, bus_addr_t *,
226 	    bus_size_t *);
227 int	pci_mem_find(pci_chipset_tag_t, pcitag_t, int, bus_addr_t *,
228 	    bus_size_t *, int *);
229 
230 int pci_get_capability(pci_chipset_tag_t, pcitag_t, int,
231 			    int *, pcireg_t *);
232 
233 struct pci_matchid {
234 	pci_vendor_id_t		pm_vid;
235 	pci_product_id_t	pm_pid;
236 };
237 
238 int pci_matchbyid(struct pci_attach_args *, const struct pci_matchid *, int);
239 int pci_set_powerstate(pci_chipset_tag_t, pcitag_t, int);
240 
241 /*
242  * Vital Product Data (PCI 2.2)
243  */
244 int pci_vpd_read(pci_chipset_tag_t, pcitag_t, int, int, pcireg_t *);
245 int pci_vpd_write(pci_chipset_tag_t, pcitag_t, int, int, pcireg_t *);
246 
247 /*
248  * Helper functions for autoconfiguration.
249  */
250 const char *pci_findvendor(pcireg_t);
251 const char *pci_findproduct(pcireg_t);
252 int	pci_find_device(struct pci_attach_args *pa,
253 			int (*match)(struct pci_attach_args *));
254 int	pci_probe_device(struct pci_softc *, pcitag_t tag,
255 	    int (*)(struct pci_attach_args *), struct pci_attach_args *);
256 int	pci_detach_devices(struct pci_softc *, int);
257 void	pci_devinfo(pcireg_t, pcireg_t, int, char *, size_t);
258 const struct pci_quirkdata *
259 	pci_lookup_quirkdata(pci_vendor_id_t, pci_product_id_t);
260 void	pciagp_set_pchb(struct pci_attach_args *);
261 
262 #endif /* _KERNEL */
263 #endif /* _DEV_PCI_PCIVAR_H_ */
264