1 /* $OpenBSD: vga_pci.c,v 1.90 2022/03/11 18:00:52 mpi Exp $ */ 2 /* $NetBSD: vga_pci.c,v 1.3 1998/06/08 06:55:58 thorpej Exp $ */ 3 4 /* 5 * Copyright (c) 2001 Wasabi Systems, Inc. 6 * All rights reserved. 7 * 8 * Written by Frank van der Linden for Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed for the NetBSD Project by 21 * Wasabi Systems, Inc. 22 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 23 * or promote products derived from this software without specific prior 24 * written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 /* 39 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 40 * All rights reserved. 41 * 42 * Author: Chris G. Demetriou 43 * 44 * Permission to use, copy, modify and distribute this software and 45 * its documentation is hereby granted, provided that both the copyright 46 * notice and this permission notice appear in all copies of the 47 * software, derivative works or modified versions, and any portions 48 * thereof, and that both notices appear in supporting documentation. 49 * 50 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 51 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 52 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 53 * 54 * Carnegie Mellon requests users of this software to return to 55 * 56 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 57 * School of Computer Science 58 * Carnegie Mellon University 59 * Pittsburgh PA 15213-3890 60 * 61 * any improvements or extensions that they make and grant Carnegie the 62 * rights to redistribute these changes. 63 */ 64 65 #include "vga.h" 66 #if defined(__i386__) || defined(__amd64__) 67 #include "acpi.h" 68 #endif 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/kernel.h> 73 #include <sys/device.h> 74 #include <sys/malloc.h> 75 #include <sys/rwlock.h> 76 77 #include <machine/bus.h> 78 79 #include <dev/pci/pcireg.h> 80 #include <dev/pci/pcivar.h> 81 #include <dev/pci/pcidevs.h> 82 83 #include <dev/ic/mc6845reg.h> 84 #include <dev/ic/pcdisplayvar.h> 85 #include <dev/ic/vgareg.h> 86 #include <dev/pci/vga_pcivar.h> 87 88 #include <dev/wscons/wsconsio.h> 89 #include <dev/wscons/wsdisplayvar.h> 90 #include <dev/ic/vgavar.h> 91 92 #ifdef X86EMU 93 #include <machine/vga_post.h> 94 #endif 95 96 int vga_pci_match(struct device *, void *, void *); 97 void vga_pci_attach(struct device *, struct device *, void *); 98 int vga_pci_activate(struct device *, int); 99 paddr_t vga_pci_mmap(void* v, off_t off, int prot); 100 101 #if !defined(SMALL_KERNEL) && NACPI > 0 102 void vga_save_state(struct vga_pci_softc *); 103 void vga_restore_state(struct vga_pci_softc *); 104 #endif 105 106 const struct cfattach vga_pci_ca = { 107 sizeof(struct vga_pci_softc), vga_pci_match, vga_pci_attach, 108 NULL, vga_pci_activate 109 }; 110 111 #if !defined(SMALL_KERNEL) && NACPI > 0 112 int vga_pci_do_post; 113 114 struct vga_device_description { 115 u_int16_t rval[4]; 116 u_int16_t rmask[4]; 117 char vga_pci_post; 118 }; 119 120 static const struct vga_device_description vga_devs[] = { 121 /* 122 * Header description: 123 * 124 * First entry is a list of the pci video information in the following 125 * order: VENDOR, PRODUCT, SUBVENDOR, SUBPRODUCT 126 * 127 * The next entry is a list of corresponding masks. 128 * 129 * Finally the last value indicates if we should repost via 130 * vga_pci (i.e. the x86emulator) * bios. 131 */ 132 { /* All machines with GMA500/Poulsbo */ 133 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_US15W_IGD, 134 0x0000, 0x0000 }, 135 { 0xffff, 0xffff, 0x0000, 0x0000 }, 1 136 }, 137 { /* All machines with GMA500/Poulsbo */ 138 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_US15L_IGD, 139 0x0000, 0x0000 }, 140 { 0xffff, 0xffff, 0x0000, 0x0000 }, 1 141 }, 142 { /* All machines with GMA600/Oaktrail, 0x4100:4107 */ 143 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GMA600_0, 144 0x0000, 0x0000 }, 145 { 0xffff, 0xfff8, 0x0000, 0x0000 }, 1 146 }, 147 { /* All machines with GMA600/Oaktrail, 0x4108 */ 148 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GMA600_8, 149 0x0000, 0x0000 }, 150 { 0xffff, 0xffff, 0x0000, 0x0000 }, 1 151 }, 152 { /* All machines with Medfield, 0x0130:0x0137 */ 153 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MDFLD_IGD_0, 154 0x0000, 0x0000 }, 155 { 0xffff, 0xfff8, 0x0000, 0x0000 }, 1 156 }, 157 { /* All machines with GMA36x0/Cedartrail, 0x0be0:0x0bef */ 158 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GMA3600_0, 159 0x0000, 0x0000 }, 160 { 0xffff, 0xfff0, 0x0000, 0x0000 }, 1 161 }, 162 }; 163 #endif 164 165 int 166 vga_pci_match(struct device *parent, void *match, void *aux) 167 { 168 struct pci_attach_args *pa = aux; 169 170 if (DEVICE_IS_VGA_PCI(pa->pa_class) == 0) 171 return (0); 172 173 /* check whether it is disabled by firmware */ 174 if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) 175 & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) 176 != (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) 177 return (0); 178 179 /* If it's the console, we have a winner! */ 180 if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA)) 181 return (1); 182 183 /* 184 * If we might match, make sure that the card actually looks OK. 185 */ 186 if (!vga_common_probe(pa->pa_iot, pa->pa_memt)) 187 return (0); 188 189 return (1); 190 } 191 192 void 193 vga_pci_attach(struct device *parent, struct device *self, void *aux) 194 { 195 struct pci_attach_args *pa = aux; 196 pcireg_t reg; 197 struct vga_pci_softc *sc = (struct vga_pci_softc *)self; 198 #if !defined(SMALL_KERNEL) && NACPI > 0 199 int prod, vend, subid, subprod, subvend, i; 200 #endif 201 202 /* 203 * Enable bus master; X might need this for accelerated graphics. 204 */ 205 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 206 reg |= PCI_COMMAND_MASTER_ENABLE; 207 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg); 208 209 sc->sc_type = WSDISPLAY_TYPE_PCIVGA; 210 211 printf("\n"); 212 213 #if !defined(SMALL_KERNEL) && NACPI > 0 214 215 #ifdef X86EMU 216 if ((sc->sc_posth = vga_post_init(pa->pa_bus, pa->pa_device, 217 pa->pa_function)) == NULL) 218 printf("couldn't set up vga POST handler\n"); 219 #endif 220 221 vend = PCI_VENDOR(pa->pa_id); 222 prod = PCI_PRODUCT(pa->pa_id); 223 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 224 subvend = PCI_VENDOR(subid); 225 subprod = PCI_PRODUCT(subid); 226 227 for (i = 0; i < nitems(vga_devs); i++) 228 if ((vend & vga_devs[i].rmask[0]) == vga_devs[i].rval[0] && 229 (prod & vga_devs[i].rmask[1]) == vga_devs[i].rval[1] && 230 (subvend & vga_devs[i].rmask[2]) == vga_devs[i].rval[2] && 231 (subprod & vga_devs[i].rmask[3]) == vga_devs[i].rval[3]) { 232 vga_pci_do_post = vga_devs[i].vga_pci_post; 233 break; 234 } 235 #endif 236 237 #ifdef RAMDISK_HOOKS 238 if (vga_aperture_needed(pa)) 239 printf("%s: aperture needed\n", sc->sc_dev.dv_xname); 240 #endif 241 242 sc->sc_vc = vga_common_attach(self, pa->pa_iot, pa->pa_memt, 243 sc->sc_type); 244 } 245 246 int 247 vga_pci_activate(struct device *self, int act) 248 { 249 int rv = 0; 250 251 #if !defined(SMALL_KERNEL) && NACPI > 0 252 struct vga_pci_softc *sc = (struct vga_pci_softc *)self; 253 #endif 254 255 switch (act) { 256 case DVACT_SUSPEND: 257 rv = config_activate_children(self, act); 258 #if !defined(SMALL_KERNEL) && NACPI > 0 259 /* 260 * Save the common vga state. This should theoretically only 261 * be necessary if we intend to POST, but it is preferable 262 * to do it unconditionally, as many systems do not restore 263 * this state correctly upon resume. 264 */ 265 vga_save_state(sc); 266 #endif 267 break; 268 case DVACT_RESUME: 269 #if !defined(SMALL_KERNEL) && NACPI > 0 270 #if defined (X86EMU) 271 if (vga_pci_do_post) 272 vga_post_call(sc->sc_posth); 273 #endif 274 vga_restore_state(sc); 275 #endif 276 rv = config_activate_children(self, act); 277 break; 278 default: 279 rv = config_activate_children(self, act); 280 break; 281 } 282 283 return (rv); 284 } 285 286 paddr_t 287 vga_pci_mmap(void *v, off_t off, int prot) 288 { 289 return -1; 290 } 291 292 int 293 vga_pci_cnattach(bus_space_tag_t iot, bus_space_tag_t memt, 294 pci_chipset_tag_t pc, int bus, int device, int function) 295 { 296 return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0)); 297 } 298 299 int 300 vga_pci_ioctl(void *v, u_long cmd, caddr_t addr, int flag, struct proc *pb) 301 { 302 int error = 0; 303 304 switch (cmd) { 305 case WSDISPLAYIO_GETPARAM: 306 if (ws_get_param != NULL) 307 return (*ws_get_param)((struct wsdisplay_param *)addr); 308 else 309 error = ENOTTY; 310 break; 311 case WSDISPLAYIO_SETPARAM: 312 if (ws_set_param != NULL) 313 return (*ws_set_param)((struct wsdisplay_param *)addr); 314 else 315 error = ENOTTY; 316 break; 317 default: 318 error = ENOTTY; 319 } 320 321 return (error); 322 } 323 324 #if !defined(SMALL_KERNEL) && NACPI > 0 325 void 326 vga_save_state(struct vga_pci_softc *sc) 327 { 328 struct vga_config *vc = sc->sc_vc; 329 struct vga_handle *vh; 330 struct vgascreen *scr; 331 size_t i; 332 char *buf; 333 334 if (vc == NULL) 335 return; 336 337 vh = &vc->hdl; 338 339 /* 340 * Save sequencer registers 341 */ 342 vga_ts_write(vh, syncreset, 1); /* stop sequencer */ 343 buf = (char *)&sc->sc_save_ts; 344 *buf++ = 0; 345 for (i = 1; i < sizeof(sc->sc_save_ts); i++) 346 *buf++ = _vga_ts_read(vh, i); 347 vga_ts_write(vh, syncreset, 3); /* start sequencer */ 348 /* pretend screen is not blanked */ 349 sc->sc_save_ts.mode &= ~0x20; 350 sc->sc_save_ts.mode |= 0x80; 351 352 /* 353 * Save CRTC registers 354 */ 355 buf = (char *)&sc->sc_save_crtc; 356 for (i = 0; i < sizeof(sc->sc_save_crtc); i++) 357 *buf++ = _pcdisplay_6845_read(&vh->vh_ph, i); 358 359 /* 360 * Save ATC registers 361 */ 362 buf = (char *)&sc->sc_save_atc; 363 for (i = 0; i < sizeof(sc->sc_save_atc); i++) 364 *buf++ = _vga_attr_read(vh, i); 365 366 /* 367 * Save GDC registers 368 */ 369 buf = (char *)&sc->sc_save_gdc; 370 for (i = 0; i < sizeof(sc->sc_save_gdc); i++) 371 *buf++ = _vga_gdc_read(vh, i); 372 373 vga_save_palette(vc); 374 375 /* XXX should also save font data */ 376 377 /* 378 * Save current screen contents if we have backing store for it, 379 * and intend to POST on resume. 380 * XXX Since we don't allocate backing store unless the second VT is 381 * XXX created, we could theoretically have no backing store available 382 * XXX at this point. 383 */ 384 if (vga_pci_do_post) { 385 scr = vc->active; 386 if (scr != NULL && scr->pcs.active && scr->pcs.mem != NULL) 387 bus_space_read_region_2(vh->vh_memt, vh->vh_memh, 388 scr->pcs.dispoffset, scr->pcs.mem, 389 scr->pcs.type->ncols * scr->pcs.type->nrows); 390 } 391 } 392 393 void 394 vga_restore_state(struct vga_pci_softc *sc) 395 { 396 struct vga_config *vc = sc->sc_vc; 397 struct vga_handle *vh; 398 struct vgascreen *scr; 399 size_t i; 400 char *buf; 401 402 if (vc == NULL) 403 return; 404 405 vh = &vc->hdl; 406 407 /* 408 * Restore sequencer registers 409 */ 410 vga_ts_write(vh, syncreset, 1); /* stop sequencer */ 411 buf = (char *)&sc->sc_save_ts + 1; 412 for (i = 1; i < sizeof(sc->sc_save_ts); i++) 413 _vga_ts_write(vh, i, *buf++); 414 vga_ts_write(vh, syncreset, 3); /* start sequencer */ 415 416 /* 417 * Restore CRTC registers 418 */ 419 /* unprotect registers 00-07 */ 420 vga_6845_write(vh, vsynce, 421 vga_6845_read(vh, vsynce) & ~0x80); 422 buf = (char *)&sc->sc_save_crtc; 423 for (i = 0; i < sizeof(sc->sc_save_crtc); i++) 424 _pcdisplay_6845_write(&vh->vh_ph, i, *buf++); 425 426 /* 427 * Restore ATC registers 428 */ 429 buf = (char *)&sc->sc_save_atc; 430 for (i = 0; i < sizeof(sc->sc_save_atc); i++) 431 _vga_attr_write(vh, i, *buf++); 432 433 /* 434 * Restore GDC registers 435 */ 436 buf = (char *)&sc->sc_save_gdc; 437 for (i = 0; i < sizeof(sc->sc_save_gdc); i++) 438 _vga_gdc_write(vh, i, *buf++); 439 440 vga_restore_fonts(vc); 441 vga_restore_palette(vc); 442 443 /* 444 * Restore current screen contents if we have backing store for it, 445 * and have POSTed on resume. 446 * XXX Since we don't allocate backing store unless the second VT is 447 * XXX created, we could theoretically have no backing store available 448 * XXX at this point. 449 */ 450 if (vga_pci_do_post) { 451 scr = vc->active; 452 if (scr != NULL && scr->pcs.active && scr->pcs.mem != NULL) 453 bus_space_write_region_2(vh->vh_memt, vh->vh_memh, 454 scr->pcs.dispoffset, scr->pcs.mem, 455 scr->pcs.type->ncols * scr->pcs.type->nrows); 456 } 457 } 458 #endif 459