1 /* $OpenBSD: sdmmcchip.h,v 1.13 2018/12/29 11:37:30 patrick Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _SDMMC_CHIP_H_ 20 #define _SDMMC_CHIP_H_ 21 22 #include <machine/bus.h> 23 24 struct sdmmc_command; 25 26 typedef struct sdmmc_chip_functions *sdmmc_chipset_tag_t; 27 typedef void *sdmmc_chipset_handle_t; 28 29 struct sdmmc_chip_functions { 30 /* host controller reset */ 31 int (*host_reset)(sdmmc_chipset_handle_t); 32 /* host capabilities */ 33 u_int32_t (*host_ocr)(sdmmc_chipset_handle_t); 34 int (*host_maxblklen)(sdmmc_chipset_handle_t); 35 /* card detection */ 36 int (*card_detect)(sdmmc_chipset_handle_t); 37 /* bus power and clock frequency */ 38 int (*bus_power)(sdmmc_chipset_handle_t, u_int32_t); 39 int (*bus_clock)(sdmmc_chipset_handle_t, int, int); 40 int (*bus_width)(sdmmc_chipset_handle_t, int); 41 /* command execution */ 42 void (*exec_command)(sdmmc_chipset_handle_t, 43 struct sdmmc_command *); 44 /* card interrupt */ 45 void (*card_intr_mask)(sdmmc_chipset_handle_t, int); 46 void (*card_intr_ack)(sdmmc_chipset_handle_t); 47 /* UHS functions */ 48 int (*signal_voltage)(sdmmc_chipset_handle_t, int); 49 /* hibernate */ 50 int (*hibernate_init)(sdmmc_chipset_handle_t, void *); 51 }; 52 53 /* host controller reset */ 54 #define sdmmc_chip_host_reset(tag, handle) \ 55 ((tag)->host_reset((handle))) 56 /* host capabilities */ 57 #define sdmmc_chip_host_ocr(tag, handle) \ 58 ((tag)->host_ocr((handle))) 59 #define sdmmc_chip_host_maxblklen(tag, handle) \ 60 ((tag)->host_maxblklen((handle))) 61 /* card detection */ 62 #define sdmmc_chip_card_detect(tag, handle) \ 63 ((tag)->card_detect((handle))) 64 /* bus power and clock frequency */ 65 #define sdmmc_chip_bus_power(tag, handle, ocr) \ 66 ((tag)->bus_power((handle), (ocr))) 67 #define sdmmc_chip_bus_clock(tag, handle, freq, timing) \ 68 ((tag)->bus_clock((handle), (freq), (timing))) 69 #define sdmmc_chip_bus_width(tag, handle, width) \ 70 ((tag)->bus_width((handle), (width))) 71 /* command execution */ 72 #define sdmmc_chip_exec_command(tag, handle, cmdp) \ 73 ((tag)->exec_command((handle), (cmdp))) 74 /* card interrupt */ 75 #define sdmmc_chip_card_intr_mask(tag, handle, enable) \ 76 ((tag)->card_intr_mask((handle), (enable))) 77 #define sdmmc_chip_card_intr_ack(tag, handle) \ 78 ((tag)->card_intr_ack((handle))) 79 /* UHS functions */ 80 #define sdmmc_chip_signal_voltage(tag, handle, voltage) \ 81 ((tag)->signal_voltage((handle), (voltage))) 82 83 /* clock frequencies for sdmmc_chip_bus_clock() */ 84 #define SDMMC_SDCLK_OFF 0 85 #define SDMMC_SDCLK_400KHZ 400 86 #define SDMMC_SDCLK_25MHZ 25000 87 #define SDMMC_SDCLK_50MHZ 50000 88 89 /* voltage levels for sdmmc_chip_signal_voltage() */ 90 #define SDMMC_SIGNAL_VOLTAGE_330 0 91 #define SDMMC_SIGNAL_VOLTAGE_180 1 92 93 #define SDMMC_TIMING_LEGACY 0 94 #define SDMMC_TIMING_HIGHSPEED 1 95 #define SDMMC_TIMING_MMC_DDR52 2 96 97 #define SDMMC_MAX_FUNCTIONS 8 98 99 struct sdmmcbus_attach_args { 100 const char *saa_busname; 101 sdmmc_chipset_tag_t sct; 102 sdmmc_chipset_handle_t sch; 103 bus_dma_tag_t dmat; 104 bus_dmamap_t dmap; 105 int flags; 106 int caps; 107 long max_seg; 108 long max_xfer; 109 void *cookies[SDMMC_MAX_FUNCTIONS]; 110 }; 111 112 void sdmmc_needs_discover(struct device *); 113 void sdmmc_card_intr(struct device *); 114 void sdmmc_delay(u_int); 115 116 #endif 117