1 /* $OpenBSD: if_athn_usb.h,v 1.3 2012/11/10 14:35:06 mikeb Exp $ */ 2 3 /*- 4 * Copyright (c) 2011 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* Maximum number of STAs firmware can handle. */ 20 #define AR_USB_MAX_STA 8 21 22 #define AR_USB_DEFAULT_NF (-95) 23 24 /* USB requests. */ 25 #define AR_FW_DOWNLOAD 0x30 26 #define AR_FW_DOWNLOAD_COMP 0x31 27 28 /* USB endpoints addresses. */ 29 #define AR_PIPE_TX_DATA (UE_DIR_OUT | 1) 30 #define AR_PIPE_RX_DATA (UE_DIR_IN | 2) 31 #define AR_PIPE_RX_INTR (UE_DIR_IN | 3) 32 #define AR_PIPE_TX_INTR (UE_DIR_OUT | 4) 33 34 /* Wireless module interface commands. */ 35 #define AR_WMI_CMD_ECHO 0x001 36 #define AR_WMI_CMD_ACCESS_MEMORY 0x002 37 #define AR_WMI_CMD_DISABLE_INTR 0x003 38 #define AR_WMI_CMD_ENABLE_INTR 0x004 39 #define AR_WMI_CMD_RX_LINK 0x005 40 #define AR_WMI_CMD_ATH_INIT 0x006 41 #define AR_WMI_CMD_ABORT_TXQ 0x007 42 #define AR_WMI_CMD_STOP_TX_DMA 0x008 43 #define AR_WMI_CMD_STOP_DMA_RECV 0x009 44 #define AR_WMI_CMD_ABORT_TX_DMA 0x00a 45 #define AR_WMI_CMD_DRAIN_TXQ 0x00b 46 #define AR_WMI_CMD_DRAIN_TXQ_ALL 0x00c 47 #define AR_WMI_CMD_START_RECV 0x00d 48 #define AR_WMI_CMD_STOP_RECV 0x00e 49 #define AR_WMI_CMD_FLUSH_RECV 0x00f 50 #define AR_WMI_CMD_SET_MODE 0x010 51 #define AR_WMI_CMD_RESET 0x011 52 #define AR_WMI_CMD_NODE_CREATE 0x012 53 #define AR_WMI_CMD_NODE_REMOVE 0x013 54 #define AR_WMI_CMD_VAP_REMOVE 0x014 55 #define AR_WMI_CMD_VAP_CREATE 0x015 56 #define AR_WMI_CMD_BEACON_UPDATE 0x016 57 #define AR_WMI_CMD_REG_READ 0x017 58 #define AR_WMI_CMD_REG_WRITE 0x018 59 #define AR_WMI_CMD_RC_STATE_CHANGE 0x019 60 #define AR_WMI_CMD_RC_RATE_UPDATE 0x01a 61 #define AR_WMI_CMD_DEBUG_INFO 0x01b 62 #define AR_WMI_CMD_HOST_ATTACH 0x01c 63 #define AR_WMI_CMD_TARGET_IC_UPDATE 0x01d 64 #define AR_WMI_CMD_TGT_STATS 0x01e 65 #define AR_WMI_CMD_TX_AGGR_ENABLE 0x01f 66 #define AR_WMI_CMD_TGT_DETACH 0x020 67 #define AR_WMI_CMD_TGT_TXQ_ENABLE 0x021 68 #define AR_WMI_CMD_AGGR_LIMIT 0x026 69 /* Wireless module interface events. */ 70 #define AR_WMI_EVT_TGT_RDY 0x001 71 #define AR_WMI_EVT_SWBA 0x002 72 #define AR_WMI_EVT_FATAL 0x003 73 #define AR_WMI_EVT_TXTO 0x004 74 #define AR_WMI_EVT_BMISS 0x005 75 #define AR_WMI_EVT_WLAN_TXCOMP 0x006 76 #define AR_WMI_EVT_DELBA 0x007 77 #define AR_WMI_EVT_TXRATE 0x008 78 79 /* Structure for service AR_SVC_WMI_CONTROL. */ 80 struct ar_wmi_cmd_hdr { 81 uint16_t cmd_id; 82 #define AR_WMI_EVT_FLAG 0x1000 83 84 uint16_t seq_no; 85 } __packed; 86 87 /* Values for AR_WMI_CMD_SET_MODE. */ 88 #define AR_HTC_MODE_AUTO 0 89 #define AR_HTC_MODE_11A 1 90 #define AR_HTC_MODE_11B 2 91 #define AR_HTC_MODE_11G 3 92 #define AR_HTC_MODE_FH 4 93 #define AR_HTC_MODE_TURBO_A 5 94 #define AR_HTC_MODE_TURBO_G 6 95 #define AR_HTC_MODE_11NA 7 96 #define AR_HTC_MODE_11NG 8 97 98 #define AR_MAX_WRITE_COUNT 32 99 /* Structure for command AR_WMI_CMD_REG_WRITE. */ 100 struct ar_wmi_cmd_reg_write { 101 uint32_t addr; 102 uint32_t val; 103 } __packed; 104 105 /* Structure for command AR_WMI_CMD_NODE_{CREATE,REMOVE}. */ 106 struct ar_htc_target_sta { 107 uint16_t associd; 108 uint16_t txpower; 109 uint32_t pariwisekey; 110 uint8_t macaddr[IEEE80211_ADDR_LEN]; 111 uint8_t bssid[IEEE80211_ADDR_LEN]; 112 uint8_t sta_index; 113 uint8_t vif_index; 114 uint8_t vif_sta; 115 uint16_t flags; 116 #define AR_HTC_STA_AUTH 0x0001 117 #define AR_HTC_STA_QOS 0x0002 118 #define AR_HTC_STA_ERP 0x0004 119 #define AR_HTC_STA_HT 0x0008 120 121 uint16_t htcap; 122 uint8_t valid; 123 uint16_t capinfo; 124 uint32_t reserved[2]; 125 uint16_t txseqmgmt; 126 uint8_t is_vif_sta; 127 uint16_t maxampdu; 128 uint16_t iv16; 129 uint32_t iv32; 130 } __packed; 131 132 /* Structures for command AR_WMI_CMD_RC_RATE_UPDATE. */ 133 #define AR_HTC_RATE_MAX 30 134 struct ar_htc_rateset { 135 uint8_t rs_nrates; 136 uint8_t rs_rates[AR_HTC_RATE_MAX]; 137 } __packed; 138 139 struct ar_htc_target_rate { 140 uint8_t sta_index; 141 uint8_t isnew; 142 uint32_t capflags; 143 #define AR_RC_DS_FLAG 0x00000001 144 #define AR_RC_TS_FLAG 0x00000002 145 #define AR_RC_40_FLAG 0x00000004 146 #define AR_RC_SGI_FLAG 0x00000008 147 #define AR_RC_HT_FLAG 0x00000010 148 149 struct ar_htc_rateset lg_rates; 150 struct ar_htc_rateset ht_rates; 151 } __packed; 152 153 /* Structure for command AR_WMI_CMD_TX_AGGR_ENABLE. */ 154 struct ar_htc_target_aggr { 155 uint8_t sta_index; 156 uint8_t tidno; 157 uint8_t aggr_enable; 158 uint8_t padding; 159 } __packed; 160 161 /* Structure for command AR_WMI_CMD_VAP_CREATE. */ 162 struct ar_htc_target_vif { 163 uint8_t index; 164 uint8_t des_bssid[IEEE80211_ADDR_LEN]; 165 uint32_t opmode; 166 #define AR_HTC_M_IBSS 0 167 #define AR_HTC_M_STA 1 168 #define AR_HTC_M_WDS 2 169 #define AR_HTC_M_AHDEMO 3 170 #define AR_HTC_M_HOSTAP 6 171 #define AR_HTC_M_MONITOR 8 172 173 uint8_t myaddr[IEEE80211_ADDR_LEN]; 174 uint8_t bssid[IEEE80211_ADDR_LEN]; 175 uint32_t flags; 176 uint32_t flags_ext; 177 uint16_t ps_sta; 178 uint16_t rtsthreshold; 179 uint8_t ath_cap; 180 int8_t mcast_rate; 181 } __packed; 182 183 /* Structure for command AM_WMI_CMD_TARGET_IC_UPDATE. */ 184 struct ar_htc_cap_target { 185 uint32_t flags; 186 uint32_t flags_ext; 187 uint32_t ampdu_limit; 188 uint8_t ampdu_subframes; 189 uint8_t ht_txchainmask; 190 uint8_t lg_txchainmask; 191 uint8_t rtscts_ratecode; 192 uint8_t protmode; 193 } __packed; 194 195 /* Structure for event AR_WMI_EVT_TXRATE. */ 196 struct ar_wmi_evt_txrate { 197 uint32_t txrate; 198 uint8_t rssi_thresh; 199 uint8_t per; 200 } __packed; 201 202 /* HTC header. */ 203 struct ar_htc_frame_hdr { 204 uint8_t endpoint_id; 205 uint8_t flags; 206 #define AR_HTC_FLAG_TRAILER 0x02 207 208 uint16_t payload_len; 209 uint8_t control[4]; 210 } __packed; 211 212 /* Structure for HTC enpoint id 0. */ 213 struct ar_htc_msg_hdr { 214 uint16_t msg_id; 215 #define AR_HTC_MSG_READY 0x0001 216 #define AR_HTC_MSG_CONN_SVC 0x0002 217 #define AR_HTC_MSG_CONN_SVC_RSP 0x0003 218 #define AR_HTC_MSG_SETUP_COMPLETE 0x0004 219 #define AR_HTC_MSG_CONF_PIPE 0x0005 220 #define AR_HTC_MSG_CONF_PIPE_RSP 0x0006 221 } __packed; 222 223 /* Structure for services AR_SVC_WMI_DATA_{VO,VI,BE,BK}. */ 224 struct ar_tx_frame { 225 uint8_t data_type; 226 #define AR_HTC_AMPDU 1 227 #define AR_HTC_NORMAL 2 228 229 uint8_t node_idx; 230 uint8_t vif_idx; 231 uint8_t tid; 232 uint32_t flags; 233 #define AR_HTC_TX_CTSONLY 0x00000001 234 #define AR_HTC_TX_RTSCTS 0x00000002 235 #define AR_HTC_TX_USE_MIN_RATE 0x00000100 236 237 uint8_t key_type; 238 uint8_t key_idx; 239 uint8_t reserved[26]; 240 } __packed; 241 242 /* Structure for service AR_SVC_WMI_MGMT. */ 243 struct ar_tx_mgmt { 244 uint8_t node_idx; 245 uint8_t vif_idx; 246 uint8_t tid; 247 uint8_t flags; 248 uint8_t key_type; 249 uint8_t key_idx; 250 uint16_t reserved; 251 } __packed; 252 253 /* Structure for service AR_SVC_WMI_BEACON. */ 254 struct ar_tx_bcn { 255 uint8_t len_changed; 256 uint8_t vif_idx; 257 uint16_t rev; 258 } __packed; 259 260 /* Structure for message AR_HTC_MSG_READY. */ 261 struct ar_htc_msg_ready { 262 uint16_t credits; 263 uint16_t credits_size; 264 uint8_t max_endpoints; 265 uint8_t reserved; 266 } __packed; 267 268 /* Structure for message AR_HTC_MSG_CONF_PIPE. */ 269 struct ar_htc_msg_config_pipe { 270 uint8_t pipe_id; 271 uint8_t credits; 272 } __packed; 273 274 /* Structure for message AR_HTC_MSG_CONN_SVC. */ 275 struct ar_htc_msg_conn_svc { 276 uint16_t svc_id; 277 uint16_t conn_flags; 278 uint8_t dl_pipeid; 279 uint8_t ul_pipeid; 280 uint8_t svc_meta_len; 281 uint8_t reserved; 282 } __packed; 283 284 /* Structure for message AR_HTC_MSG_CONN_SVC_RSP. */ 285 struct ar_htc_msg_conn_svc_rsp { 286 uint16_t svc_id; 287 uint8_t status; 288 #define AR_HTC_SVC_SUCCESS 0 289 #define AR_HTC_SVC_NOT_FOUND 1 290 #define AR_HTC_SVC_FAILED 2 291 #define AR_HTC_SVC_NO_RESOURCES 3 292 #define AR_HTC_SVC_NO_MORE_EP 4 293 294 uint8_t endpoint_id; 295 uint16_t max_msg_len; 296 uint8_t svc_meta_len; 297 uint8_t reserved; 298 } __packed; 299 300 #define AR_SVC(grp, idx) ((grp) << 8 | (idx)) 301 #define AR_SVC_IDX(svc) ((svc) & 0xff) 302 /* Service groups. */ 303 #define AR_SVC_GRP_RSVD 0 304 #define AR_SVC_GRP_WMI 1 305 /* Service identifiers for WMI group. */ 306 #define AR_SVC_WMI_CONTROL AR_SVC(AR_SVC_GRP_WMI, 0) 307 #define AR_SVC_WMI_BEACON AR_SVC(AR_SVC_GRP_WMI, 1) 308 #define AR_SVC_WMI_CAB AR_SVC(AR_SVC_GRP_WMI, 2) 309 #define AR_SVC_WMI_UAPSD AR_SVC(AR_SVC_GRP_WMI, 3) 310 #define AR_SVC_WMI_MGMT AR_SVC(AR_SVC_GRP_WMI, 4) 311 #define AR_SVC_WMI_DATA_VO AR_SVC(AR_SVC_GRP_WMI, 5) 312 #define AR_SVC_WMI_DATA_VI AR_SVC(AR_SVC_GRP_WMI, 6) 313 #define AR_SVC_WMI_DATA_BE AR_SVC(AR_SVC_GRP_WMI, 7) 314 #define AR_SVC_WMI_DATA_BK AR_SVC(AR_SVC_GRP_WMI, 8) 315 316 struct ar_stream_hdr { 317 uint16_t len; 318 uint16_t tag; 319 #define AR_USB_RX_STREAM_TAG 0x4e00 320 #define AR_USB_TX_STREAM_TAG 0x697e 321 } __packed __attribute__((aligned(4))); 322 323 #define AR_MAX_CHAINS 3 324 325 /* Rx descriptor. */ 326 struct ar_rx_status { 327 uint64_t rs_tstamp; 328 uint16_t rs_datalen; 329 uint8_t rs_status; 330 uint8_t rs_phyerr; 331 int8_t rs_rssi; 332 int8_t rs_rssi_ctl[AR_MAX_CHAINS]; 333 int8_t rs_rssi_ext[AR_MAX_CHAINS]; 334 uint8_t rs_keyix; 335 uint8_t rs_rate; 336 uint8_t rs_antenna; 337 uint8_t rs_more; 338 uint8_t rs_isaggr; 339 uint8_t rs_moreaggr; 340 uint8_t rs_num_delims; 341 uint8_t rs_flags; 342 #define AR_RXS_FLAG_GI 0x04 343 #define AR_RXS_FLAG_2040 0x08 344 345 uint8_t rs_dummy; 346 uint32_t rs_evm[AR_MAX_CHAINS]; 347 } __packed __attribute__((aligned(4))); 348 349 350 /* 351 * Driver definitions. 352 */ 353 #define ATHN_USB_RX_LIST_COUNT 1 354 #define ATHN_USB_TX_LIST_COUNT (8 + 1) /* NB: +1 for beacons. */ 355 356 #define ATHN_USB_HOST_CMD_RING_COUNT 32 357 358 #define ATHN_USB_RXBUFSZ (8 * 1024) /* XXX Linux 16K */ 359 #define ATHN_USB_TXBUFSZ \ 360 ((sizeof(struct ar_stream_hdr) + \ 361 sizeof(struct ar_htc_frame_hdr) + \ 362 sizeof(struct ar_tx_frame) + \ 363 IEEE80211_MAX_LEN + 3) & ~3) 364 #define ATHN_USB_TXCMDSZ 512 365 366 #define ATHN_USB_TX_TIMEOUT 5000 /* ms */ 367 #define ATHN_USB_CMD_TIMEOUT 1000 /* ms */ 368 369 struct athn_usb_softc; 370 371 struct athn_usb_rx_stream { 372 struct mbuf *m; 373 int moff; 374 int left; 375 }; 376 377 struct athn_usb_rx_data { 378 struct athn_usb_softc *sc; 379 usbd_xfer_handle xfer; 380 uint8_t *buf; 381 }; 382 383 struct athn_usb_tx_data { 384 struct athn_usb_softc *sc; 385 usbd_xfer_handle xfer; 386 uint8_t *buf; 387 TAILQ_ENTRY(athn_usb_tx_data) next; 388 }; 389 390 struct athn_usb_host_cmd { 391 void (*cb)(struct athn_usb_softc *, void *); 392 uint8_t data[256]; 393 }; 394 395 struct athn_usb_cmd_newstate { 396 enum ieee80211_state state; 397 int arg; 398 }; 399 400 struct athn_usb_cmd_key { 401 struct ieee80211_node *ni; 402 struct ieee80211_key *key; 403 }; 404 405 struct athn_usb_aggr_cmd { 406 uint8_t sta_index; 407 uint8_t tid; 408 }; 409 410 struct athn_usb_host_cmd_ring { 411 struct athn_usb_host_cmd cmd[ATHN_USB_HOST_CMD_RING_COUNT]; 412 int cur; 413 int next; 414 int queued; 415 }; 416 417 struct athn_usb_softc { 418 struct athn_softc sc_sc; 419 #define usb_dev sc_sc.sc_dev 420 int sc_athn_attached; 421 422 /* USB specific goo. */ 423 usbd_device_handle sc_udev; 424 usbd_interface_handle sc_iface; 425 struct usb_task sc_task; 426 427 u_int flags; 428 #define ATHN_USB_FLAG_AR7010 0x01 429 430 struct athn_usb_rx_stream rx_stream; 431 432 usbd_pipe_handle tx_data_pipe; 433 usbd_pipe_handle rx_data_pipe; 434 usbd_pipe_handle rx_intr_pipe; 435 usbd_pipe_handle tx_intr_pipe; 436 uint8_t *ibuf; 437 438 struct ar_wmi_cmd_reg_write wbuf[AR_MAX_WRITE_COUNT]; 439 int wcount; 440 441 int wmi_done; 442 uint16_t wmi_seq_no; 443 uint16_t wait_cmd_id; 444 uint16_t wait_msg_id; 445 void *obuf; 446 struct ar_htc_msg_conn_svc_rsp *msg_conn_svc_rsp; 447 448 struct athn_usb_host_cmd_ring cmdq; 449 struct athn_usb_rx_data rx_data[ATHN_USB_RX_LIST_COUNT]; 450 struct athn_usb_tx_data tx_data[ATHN_USB_TX_LIST_COUNT]; 451 TAILQ_HEAD(, athn_usb_tx_data) tx_free_list; 452 struct athn_usb_tx_data tx_cmd; 453 struct athn_usb_tx_data *tx_bcn; 454 455 uint8_t ep_ctrl; 456 uint8_t ep_bcn; 457 uint8_t ep_cab; 458 uint8_t ep_uapsd; 459 uint8_t ep_mgmt; 460 uint8_t ep_data[EDCA_NUM_AC]; 461 }; 462