1 /* $OpenBSD: if_mue.c,v 1.12 2024/05/23 03:21:08 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 2018 Kevin Lo <kevlo@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* Driver for Microchip LAN7500/LAN7800 chipsets. */ 20 21 #include "bpfilter.h" 22 23 #include <sys/param.h> 24 #include <sys/systm.h> 25 #include <sys/sockio.h> 26 #include <sys/rwlock.h> 27 #include <sys/mbuf.h> 28 29 #include <sys/device.h> 30 31 #include <machine/bus.h> 32 33 #include <net/if.h> 34 #include <net/if_dl.h> 35 #include <net/if_media.h> 36 37 #if NBPFILTER > 0 38 #include <net/bpf.h> 39 #endif 40 41 #include <netinet/in.h> 42 #include <netinet/if_ether.h> 43 44 #include <dev/mii/miivar.h> 45 46 #include <dev/usb/usb.h> 47 #include <dev/usb/usbdi.h> 48 #include <dev/usb/usbdi_util.h> 49 #include <dev/usb/usbdivar.h> 50 #include <dev/usb/usbdevs.h> 51 52 #include <dev/usb/if_muereg.h> 53 54 #ifdef MUE_DEBUG 55 #define DPRINTF(x) do { if (muedebug) printf x; } while (0) 56 #define DPRINTFN(n,x) do { if (muedebug >= (n)) printf x; } while (0) 57 int muedebug = 0; 58 #else 59 #define DPRINTF(x) 60 #define DPRINTFN(n,x) 61 #endif 62 63 /* 64 * Various supported device vendors/products. 65 */ 66 struct mue_type { 67 struct usb_devno mue_dev; 68 uint16_t mue_flags; 69 #define LAN7500 0x0001 /* LAN7500 */ 70 }; 71 72 const struct mue_type mue_devs[] = { 73 { { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7500 }, LAN7500 }, 74 { { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7505 }, LAN7500 }, 75 { { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7800 }, 0 }, 76 { { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7801 }, 0 }, 77 { { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7850 }, 0 } 78 }; 79 80 #define mue_lookup(v, p) ((struct mue_type *)usb_lookup(mue_devs, v, p)) 81 82 int mue_match(struct device *, void *, void *); 83 void mue_attach(struct device *, struct device *, void *); 84 int mue_detach(struct device *, int); 85 86 struct cfdriver mue_cd = { 87 NULL, "mue", DV_IFNET 88 }; 89 90 const struct cfattach mue_ca = { 91 sizeof(struct mue_softc), mue_match, mue_attach, mue_detach 92 }; 93 94 uint32_t mue_csr_read(struct mue_softc *, uint32_t); 95 int mue_csr_write(struct mue_softc *, uint32_t, uint32_t); 96 97 void mue_lock_mii(struct mue_softc *); 98 void mue_unlock_mii(struct mue_softc *); 99 100 int mue_mii_wait(struct mue_softc *); 101 int mue_miibus_readreg(struct device *, int, int); 102 void mue_miibus_writereg(struct device *, int, int, int); 103 void mue_miibus_statchg(struct device *); 104 int mue_ifmedia_upd(struct ifnet *); 105 void mue_ifmedia_sts(struct ifnet *, struct ifmediareq *); 106 107 int mue_eeprom_wait(struct mue_softc *); 108 uint8_t mue_eeprom_getbyte(struct mue_softc *, int, uint8_t *); 109 int mue_read_eeprom(struct mue_softc *, caddr_t, int, int); 110 int mue_dataport_wait(struct mue_softc *); 111 void mue_dataport_write(struct mue_softc *, uint32_t, uint32_t, 112 uint32_t, uint32_t *); 113 void mue_init_ltm(struct mue_softc *); 114 int mue_chip_init(struct mue_softc *); 115 void mue_set_macaddr(struct mue_softc *); 116 117 int mue_rx_list_init(struct mue_softc *); 118 int mue_tx_list_init(struct mue_softc *); 119 int mue_open_pipes(struct mue_softc *); 120 int mue_encap(struct mue_softc *, struct mbuf *, int); 121 void mue_iff(struct mue_softc *); 122 void mue_rxeof(struct usbd_xfer *, void *, usbd_status); 123 void mue_txeof(struct usbd_xfer *, void *, usbd_status); 124 125 void mue_init(void *); 126 int mue_ioctl(struct ifnet *, u_long, caddr_t); 127 void mue_watchdog(struct ifnet *); 128 void mue_reset(struct mue_softc *); 129 void mue_start(struct ifnet *); 130 void mue_stop(struct mue_softc *); 131 void mue_tick(void *); 132 void mue_tick_task(void *); 133 134 #define MUE_SETBIT(sc, reg, x) \ 135 mue_csr_write(sc, reg, mue_csr_read(sc, reg) | (x)) 136 137 #define MUE_CLRBIT(sc, reg, x) \ 138 mue_csr_write(sc, reg, mue_csr_read(sc, reg) & ~(x)) 139 140 #if defined(__arm__) || defined(__arm64__) 141 142 #include <dev/ofw/openfirm.h> 143 144 void 145 mue_enaddr_OF(struct mue_softc *sc) 146 { 147 char *device = "/axi/usb/hub/ethernet"; 148 char prop[64]; 149 int node; 150 151 if (sc->mue_dev.dv_unit != 0) 152 return; 153 154 /* Get the Raspberry Pi MAC address from FDT. */ 155 if ((node = OF_finddevice("/aliases")) == -1) 156 return; 157 if (OF_getprop(node, "ethernet0", prop, sizeof(prop)) > 0 || 158 OF_getprop(node, "ethernet", prop, sizeof(prop)) > 0) 159 device = prop; 160 161 if ((node = OF_finddevice(device)) == -1) 162 return; 163 if (OF_getprop(node, "local-mac-address", sc->arpcom.ac_enaddr, 164 sizeof(sc->arpcom.ac_enaddr)) != sizeof(sc->arpcom.ac_enaddr)) { 165 OF_getprop(node, "mac-address", sc->arpcom.ac_enaddr, 166 sizeof(sc->arpcom.ac_enaddr)); 167 } 168 } 169 #else 170 #define mue_enaddr_OF(x) do {} while(0) 171 #endif 172 173 uint32_t 174 mue_csr_read(struct mue_softc *sc, uint32_t reg) 175 { 176 usb_device_request_t req; 177 usbd_status err; 178 uDWord val; 179 180 if (usbd_is_dying(sc->mue_udev)) 181 return (0); 182 183 USETDW(val, 0); 184 req.bmRequestType = UT_READ_VENDOR_DEVICE; 185 req.bRequest = MUE_UR_READREG; 186 USETW(req.wValue, 0); 187 USETW(req.wIndex, reg); 188 USETW(req.wLength, 4); 189 190 err = usbd_do_request(sc->mue_udev, &req, &val); 191 if (err) { 192 DPRINTF(("%s: mue_csr_read: reg=0x%x err=%s\n", 193 sc->mue_dev.dv_xname, reg, usbd_errstr(err))); 194 return (0); 195 } 196 197 return (UGETDW(val)); 198 } 199 200 int 201 mue_csr_write(struct mue_softc *sc, uint32_t reg, uint32_t aval) 202 { 203 usb_device_request_t req; 204 usbd_status err; 205 uDWord val; 206 207 if (usbd_is_dying(sc->mue_udev)) 208 return (0); 209 210 USETDW(val, aval); 211 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 212 req.bRequest = MUE_UR_WRITEREG; 213 USETW(req.wValue, 0); 214 USETW(req.wIndex, reg); 215 USETW(req.wLength, 4); 216 217 err = usbd_do_request(sc->mue_udev, &req, &val); 218 if (err) { 219 DPRINTF(("%s: mue_csr_write: reg=0x%x err=%s\n", 220 sc->mue_dev.dv_xname, reg, usbd_errstr(err))); 221 return (-1); 222 } 223 224 return (0); 225 } 226 227 /* 228 * Get exclusive access to the MII registers. 229 */ 230 void 231 mue_lock_mii(struct mue_softc *sc) 232 { 233 sc->mue_refcnt++; 234 rw_enter_write(&sc->mue_mii_lock); 235 } 236 237 void 238 mue_unlock_mii(struct mue_softc *sc) 239 { 240 rw_exit_write(&sc->mue_mii_lock); 241 if (--sc->mue_refcnt < 0) 242 usb_detach_wakeup(&sc->mue_dev); 243 } 244 245 /* 246 * Wait for the MII to become ready. 247 */ 248 int 249 mue_mii_wait(struct mue_softc *sc) 250 { 251 int ntries; 252 253 for (ntries = 0; ntries < 100; ntries++) { 254 if (!(mue_csr_read(sc, MUE_MII_ACCESS) & MUE_MII_ACCESS_BUSY)) 255 return (0); 256 DELAY(5); 257 } 258 259 printf("%s: MII timed out\n", sc->mue_dev.dv_xname); 260 return (1); 261 } 262 263 int 264 mue_miibus_readreg(struct device *dev, int phy, int reg) 265 { 266 struct mue_softc *sc = (void *)dev; 267 uint32_t val; 268 269 if (usbd_is_dying(sc->mue_udev)) 270 return (0); 271 272 if (sc->mue_phyno != phy) 273 return (0); 274 275 mue_lock_mii(sc); 276 if (mue_mii_wait(sc) != 0) 277 return (0); 278 279 mue_csr_write(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_READ | 280 MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) | 281 MUE_MII_ACCESS_PHYADDR(phy)); 282 283 if (mue_mii_wait(sc) != 0) 284 printf("%s: MII read timed out\n", sc->mue_dev.dv_xname); 285 286 val = mue_csr_read(sc, MUE_MII_DATA); 287 mue_unlock_mii(sc); 288 return (val & 0xffff); 289 } 290 291 void 292 mue_miibus_writereg(struct device *dev, int phy, int reg, int data) 293 { 294 struct mue_softc *sc = (void *)dev; 295 296 if (usbd_is_dying(sc->mue_udev)) 297 return; 298 299 if (sc->mue_phyno != phy) 300 return; 301 302 mue_lock_mii(sc); 303 if (mue_mii_wait(sc) != 0) 304 return; 305 306 mue_csr_write(sc, MUE_MII_DATA, data); 307 mue_csr_write(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_WRITE | 308 MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) | 309 MUE_MII_ACCESS_PHYADDR(phy)); 310 311 if (mue_mii_wait(sc) != 0) 312 printf("%s: MII write timed out\n", sc->mue_dev.dv_xname); 313 314 mue_unlock_mii(sc); 315 } 316 317 void 318 mue_miibus_statchg(struct device *dev) 319 { 320 struct mue_softc *sc = (void *)dev; 321 struct mii_data *mii = GET_MII(sc); 322 struct ifnet *ifp = GET_IFP(sc); 323 uint32_t flow, threshold; 324 325 if (mii == NULL || ifp == NULL || 326 (ifp->if_flags & IFF_RUNNING) == 0) 327 return; 328 329 sc->mue_link = 0; 330 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 331 (IFM_ACTIVE | IFM_AVALID)) { 332 switch (IFM_SUBTYPE(mii->mii_media_active)) { 333 case IFM_10_T: 334 case IFM_100_TX: 335 case IFM_1000_T: 336 sc->mue_link++; 337 break; 338 default: 339 break; 340 } 341 } 342 343 /* Lost link, do nothing. */ 344 if (sc->mue_link == 0) 345 return; 346 347 if (!(sc->mue_flags & LAN7500)) { 348 if (sc->mue_udev->speed == USB_SPEED_SUPER) { 349 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) { 350 /* Disable U2 and enable U1. */ 351 MUE_CLRBIT(sc, MUE_USB_CFG1, 352 MUE_USB_CFG1_DEV_U2_INIT_EN); 353 MUE_SETBIT(sc, MUE_USB_CFG1, 354 MUE_USB_CFG1_DEV_U1_INIT_EN); 355 } else { 356 /* Enable U1 and U2. */ 357 MUE_SETBIT(sc, MUE_USB_CFG1, 358 MUE_USB_CFG1_DEV_U1_INIT_EN | 359 MUE_USB_CFG1_DEV_U2_INIT_EN); 360 } 361 } 362 } 363 364 threshold = 0; 365 flow = 0; 366 if (IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) { 367 if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) { 368 flow |= MUE_FLOW_TX_FCEN | MUE_FLOW_PAUSE_TIME; 369 370 /* XXX magic numbers come from Linux driver. */ 371 if (sc->mue_flags & LAN7500) { 372 threshold = 0x820; 373 } else { 374 threshold = 375 (sc->mue_udev->speed == USB_SPEED_SUPER) ? 376 0x817 : 0x211; 377 } 378 } 379 if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) 380 flow |= MUE_FLOW_RX_FCEN; 381 } 382 mue_csr_write(sc, (sc->mue_flags & LAN7500) ? 383 MUE_FCT_FLOW : MUE_7800_FCT_FLOW, threshold); 384 385 /* Threshold value should be set before enabling flow. */ 386 mue_csr_write(sc, MUE_FLOW, flow); 387 } 388 389 /* 390 * Set media options. 391 */ 392 int 393 mue_ifmedia_upd(struct ifnet *ifp) 394 { 395 struct mue_softc *sc = ifp->if_softc; 396 struct mii_data *mii = GET_MII(sc); 397 398 if (mii->mii_instance) { 399 struct mii_softc *miisc; 400 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 401 mii_phy_reset(miisc); 402 } 403 return (mii_mediachg(mii)); 404 } 405 406 /* 407 * Report current media status. 408 */ 409 void 410 mue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 411 { 412 struct mue_softc *sc = ifp->if_softc; 413 struct mii_data *mii = GET_MII(sc); 414 415 mii_pollstat(mii); 416 ifmr->ifm_active = mii->mii_media_active; 417 ifmr->ifm_status = mii->mii_media_status; 418 } 419 420 int 421 mue_eeprom_wait(struct mue_softc *sc) 422 { 423 uint32_t val; 424 int ntries; 425 426 for (ntries = 0; ntries < 100; ntries++) { 427 val = mue_csr_read(sc, MUE_E2P_CMD); 428 if (!(val & MUE_E2P_CMD_BUSY) || (val & MUE_E2P_CMD_TIMEOUT)) 429 return (0); 430 DELAY(5); 431 } 432 433 return (1); 434 } 435 436 uint8_t 437 mue_eeprom_getbyte(struct mue_softc *sc, int addr, uint8_t *dest) 438 { 439 uint32_t byte = 0; 440 int ntries; 441 442 for (ntries = 0; ntries < 100; ntries++) { 443 if (!(mue_csr_read(sc, MUE_E2P_CMD) & MUE_E2P_CMD_BUSY)) 444 break; 445 DELAY(5); 446 } 447 448 if (ntries == 100) { 449 printf("%s: EEPROM failed to come ready\n", 450 sc->mue_dev.dv_xname); 451 return (ETIMEDOUT); 452 } 453 454 mue_csr_write(sc, MUE_E2P_CMD, MUE_E2P_CMD_READ | MUE_E2P_CMD_BUSY | 455 (addr & MUE_E2P_CMD_ADDR_MASK)); 456 457 if (mue_eeprom_wait(sc) != 0) { 458 printf("%s: EEPROM read timed out\n", sc->mue_dev.dv_xname); 459 return (ETIMEDOUT); 460 } 461 462 byte = mue_csr_read(sc, MUE_E2P_DATA); 463 *dest = byte & 0xff; 464 465 return (0); 466 } 467 468 int 469 mue_read_eeprom(struct mue_softc *sc, caddr_t dest, int off, int cnt) 470 { 471 uint32_t val; 472 uint8_t byte = 0; 473 int i, err = 0; 474 475 /* 476 * EEPROM pins are muxed with the LED function on LAN7800 device. 477 */ 478 val = mue_csr_read(sc, MUE_HW_CFG); 479 if (sc->mue_product == USB_PRODUCT_SMC2_LAN7800) { 480 MUE_CLRBIT(sc, MUE_HW_CFG, 481 MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN); 482 } 483 484 for (i = 0; i < cnt; i++) { 485 err = mue_eeprom_getbyte(sc, off + i, &byte); 486 if (err) 487 break; 488 *(dest + i) = byte; 489 } 490 491 if (sc->mue_product == USB_PRODUCT_SMC2_LAN7800) 492 mue_csr_write(sc, MUE_HW_CFG, val); 493 494 return (err ? 1 : 0); 495 } 496 497 int 498 mue_dataport_wait(struct mue_softc *sc) 499 { 500 int ntries; 501 502 for (ntries = 0; ntries < 100; ntries++) { 503 if (mue_csr_read(sc, MUE_DP_SEL) & MUE_DP_SEL_DPRDY) 504 return (0); 505 DELAY(5); 506 } 507 508 printf("%s: dataport timed out\n", sc->mue_dev.dv_xname); 509 return (1); 510 } 511 512 void 513 mue_dataport_write(struct mue_softc *sc, uint32_t sel, uint32_t addr, 514 uint32_t cnt, uint32_t *data) 515 { 516 int i; 517 518 if (mue_dataport_wait(sc) != 0) 519 return; 520 521 mue_csr_write(sc, MUE_DP_SEL, 522 (mue_csr_read(sc, MUE_DP_SEL) & ~MUE_DP_SEL_RSEL_MASK) | sel); 523 524 for (i = 0; i < cnt; i++) { 525 mue_csr_write(sc, MUE_DP_ADDR, addr + i); 526 mue_csr_write(sc, MUE_DP_DATA, data[i]); 527 mue_csr_write(sc, MUE_DP_CMD, MUE_DP_CMD_WRITE); 528 if (mue_dataport_wait(sc) != 0) 529 return; 530 } 531 } 532 533 void 534 mue_init_ltm(struct mue_softc *sc) 535 { 536 uint8_t idx[6] = { 0 }; 537 int i; 538 539 if (mue_csr_read(sc, MUE_USB_CFG1) & MUE_USB_CFG1_LTM_ENABLE) { 540 uint8_t temp[2]; 541 542 if (mue_read_eeprom(sc, (caddr_t)&temp, MUE_EE_LTM_OFFSET, 2)) { 543 if (temp[0] != 24) 544 goto done; 545 mue_read_eeprom(sc, (caddr_t)&idx, temp[1] << 1, 24); 546 } 547 } 548 done: 549 for (i = 0; i < sizeof(idx); i++) 550 mue_csr_write(sc, MUE_LTM_INDEX(i), idx[i]); 551 } 552 553 int 554 mue_chip_init(struct mue_softc *sc) 555 { 556 uint32_t val; 557 int ntries; 558 559 if (sc->mue_flags & LAN7500) { 560 for (ntries = 0; ntries < 100; ntries++) { 561 if (mue_csr_read(sc, MUE_PMT_CTL) & MUE_PMT_CTL_READY) 562 break; 563 DELAY(1000); /* 1 msec */ 564 } 565 if (ntries == 100) { 566 printf("%s: timeout waiting for device ready\n", 567 sc->mue_dev.dv_xname); 568 return (ETIMEDOUT); 569 } 570 } 571 572 MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_LRST); 573 574 for (ntries = 0; ntries < 1000; ntries++) { 575 if (!(mue_csr_read(sc, MUE_HW_CFG) & MUE_HW_CFG_LRST)) 576 break; 577 DELAY(5); 578 } 579 if (ntries == 1000) { 580 printf("%s: timeout on lite software reset\n", 581 sc->mue_dev.dv_xname); 582 return (ETIMEDOUT); 583 } 584 585 /* Respond to the IN token with a NAK. */ 586 if (sc->mue_flags & LAN7500) 587 MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_BIR); 588 else 589 MUE_SETBIT(sc, MUE_USB_CFG0, MUE_USB_CFG0_BIR); 590 591 if (sc->mue_flags & LAN7500) { 592 mue_csr_write(sc, MUE_BURST_CAP, 593 (sc->mue_udev->speed == USB_SPEED_HIGH) ? 594 MUE_BURST_MIN_BUFSZ : MUE_BURST_MAX_BUFSZ); 595 mue_csr_write(sc, MUE_BULK_IN_DELAY, MUE_DEFAULT_BULKIN_DELAY); 596 597 MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_BCE | MUE_HW_CFG_MEF); 598 599 /* Set undocumented FIFO sizes. */ 600 mue_csr_write(sc, MUE_FCT_RX_FIFO_END, 0x27); 601 mue_csr_write(sc, MUE_FCT_TX_FIFO_END, 0x17); 602 } else { 603 /* Init LTM. */ 604 mue_init_ltm(sc); 605 606 val = (sc->mue_udev->speed == USB_SPEED_SUPER) ? 607 MUE_7800_BURST_MIN_BUFSZ : MUE_7800_BURST_MAX_BUFSZ; 608 mue_csr_write(sc, MUE_7800_BURST_CAP, val); 609 mue_csr_write(sc, MUE_7800_BULK_IN_DELAY, 610 MUE_7800_DEFAULT_BULKIN_DELAY); 611 612 MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_MEF); 613 MUE_SETBIT(sc, MUE_USB_CFG0, MUE_USB_CFG0_BCE); 614 } 615 616 mue_csr_write(sc, MUE_INT_STATUS, 0xffffffff); 617 mue_csr_write(sc, (sc->mue_flags & LAN7500) ? 618 MUE_FCT_FLOW : MUE_7800_FCT_FLOW, 0); 619 mue_csr_write(sc, MUE_FLOW, 0); 620 621 /* Reset PHY. */ 622 MUE_SETBIT(sc, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST); 623 for (ntries = 0; ntries < 100; ntries++) { 624 val = mue_csr_read(sc, MUE_PMT_CTL); 625 if (!(val & MUE_PMT_CTL_PHY_RST) && (val & MUE_PMT_CTL_READY)) 626 break; 627 DELAY(10000); 628 } 629 if (ntries == 100) { 630 printf("%s: timeout waiting for PHY reset\n", 631 sc->mue_dev.dv_xname); 632 return (ETIMEDOUT); 633 } 634 635 /* LAN7801 only has RGMII mode. */ 636 if (sc->mue_product == USB_PRODUCT_SMC2_LAN7801) 637 MUE_CLRBIT(sc, MUE_MAC_CR, MUE_MAC_CR_GMII_EN); 638 639 if (sc->mue_flags & LAN7500 || !sc->mue_eeprom_present) { 640 /* Allow MAC to detect speed and duplex from PHY. */ 641 MUE_SETBIT(sc, MUE_MAC_CR, MUE_MAC_CR_AUTO_SPEED | 642 MUE_MAC_CR_AUTO_DUPLEX); 643 } 644 645 MUE_SETBIT(sc, MUE_MAC_TX, MUE_MAC_TX_TXEN); 646 MUE_SETBIT(sc, (sc->mue_flags & LAN7500) ? 647 MUE_FCT_TX_CTL : MUE_7800_FCT_TX_CTL, MUE_FCT_TX_CTL_EN); 648 649 /* Set the maximum frame size. */ 650 MUE_CLRBIT(sc, MUE_MAC_RX, MUE_MAC_RX_RXEN); 651 MUE_SETBIT(sc, MUE_MAC_RX, MUE_MAC_RX_MAX_LEN(ETHER_MAX_LEN)); 652 MUE_SETBIT(sc, MUE_MAC_RX, MUE_MAC_RX_RXEN); 653 654 MUE_SETBIT(sc, (sc->mue_flags & LAN7500) ? 655 MUE_FCT_RX_CTL : MUE_7800_FCT_RX_CTL, MUE_FCT_RX_CTL_EN); 656 657 /* Enable LEDs. */ 658 if (sc->mue_product == USB_PRODUCT_SMC2_LAN7800 && 659 sc->mue_eeprom_present == 0) { 660 MUE_SETBIT(sc, MUE_HW_CFG, 661 MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN); 662 } 663 664 return (0); 665 } 666 667 void 668 mue_set_macaddr(struct mue_softc *sc) 669 { 670 struct ifnet *ifp = &sc->arpcom.ac_if; 671 const uint8_t *eaddr = LLADDR(ifp->if_sadl); 672 uint32_t val, reg; 673 674 reg = (sc->mue_flags & LAN7500) ? MUE_ADDR_FILTX : MUE_7800_ADDR_FILTX; 675 676 val = (eaddr[3] << 24) | (eaddr[2] << 16) | (eaddr[1] << 8) | eaddr[0]; 677 mue_csr_write(sc, MUE_RX_ADDRL, val); 678 mue_csr_write(sc, reg + 4, val); 679 val = (eaddr[5] << 8) | eaddr[4]; 680 mue_csr_write(sc, MUE_RX_ADDRH, val); 681 mue_csr_write(sc, reg, val | MUE_ADDR_FILTX_VALID); 682 } 683 684 /* 685 * Probe for a Microchip chip. 686 */ 687 int 688 mue_match(struct device *parent, void *match, void *aux) 689 { 690 struct usb_attach_arg *uaa = aux; 691 692 if (uaa->iface == NULL || uaa->configno != 1) 693 return (UMATCH_NONE); 694 695 return (mue_lookup(uaa->vendor, uaa->product) != NULL ? 696 UMATCH_VENDOR_PRODUCT_CONF_IFACE : UMATCH_NONE); 697 } 698 699 void 700 mue_attach(struct device *parent, struct device *self, void *aux) 701 { 702 struct mue_softc *sc = (struct mue_softc *)self; 703 struct usb_attach_arg *uaa = aux; 704 usb_interface_descriptor_t *id; 705 usb_endpoint_descriptor_t *ed; 706 struct mii_data *mii; 707 struct ifnet *ifp; 708 int i, s; 709 710 sc->mue_udev = uaa->device; 711 sc->mue_iface = uaa->iface; 712 sc->mue_product = uaa->product; 713 sc->mue_flags = mue_lookup(uaa->vendor, uaa->product)->mue_flags; 714 715 usb_init_task(&sc->mue_tick_task, mue_tick_task, sc, 716 USB_TASK_TYPE_GENERIC); 717 rw_init(&sc->mue_mii_lock, "muemii"); 718 usb_init_task(&sc->mue_stop_task, (void (*)(void *))mue_stop, sc, 719 USB_TASK_TYPE_GENERIC); 720 721 /* Decide on what our bufsize will be. */ 722 if (sc->mue_flags & LAN7500) 723 sc->mue_bufsz = (sc->mue_udev->speed == USB_SPEED_HIGH) ? 724 MUE_MAX_BUFSZ : MUE_MIN_BUFSZ; 725 else 726 sc->mue_bufsz = MUE_7800_BUFSZ; 727 728 /* Find endpoints. */ 729 id = usbd_get_interface_descriptor(sc->mue_iface); 730 for (i = 0; i < id->bNumEndpoints; i++) { 731 ed = usbd_interface2endpoint_descriptor(sc->mue_iface, i); 732 if (ed == NULL) { 733 printf("%s: couldn't get ep %d\n", 734 sc->mue_dev.dv_xname, i); 735 return; 736 } 737 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 738 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 739 sc->mue_ed[MUE_ENDPT_RX] = ed->bEndpointAddress; 740 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 741 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 742 sc->mue_ed[MUE_ENDPT_TX] = ed->bEndpointAddress; 743 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 744 UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) { 745 sc->mue_ed[MUE_ENDPT_INTR] = ed->bEndpointAddress; 746 } 747 } 748 749 s = splnet(); 750 751 sc->mue_phyno = 1; 752 753 /* Check if the EEPROM programmed indicator is present. */ 754 mue_read_eeprom(sc, (caddr_t)&i, MUE_EE_IND_OFFSET, 1); 755 sc->mue_eeprom_present = (i == MUE_EEPROM_INDICATOR) ? 1 : 0; 756 757 if (mue_chip_init(sc) != 0) { 758 printf("%s: chip initialization failed\n", 759 sc->mue_dev.dv_xname); 760 splx(s); 761 return; 762 } 763 764 /* Get station address from the EEPROM. */ 765 if (sc->mue_eeprom_present) { 766 if (mue_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr, 767 MUE_EE_MAC_OFFSET, ETHER_ADDR_LEN)) { 768 printf("%s: failed to read station address\n", 769 sc->mue_dev.dv_xname); 770 splx(s); 771 return; 772 } 773 } else 774 mue_enaddr_OF(sc); 775 776 /* A Microchip chip was detected. Inform the world. */ 777 printf("%s:", sc->mue_dev.dv_xname); 778 if (sc->mue_flags & LAN7500) 779 printf(" LAN7500"); 780 else 781 printf(" LAN7800"); 782 printf(", address %s\n", ether_sprintf(sc->arpcom.ac_enaddr)); 783 784 /* Initialize interface info.*/ 785 ifp = GET_IFP(sc); 786 ifp->if_softc = sc; 787 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 788 ifp->if_ioctl = mue_ioctl; 789 ifp->if_start = mue_start; 790 ifp->if_watchdog = mue_watchdog; 791 strlcpy(ifp->if_xname, sc->mue_dev.dv_xname, IFNAMSIZ); 792 793 ifp->if_capabilities = IFCAP_VLAN_MTU; 794 795 /* Initialize MII/media info. */ 796 mii = GET_MII(sc); 797 mii->mii_ifp = ifp; 798 mii->mii_readreg = mue_miibus_readreg; 799 mii->mii_writereg = mue_miibus_writereg; 800 mii->mii_statchg = mue_miibus_statchg; 801 mii->mii_flags = MIIF_AUTOTSLEEP; 802 803 ifmedia_init(&mii->mii_media, 0, mue_ifmedia_upd, mue_ifmedia_sts); 804 mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 805 MIIF_DOPAUSE); 806 807 if (LIST_FIRST(&mii->mii_phys) == NULL) { 808 ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL); 809 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE); 810 } else 811 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO); 812 813 /* Attach the interface. */ 814 if_attach(ifp); 815 ether_ifattach(ifp); 816 817 timeout_set(&sc->mue_stat_ch, mue_tick, sc); 818 819 splx(s); 820 } 821 822 int 823 mue_detach(struct device *self, int flags) 824 { 825 struct mue_softc *sc = (struct mue_softc *)self; 826 struct ifnet *ifp = GET_IFP(sc); 827 int s; 828 829 if (timeout_initialized(&sc->mue_stat_ch)) 830 timeout_del(&sc->mue_stat_ch); 831 832 if (sc->mue_ep[MUE_ENDPT_TX] != NULL) 833 usbd_abort_pipe(sc->mue_ep[MUE_ENDPT_TX]); 834 if (sc->mue_ep[MUE_ENDPT_RX] != NULL) 835 usbd_abort_pipe(sc->mue_ep[MUE_ENDPT_RX]); 836 if (sc->mue_ep[MUE_ENDPT_INTR] != NULL) 837 usbd_abort_pipe(sc->mue_ep[MUE_ENDPT_INTR]); 838 839 /* 840 * Remove any pending tasks. They cannot be executing because they run 841 * in the same thread as detach. 842 */ 843 usb_rem_task(sc->mue_udev, &sc->mue_tick_task); 844 usb_rem_task(sc->mue_udev, &sc->mue_stop_task); 845 846 s = splusb(); 847 848 if (--sc->mue_refcnt >= 0) { 849 /* Wait for processes to go away */ 850 usb_detach_wait(&sc->mue_dev); 851 } 852 853 if (ifp->if_flags & IFF_RUNNING) 854 mue_stop(sc); 855 856 mii_detach(&sc->mue_mii, MII_PHY_ANY, MII_OFFSET_ANY); 857 ifmedia_delete_instance(&sc->mue_mii.mii_media, IFM_INST_ANY); 858 if (ifp->if_softc != NULL) { 859 ether_ifdetach(ifp); 860 if_detach(ifp); 861 } 862 863 splx(s); 864 865 return (0); 866 } 867 868 int 869 mue_rx_list_init(struct mue_softc *sc) 870 { 871 struct mue_cdata *cd; 872 struct mue_chain *c; 873 int i; 874 875 DPRINTF(("%s: %s: enter\n", sc->mue_dev.dv_xname, __func__)); 876 877 cd = &sc->mue_cdata; 878 for (i = 0; i < MUE_RX_LIST_CNT; i++) { 879 c = &cd->mue_rx_chain[i]; 880 c->mue_sc = sc; 881 c->mue_idx = i; 882 c->mue_mbuf = NULL; 883 if (c->mue_xfer == NULL) { 884 c->mue_xfer = usbd_alloc_xfer(sc->mue_udev); 885 if (c->mue_xfer == NULL) 886 return (ENOBUFS); 887 c->mue_buf = usbd_alloc_buffer(c->mue_xfer, 888 sc->mue_bufsz); 889 if (c->mue_buf == NULL) { 890 usbd_free_xfer(c->mue_xfer); 891 return (ENOBUFS); 892 } 893 } 894 } 895 896 return (0); 897 } 898 899 int 900 mue_tx_list_init(struct mue_softc *sc) 901 { 902 struct mue_cdata *cd; 903 struct mue_chain *c; 904 int i; 905 906 DPRINTF(("%s: %s: enter\n", sc->mue_dev.dv_xname, __func__)); 907 908 cd = &sc->mue_cdata; 909 for (i = 0; i < MUE_TX_LIST_CNT; i++) { 910 c = &cd->mue_tx_chain[i]; 911 c->mue_sc = sc; 912 c->mue_idx = i; 913 c->mue_mbuf = NULL; 914 if (c->mue_xfer == NULL) { 915 c->mue_xfer = usbd_alloc_xfer(sc->mue_udev); 916 if (c->mue_xfer == NULL) 917 return (ENOBUFS); 918 c->mue_buf = usbd_alloc_buffer(c->mue_xfer, 919 sc->mue_bufsz); 920 if (c->mue_buf == NULL) { 921 usbd_free_xfer(c->mue_xfer); 922 return (ENOBUFS); 923 } 924 } 925 } 926 927 return (0); 928 } 929 930 int 931 mue_open_pipes(struct mue_softc *sc) 932 { 933 struct mue_chain *c; 934 usbd_status err; 935 int i; 936 937 /* Open RX and TX pipes. */ 938 err = usbd_open_pipe(sc->mue_iface, sc->mue_ed[MUE_ENDPT_RX], 939 USBD_EXCLUSIVE_USE, &sc->mue_ep[MUE_ENDPT_RX]); 940 if (err) { 941 printf("%s: open rx pipe failed: %s\n", 942 sc->mue_dev.dv_xname, usbd_errstr(err)); 943 return (EIO); 944 } 945 err = usbd_open_pipe(sc->mue_iface, sc->mue_ed[MUE_ENDPT_TX], 946 USBD_EXCLUSIVE_USE, &sc->mue_ep[MUE_ENDPT_TX]); 947 if (err) { 948 printf("%s: open tx pipe failed: %s\n", 949 sc->mue_dev.dv_xname, usbd_errstr(err)); 950 return (EIO); 951 } 952 953 /* Start up the receive pipe. */ 954 for (i = 0; i < MUE_RX_LIST_CNT; i++) { 955 c = &sc->mue_cdata.mue_rx_chain[i]; 956 usbd_setup_xfer(c->mue_xfer, sc->mue_ep[MUE_ENDPT_RX], 957 c, c->mue_buf, sc->mue_bufsz, 958 USBD_SHORT_XFER_OK | USBD_NO_COPY, USBD_NO_TIMEOUT, 959 mue_rxeof); 960 usbd_transfer(c->mue_xfer); 961 } 962 963 return (0); 964 } 965 966 int 967 mue_encap(struct mue_softc *sc, struct mbuf *m, int idx) 968 { 969 struct mue_chain *c; 970 usbd_status err; 971 struct mue_txbuf_hdr hdr; 972 int length; 973 974 c = &sc->mue_cdata.mue_tx_chain[idx]; 975 976 hdr.tx_cmd_a = htole32((m->m_pkthdr.len & MUE_TX_CMD_A_LEN_MASK) | 977 MUE_TX_CMD_A_FCS); 978 /* Disable segmentation offload. */ 979 hdr.tx_cmd_b = htole32(0); 980 memcpy(c->mue_buf, &hdr, sizeof(hdr)); 981 length = sizeof(hdr); 982 983 m_copydata(m, 0, m->m_pkthdr.len, c->mue_buf + length); 984 length += m->m_pkthdr.len; 985 986 c->mue_mbuf = m; 987 988 usbd_setup_xfer(c->mue_xfer, sc->mue_ep[MUE_ENDPT_TX], 989 c, c->mue_buf, length, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, 990 10000, mue_txeof); 991 992 /* Transmit */ 993 err = usbd_transfer(c->mue_xfer); 994 if (err != USBD_IN_PROGRESS) { 995 c->mue_mbuf = NULL; 996 mue_stop(sc); 997 return(EIO); 998 } 999 1000 sc->mue_cdata.mue_tx_cnt++; 1001 1002 return(0); 1003 } 1004 1005 void 1006 mue_iff(struct mue_softc *sc) 1007 { 1008 struct ifnet *ifp = GET_IFP(sc); 1009 struct arpcom *ac = &sc->arpcom; 1010 struct ether_multi *enm; 1011 struct ether_multistep step; 1012 uint32_t h = 0, hashtbl[MUE_DP_SEL_VHF_HASH_LEN], reg, rxfilt; 1013 1014 if (usbd_is_dying(sc->mue_udev)) 1015 return; 1016 1017 reg = (sc->mue_flags & LAN7500) ? MUE_RFE_CTL : MUE_7800_RFE_CTL; 1018 rxfilt = mue_csr_read(sc, reg); 1019 rxfilt &= ~(MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH | 1020 MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST); 1021 memset(hashtbl, 0, sizeof(hashtbl)); 1022 ifp->if_flags &= ~IFF_ALLMULTI; 1023 1024 /* Always accept broadcast frames. */ 1025 rxfilt |= MUE_RFE_CTL_BROADCAST; 1026 1027 if (ifp->if_flags & IFF_PROMISC || ac->ac_multirangecnt > 0) { 1028 ifp->if_flags |= IFF_ALLMULTI; 1029 rxfilt |= MUE_RFE_CTL_MULTICAST; 1030 if (ifp->if_flags & IFF_PROMISC) 1031 rxfilt |= MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST; 1032 } else { 1033 rxfilt |= MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH; 1034 1035 /* Now program new ones. */ 1036 ETHER_FIRST_MULTI(step, ac, enm); 1037 while (enm != NULL) { 1038 h = ether_crc32_be(enm->enm_addrlo, 1039 ETHER_ADDR_LEN) >> 23; 1040 hashtbl[h / 32] |= 1 << (h % 32); 1041 ETHER_NEXT_MULTI(step, enm); 1042 } 1043 } 1044 1045 mue_dataport_write(sc, MUE_DP_SEL_VHF, MUE_DP_SEL_VHF_VLAN_LEN, 1046 MUE_DP_SEL_VHF_HASH_LEN, hashtbl); 1047 mue_csr_write(sc, reg, rxfilt); 1048 } 1049 1050 void 1051 mue_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 1052 { 1053 struct mue_chain *c = (struct mue_chain *)priv; 1054 struct mue_softc *sc = c->mue_sc; 1055 struct ifnet *ifp = GET_IFP(sc); 1056 struct mbuf_list ml = MBUF_LIST_INITIALIZER(); 1057 struct mbuf *m; 1058 struct mue_rxbuf_hdr hdr; 1059 u_char *buf = c->mue_buf; 1060 uint32_t total_len; 1061 int pktlen = 0; 1062 int s; 1063 1064 if (usbd_is_dying(sc->mue_udev)) 1065 return; 1066 1067 if (!(ifp->if_flags & IFF_RUNNING)) 1068 return; 1069 1070 if (status != USBD_NORMAL_COMPLETION) { 1071 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 1072 return; 1073 if (usbd_ratecheck(&sc->mue_rx_notice)) { 1074 printf("%s: usb errors on rx: %s\n", 1075 sc->mue_dev.dv_xname, usbd_errstr(status)); 1076 } 1077 if (status == USBD_STALLED) 1078 usbd_clear_endpoint_stall_async(sc->mue_ep[MUE_ENDPT_RX]); 1079 goto done; 1080 } 1081 1082 usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL); 1083 1084 do { 1085 if (total_len < sizeof(hdr)) { 1086 ifp->if_ierrors++; 1087 goto done; 1088 } 1089 1090 buf += pktlen; 1091 1092 memcpy(&hdr, buf, sizeof(hdr)); 1093 total_len -= sizeof(hdr); 1094 1095 if (letoh32(hdr.rx_cmd_a) & MUE_RX_CMD_A_RED) { 1096 ifp->if_ierrors++; 1097 goto done; 1098 } 1099 1100 pktlen = letoh32(hdr.rx_cmd_a) & MUE_RX_CMD_A_LEN_MASK; 1101 if (sc->mue_flags & LAN7500) 1102 pktlen -= 2; 1103 1104 if (pktlen > total_len) { 1105 ifp->if_ierrors++; 1106 goto done; 1107 } 1108 1109 buf += sizeof(hdr); 1110 1111 if (total_len < pktlen) 1112 total_len = 0; 1113 else 1114 total_len -= pktlen; 1115 1116 m = m_devget(buf, pktlen - ETHER_CRC_LEN, ETHER_ALIGN); 1117 if (m == NULL) { 1118 DPRINTF(("unable to allocate mbuf for next packet\n")); 1119 ifp->if_ierrors++; 1120 goto done; 1121 } 1122 ml_enqueue(&ml, m); 1123 } while (total_len > 0); 1124 1125 done: 1126 s = splnet(); 1127 if_input(ifp, &ml); 1128 splx(s); 1129 1130 memset(c->mue_buf, 0, sc->mue_bufsz); 1131 1132 /* Setup new transfer. */ 1133 usbd_setup_xfer(xfer, sc->mue_ep[MUE_ENDPT_RX], 1134 c, c->mue_buf, sc->mue_bufsz, USBD_SHORT_XFER_OK | USBD_NO_COPY, 1135 USBD_NO_TIMEOUT, mue_rxeof); 1136 usbd_transfer(xfer); 1137 1138 DPRINTFN(10,("%s: %s: start rx\n", sc->mue_dev.dv_xname, __func__)); 1139 } 1140 1141 void 1142 mue_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 1143 { 1144 struct mue_chain *c = priv; 1145 struct mue_softc *sc = c->mue_sc; 1146 struct ifnet *ifp = GET_IFP(sc); 1147 int s; 1148 1149 if (usbd_is_dying(sc->mue_udev)) 1150 return; 1151 1152 s = splnet(); 1153 1154 DPRINTFN(10,("%s: %s: enter status=%d\n", sc->mue_dev.dv_xname, 1155 __func__, status)); 1156 1157 if (status != USBD_NORMAL_COMPLETION) { 1158 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) { 1159 splx(s); 1160 return; 1161 } 1162 ifp->if_oerrors++; 1163 printf("%s: usb error on tx: %s\n", sc->mue_dev.dv_xname, 1164 usbd_errstr(status)); 1165 if (status == USBD_STALLED) 1166 usbd_clear_endpoint_stall_async(sc->mue_ep[MUE_ENDPT_TX]); 1167 splx(s); 1168 return; 1169 } 1170 1171 ifp->if_timer = 0; 1172 ifq_clr_oactive(&ifp->if_snd); 1173 1174 m_freem(c->mue_mbuf); 1175 c->mue_mbuf = NULL; 1176 1177 if (ifq_empty(&ifp->if_snd) == 0) 1178 mue_start(ifp); 1179 1180 splx(s); 1181 } 1182 1183 void 1184 mue_init(void *xsc) 1185 { 1186 struct mue_softc *sc = xsc; 1187 struct ifnet *ifp = GET_IFP(sc); 1188 int s; 1189 1190 s = splnet(); 1191 1192 /* Cancel pending I/O and free all TX/RX buffers. */ 1193 mue_reset(sc); 1194 1195 /* Set MAC address. */ 1196 mue_set_macaddr(sc); 1197 1198 /* Init RX ring. */ 1199 if (mue_rx_list_init(sc) == ENOBUFS) { 1200 printf("%s: rx list init failed\n", sc->mue_dev.dv_xname); 1201 splx(s); 1202 return; 1203 } 1204 1205 /* Init TX ring. */ 1206 if (mue_tx_list_init(sc) == ENOBUFS) { 1207 printf("%s: tx list init failed\n", sc->mue_dev.dv_xname); 1208 splx(s); 1209 return; 1210 } 1211 1212 /* Program promiscuous mode and multicast filters. */ 1213 mue_iff(sc); 1214 1215 if (mue_open_pipes(sc) != 0) { 1216 splx(s); 1217 return; 1218 } 1219 1220 sc->mue_link = 0; 1221 ifp->if_flags |= IFF_RUNNING; 1222 ifq_clr_oactive(&ifp->if_snd); 1223 1224 splx(s); 1225 1226 timeout_add_sec(&sc->mue_stat_ch, 1); 1227 } 1228 1229 int 1230 mue_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1231 { 1232 struct mue_softc *sc = ifp->if_softc; 1233 struct ifreq *ifr = (struct ifreq *)data; 1234 int s, error = 0; 1235 1236 s = splnet(); 1237 1238 switch(cmd) { 1239 case SIOCSIFADDR: 1240 ifp->if_flags |= IFF_UP; 1241 if (!(ifp->if_flags & IFF_RUNNING)) 1242 mue_init(sc); 1243 break; 1244 case SIOCSIFFLAGS: 1245 if (ifp->if_flags & IFF_UP) { 1246 if (ifp->if_flags & IFF_RUNNING) 1247 error = ENETRESET; 1248 else 1249 mue_init(sc); 1250 } else { 1251 if (ifp->if_flags & IFF_RUNNING) 1252 mue_stop(sc); 1253 } 1254 break; 1255 case SIOCGIFMEDIA: 1256 case SIOCSIFMEDIA: 1257 error = ifmedia_ioctl(ifp, ifr, &sc->mue_mii.mii_media, cmd); 1258 break; 1259 default: 1260 error = ether_ioctl(ifp, &sc->arpcom, cmd, data); 1261 } 1262 1263 if (error == ENETRESET) { 1264 if (ifp->if_flags & IFF_RUNNING) 1265 mue_iff(sc); 1266 error = 0; 1267 } 1268 1269 splx(s); 1270 1271 return(error); 1272 } 1273 1274 void 1275 mue_watchdog(struct ifnet *ifp) 1276 { 1277 struct mue_softc *sc = ifp->if_softc; 1278 struct mue_chain *c; 1279 usbd_status stat; 1280 int s; 1281 1282 ifp->if_oerrors++; 1283 printf("%s: watchdog timeout\n", sc->mue_dev.dv_xname); 1284 1285 s = splusb(); 1286 c = &sc->mue_cdata.mue_tx_chain[0]; 1287 usbd_get_xfer_status(c->mue_xfer, NULL, NULL, NULL, &stat); 1288 mue_txeof(c->mue_xfer, c, stat); 1289 1290 if (!ifq_empty(&ifp->if_snd)) 1291 mue_start(ifp); 1292 splx(s); 1293 } 1294 1295 void 1296 mue_reset(struct mue_softc *sc) 1297 { 1298 if (usbd_is_dying(sc->mue_udev)) 1299 return; 1300 1301 /* Wait a little while for the chip to get its brains in order. */ 1302 DELAY(1000); 1303 } 1304 1305 void 1306 mue_start(struct ifnet *ifp) 1307 { 1308 struct mue_softc *sc = ifp->if_softc; 1309 struct mbuf *m_head = NULL; 1310 1311 if (!sc->mue_link) 1312 return; 1313 1314 if (ifq_is_oactive(&ifp->if_snd)) 1315 return; 1316 1317 m_head = ifq_dequeue(&ifp->if_snd); 1318 if (m_head == NULL) 1319 return; 1320 1321 if (mue_encap(sc, m_head, 0)) { 1322 m_freem(m_head); 1323 ifq_set_oactive(&ifp->if_snd); 1324 return; 1325 } 1326 1327 /* If there's a BPF listener, bounce a copy of this frame to him. */ 1328 #if NBPFILTER > 0 1329 if (ifp->if_bpf) 1330 bpf_mtap(ifp->if_bpf, m_head, BPF_DIRECTION_OUT); 1331 #endif 1332 1333 ifq_set_oactive(&ifp->if_snd); 1334 1335 /* Set a timeout in case the chip goes out to lunch. */ 1336 ifp->if_timer = 5; 1337 } 1338 1339 void 1340 mue_stop(struct mue_softc *sc) 1341 { 1342 struct ifnet *ifp; 1343 usbd_status err; 1344 int i; 1345 1346 ifp = GET_IFP(sc); 1347 ifp->if_timer = 0; 1348 ifp->if_flags &= ~IFF_RUNNING; 1349 ifq_clr_oactive(&ifp->if_snd); 1350 1351 timeout_del(&sc->mue_stat_ch); 1352 1353 /* Stop transfers. */ 1354 if (sc->mue_ep[MUE_ENDPT_RX] != NULL) { 1355 err = usbd_close_pipe(sc->mue_ep[MUE_ENDPT_RX]); 1356 if (err) { 1357 printf("%s: close rx pipe failed: %s\n", 1358 sc->mue_dev.dv_xname, usbd_errstr(err)); 1359 } 1360 sc->mue_ep[MUE_ENDPT_RX] = NULL; 1361 } 1362 1363 if (sc->mue_ep[MUE_ENDPT_TX] != NULL) { 1364 err = usbd_close_pipe(sc->mue_ep[MUE_ENDPT_TX]); 1365 if (err) { 1366 printf("%s: close tx pipe failed: %s\n", 1367 sc->mue_dev.dv_xname, usbd_errstr(err)); 1368 } 1369 sc->mue_ep[MUE_ENDPT_TX] = NULL; 1370 } 1371 1372 if (sc->mue_ep[MUE_ENDPT_INTR] != NULL) { 1373 err = usbd_close_pipe(sc->mue_ep[MUE_ENDPT_INTR]); 1374 if (err) { 1375 printf("%s: close intr pipe failed: %s\n", 1376 sc->mue_dev.dv_xname, usbd_errstr(err)); 1377 } 1378 sc->mue_ep[MUE_ENDPT_INTR] = NULL; 1379 } 1380 1381 /* Free RX resources. */ 1382 for (i = 0; i < MUE_RX_LIST_CNT; i++) { 1383 if (sc->mue_cdata.mue_rx_chain[i].mue_mbuf != NULL) { 1384 m_freem(sc->mue_cdata.mue_rx_chain[i].mue_mbuf); 1385 sc->mue_cdata.mue_rx_chain[i].mue_mbuf = NULL; 1386 } 1387 if (sc->mue_cdata.mue_rx_chain[i].mue_xfer != NULL) { 1388 usbd_free_xfer(sc->mue_cdata.mue_rx_chain[i].mue_xfer); 1389 sc->mue_cdata.mue_rx_chain[i].mue_xfer = NULL; 1390 } 1391 } 1392 1393 /* Free TX resources. */ 1394 for (i = 0; i < MUE_TX_LIST_CNT; i++) { 1395 if (sc->mue_cdata.mue_tx_chain[i].mue_mbuf != NULL) { 1396 m_freem(sc->mue_cdata.mue_tx_chain[i].mue_mbuf); 1397 sc->mue_cdata.mue_tx_chain[i].mue_mbuf = NULL; 1398 } 1399 if (sc->mue_cdata.mue_tx_chain[i].mue_xfer != NULL) { 1400 usbd_free_xfer(sc->mue_cdata.mue_tx_chain[i].mue_xfer); 1401 sc->mue_cdata.mue_tx_chain[i].mue_xfer = NULL; 1402 } 1403 } 1404 1405 sc->mue_link = 0; 1406 } 1407 1408 void 1409 mue_tick(void *xsc) 1410 { 1411 struct mue_softc *sc = xsc; 1412 1413 if (sc == NULL) 1414 return; 1415 1416 if (usbd_is_dying(sc->mue_udev)) 1417 return; 1418 1419 /* Perform periodic stuff in process context. */ 1420 usb_add_task(sc->mue_udev, &sc->mue_tick_task); 1421 } 1422 1423 void 1424 mue_tick_task(void *xsc) 1425 { 1426 struct mue_softc *sc =xsc; 1427 struct mii_data *mii; 1428 int s; 1429 1430 if (sc == NULL) 1431 return; 1432 1433 if (usbd_is_dying(sc->mue_udev)) 1434 return; 1435 1436 mii = GET_MII(sc); 1437 1438 s = splnet(); 1439 mii_tick(mii); 1440 if (sc->mue_link == 0) 1441 mue_miibus_statchg(&sc->mue_dev); 1442 timeout_add_sec(&sc->mue_stat_ch, 1); 1443 splx(s); 1444 } 1445