1 /* @(#)i386.c 6.3 (Berkeley) 03/16/91 2 3 Modified for Berkeley Unix by Donn Seeley, donn@okeeffe.berkeley.edu */ 4 5 /* i386.c -- Assemble code for the Intel 80386 6 Copyright (C) 1989, Free Software Foundation. 7 8 This file is part of GAS, the GNU Assembler. 9 10 GAS is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 1, or (at your option) 13 any later version. 14 15 GAS is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with GAS; see the file COPYING. If not, write to 22 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 23 24 /* 25 Intel 80386 machine specific gas. 26 Written by Eliot Dresselhaus (eliot@mgm.mit.edu). 27 Bugs & suggestions are completely welcome. This is free software. 28 Please help us make it better. 29 */ 30 31 #include <stdio.h> 32 #include <varargs.h> 33 #include <ctype.h> 34 35 #ifdef __GNUC__ 36 #define alloca __builtin_alloca 37 #else 38 extern char *alloca(); 39 #endif 40 #ifdef USG 41 #define index strchr 42 #endif 43 44 #include "as.h" 45 #include "read.h" 46 #include "flonum.h" 47 #include "obstack.h" 48 #include "frags.h" 49 #include "struc-symbol.h" 50 #include "expr.h" 51 #include "symbols.h" 52 #include "hash.h" 53 #include "md.h" 54 #include "i386.h" 55 #include "i386-opcode.h" 56 57 long omagic = OMAGIC; 58 char FLT_CHARS[] = "fFdDxX"; 59 char EXP_CHARS[] = "eE"; 60 char line_comment_chars[] = "#"; 61 char comment_chars[] = "#"; 62 63 /* tables for lexical analysis */ 64 static char opcode_chars[256]; 65 static char register_chars[256]; 66 static char operand_chars[256]; 67 static char space_chars[256]; 68 static char identifier_chars[256]; 69 static char digit_chars[256]; 70 71 /* lexical macros */ 72 #define is_opcode_char(x) (opcode_chars[(unsigned char) x]) 73 #define is_operand_char(x) (operand_chars[(unsigned char) x]) 74 #define is_register_char(x) (register_chars[(unsigned char) x]) 75 #define is_space_char(x) (space_chars[(unsigned char) x]) 76 #define is_identifier_char(x) (identifier_chars[(unsigned char) x]) 77 #define is_digit_char(x) (digit_chars[(unsigned char) x]) 78 79 /* put here all non-digit non-letter charcters that may occur in an operand */ 80 static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:"; 81 82 static char *ordinal_names[] = { "first", "second", "third" }; /* for printfs */ 83 84 /* md_assemble() always leaves the strings it's passed unaltered. To 85 effect this we maintain a stack of saved characters that we've smashed 86 with '\0's (indicating end of strings for various sub-fields of the 87 assembler instruction). */ 88 static char save_stack[32]; 89 static char *save_stack_p; /* stack pointer */ 90 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0' 91 #define RESTORE_END_STRING(s) *s = *--save_stack_p 92 93 /* The instruction we're assembling. */ 94 static i386_insn i; 95 96 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */ 97 static expressionS disp_expressions[2], im_expressions[2]; 98 99 /* pointers to ebp & esp entries in reg_hash hash table */ 100 static reg_entry *ebp, *esp; 101 102 static int this_operand; /* current operand we are working on */ 103 104 /* 105 Interface to relax_segment. 106 There are 2 relax states for 386 jump insns: one for conditional & one 107 for unconditional jumps. This is because the these two types of jumps 108 add different sizes to frags when we're figuring out what sort of jump 109 to choose to reach a given label. */ 110 111 /* types */ 112 #define COND_JUMP 1 /* conditional jump */ 113 #define UNCOND_JUMP 2 /* unconditional jump */ 114 /* sizes */ 115 #define BYTE 0 116 #define WORD 1 117 #define DWORD 2 118 #define UNKNOWN_SIZE 3 119 120 #define ENCODE_RELAX_STATE(type,size) ((type<<2) | (size)) 121 #define SIZE_FROM_RELAX_STATE(s) \ 122 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) ) 123 124 const relax_typeS md_relax_table[] = { 125 /* 126 The fields are: 127 1) most positive reach of this state, 128 2) most negative reach of this state, 129 3) how many bytes this mode will add to the size of the current frag 130 4) which index into the table to try if we can't fit into this one. 131 */ 132 {1, 1, 0, 0}, 133 {1, 1, 0, 0}, 134 {1, 1, 0, 0}, 135 {1, 1, 0, 0}, 136 137 /* For now we don't use word displacement jumps: they may be 138 untrustworthy. */ 139 {127+1, -128+1, 0, ENCODE_RELAX_STATE(COND_JUMP,DWORD) }, 140 /* word conditionals add 3 bytes to frag: 141 2 opcode prefix; 1 displacement bytes */ 142 {32767+2, -32768+2, 3, ENCODE_RELAX_STATE(COND_JUMP,DWORD) }, 143 /* dword conditionals adds 4 bytes to frag: 144 1 opcode prefix; 3 displacement bytes */ 145 {0, 0, 4, 0}, 146 {1, 1, 0, 0}, 147 148 {127+1, -128+1, 0, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) }, 149 /* word jmp adds 2 bytes to frag: 150 1 opcode prefix; 1 displacement bytes */ 151 {32767+2, -32768+2, 2, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) }, 152 /* dword jmp adds 3 bytes to frag: 153 0 opcode prefix; 3 displacement bytes */ 154 {0, 0, 3, 0}, 155 {1, 1, 0, 0}, 156 157 }; 158 159 void float_cons (), cons (); 160 161 /* Ignore certain directives generated by gcc. This probably should 162 not be here. */ 163 void dummy () 164 { 165 while (*input_line_pointer && *input_line_pointer != '\n') 166 input_line_pointer++; 167 } 168 169 const pseudo_typeS md_pseudo_table[] = { 170 { "ffloat", float_cons, 'f' }, 171 { "dfloat", float_cons, 'd' }, 172 { "tfloat", float_cons, 'x' }, 173 { "value", cons, 2 }, 174 { "ident", dummy, 0 }, /* ignore these directives */ 175 { "def", dummy, 0 }, 176 { "optim", dummy, 0 }, /* For sun386i cc */ 177 { "version", dummy, 0 }, 178 { "ln", dummy, 0 }, 179 { 0, 0, 0 } 180 }; 181 182 /* for interface with expression () */ 183 extern char * input_line_pointer; 184 char * index (); 185 186 char * output_invalid (); 187 reg_entry * parse_register (); 188 189 /* obstack for constructing various things in md_begin */ 190 struct obstack o; 191 192 /* hash table for opcode lookup */ 193 static struct hash_control *op_hash = (struct hash_control *) 0; 194 /* hash table for register lookup */ 195 static struct hash_control *reg_hash = (struct hash_control *) 0; 196 /* hash table for prefix lookup */ 197 static struct hash_control *prefix_hash = (struct hash_control *) 0; 198 199 200 void md_begin () 201 { 202 char * hash_err; 203 204 obstack_begin (&o,4096); 205 206 /* initialize op_hash hash table */ 207 op_hash = hash_new(); /* xmalloc handles error */ 208 209 { 210 register template *optab; 211 register templates *core_optab; 212 char *prev_name; 213 214 optab = i386_optab; /* setup for loop */ 215 prev_name = optab->name; 216 obstack_grow (&o, optab, sizeof(template)); 217 core_optab = (templates *) xmalloc (sizeof (templates)); 218 219 for (optab++; optab < i386_optab_end; optab++) { 220 if (! strcmp (optab->name, prev_name)) { 221 /* same name as before --> append to current template list */ 222 obstack_grow (&o, optab, sizeof(template)); 223 } else { 224 /* different name --> ship out current template list; 225 add to hash table; & begin anew */ 226 /* Note: end must be set before start! since obstack_next_free changes 227 upon opstack_finish */ 228 core_optab->end = (template *) obstack_next_free(&o); 229 core_optab->start = (template *) obstack_finish(&o); 230 hash_err = hash_insert (op_hash, prev_name, (char *) core_optab); 231 if (hash_err && *hash_err) { 232 hash_error: 233 as_fatal("Internal Error: Can't hash %s: %s",prev_name, hash_err); 234 } 235 prev_name = optab->name; 236 core_optab = (templates *) xmalloc (sizeof(templates)); 237 obstack_grow (&o, optab, sizeof(template)); 238 } 239 } 240 } 241 242 /* initialize reg_hash hash table */ 243 reg_hash = hash_new(); 244 { 245 register reg_entry *regtab; 246 247 for (regtab = i386_regtab; regtab < i386_regtab_end; regtab++) { 248 hash_err = hash_insert (reg_hash, regtab->reg_name, regtab); 249 if (hash_err && *hash_err) goto hash_error; 250 } 251 } 252 253 esp = (reg_entry *) hash_find (reg_hash, "esp"); 254 ebp = (reg_entry *) hash_find (reg_hash, "ebp"); 255 256 /* initialize reg_hash hash table */ 257 prefix_hash = hash_new(); 258 { 259 register prefix_entry *prefixtab; 260 261 for (prefixtab = i386_prefixtab; 262 prefixtab < i386_prefixtab_end; prefixtab++) { 263 hash_err = hash_insert (prefix_hash, prefixtab->prefix_name, prefixtab); 264 if (hash_err && *hash_err) goto hash_error; 265 } 266 } 267 268 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */ 269 { 270 register unsigned int c; 271 272 bzero (opcode_chars, sizeof(opcode_chars)); 273 bzero (operand_chars, sizeof(operand_chars)); 274 bzero (space_chars, sizeof(space_chars)); 275 bzero (identifier_chars, sizeof(identifier_chars)); 276 bzero (digit_chars, sizeof(digit_chars)); 277 278 for (c = 0; c < 256; c++) { 279 if (islower(c) || isdigit(c)) { 280 opcode_chars[c] = c; 281 register_chars[c] = c; 282 } else if (isupper(c)) { 283 opcode_chars[c] = tolower(c); 284 register_chars[c] = opcode_chars[c]; 285 } else if (c == PREFIX_SEPERATOR) { 286 opcode_chars[c] = c; 287 } else if (c == ')' || c == '(') { 288 register_chars[c] = c; 289 } 290 291 if (isupper(c) || islower(c) || isdigit(c)) 292 operand_chars[c] = c; 293 else if (c && index(operand_special_chars, c)) 294 operand_chars[c] = c; 295 296 if (isdigit(c) || c == '-') digit_chars[c] = c; 297 298 if (isalpha(c) || c == '_' || c == '.' || isdigit(c)) 299 identifier_chars[c] = c; 300 301 if (c == ' ' || c == '\t') space_chars[c] = c; 302 } 303 } 304 } 305 306 void md_end() {} /* not much to do here. */ 307 308 309 #ifdef DEBUG386 310 311 /* debugging routines for md_assemble */ 312 static void pi (), pte (), pt (), pe (), ps (); 313 314 static void pi (line, x) 315 char * line; 316 i386_insn *x; 317 { 318 register template *p; 319 int i; 320 321 fprintf (stdout, "%s: template ", line); 322 pte (&x->tm); 323 fprintf (stdout, " modrm: mode %x reg %x reg/mem %x", 324 x->rm.mode, x->rm.reg, x->rm.regmem); 325 fprintf (stdout, " base %x index %x scale %x\n", 326 x->bi.base, x->bi.index, x->bi.scale); 327 for (i = 0; i < x->operands; i++) { 328 fprintf (stdout, " #%d: ", i+1); 329 pt (x->types[i]); 330 fprintf (stdout, "\n"); 331 if (x->types[i] & Reg) fprintf (stdout, "%s\n", x->regs[i]->reg_name); 332 if (x->types[i] & Imm) pe (x->imms[i]); 333 if (x->types[i] & (Disp|Abs)) pe (x->disps[i]); 334 } 335 } 336 337 static void pte (t) 338 template *t; 339 { 340 int i; 341 fprintf (stdout, " %d operands ", t->operands); 342 fprintf (stdout, "opcode %x ", 343 t->base_opcode); 344 if (t->extension_opcode != None) 345 fprintf (stdout, "ext %x ", t->extension_opcode); 346 if (t->opcode_modifier&D) 347 fprintf (stdout, "D"); 348 if (t->opcode_modifier&W) 349 fprintf (stdout, "W"); 350 fprintf (stdout, "\n"); 351 for (i = 0; i < t->operands; i++) { 352 fprintf (stdout, " #%d type ", i+1); 353 pt (t->operand_types[i]); 354 fprintf (stdout, "\n"); 355 } 356 } 357 358 char *seg_names[] = { 359 "SEG_ABSOLUTE", "SEG_TEXT", "SEG_DATA", "SEG_BSS", "SEG_UNKNOWN", 360 "SEG_NONE", "SEG_PASS1", "SEG_GOOF", "SEG_BIG", "SEG_DIFFERENCE" }; 361 362 static void pe (e) 363 expressionS *e; 364 { 365 fprintf (stdout, " segment %s\n", seg_names[(int) e->X_seg]); 366 fprintf (stdout, " add_number %d (%x)\n", 367 e->X_add_number, e->X_add_number); 368 if (e->X_add_symbol) { 369 fprintf (stdout, " add_symbol "); 370 ps (e->X_add_symbol); 371 fprintf (stdout, "\n"); 372 } 373 if (e->X_subtract_symbol) { 374 fprintf (stdout, " sub_symbol "); 375 ps (e->X_subtract_symbol); 376 fprintf (stdout, "\n"); 377 } 378 } 379 380 #define SYMBOL_TYPE(t) \ 381 (((t&N_TYPE) == N_UNDF) ? "UNDEFINED" : \ 382 (((t&N_TYPE) == N_ABS) ? "ABSOLUTE" : \ 383 (((t&N_TYPE) == N_TEXT) ? "TEXT" : \ 384 (((t&N_TYPE) == N_DATA) ? "DATA" : \ 385 (((t&N_TYPE) == N_BSS) ? "BSS" : "Bad n_type!"))))) 386 387 static void ps (s) 388 symbolS *s; 389 { 390 fprintf (stdout, "%s type %s%s", 391 s->sy_nlist.n_un.n_name, 392 (s->sy_nlist.n_type&N_EXT) ? "EXTERNAL " : "", 393 SYMBOL_TYPE (s->sy_nlist.n_type)); 394 } 395 396 struct type_name { 397 uint mask; 398 char *tname; 399 } type_names[] = { 400 { Reg8, "r8" }, { Reg16, "r16" }, { Reg32, "r32" }, { Imm8, "i8" }, 401 { Imm8S, "i8s" }, 402 { Imm16, "i16" }, { Imm32, "i32" }, { Mem8, "Mem8"}, { Mem16, "Mem16"}, 403 { Mem32, "Mem32"}, { BaseIndex, "BaseIndex" }, 404 { Abs8, "Abs8" }, { Abs16, "Abs16" }, { Abs32, "Abs32" }, 405 { Disp8, "d8" }, { Disp16, "d16" }, 406 { Disp32, "d32" }, { SReg2, "SReg2" }, { SReg3, "SReg3" }, { Acc, "Acc" }, 407 { InOutPortReg, "InOutPortReg" }, { ShiftCount, "ShiftCount" }, 408 { Imm1, "i1" }, { Control, "control reg" }, {Test, "test reg"}, 409 { FloatReg, "FReg"}, {FloatAcc, "FAcc"}, 410 { JumpAbsolute, "Jump Absolute"}, 411 { 0, "" } 412 }; 413 414 static void pt (t) 415 uint t; 416 { 417 register struct type_name *ty; 418 419 if (t == Unknown) { 420 fprintf (stdout, "Unknown"); 421 } else { 422 for (ty = type_names; ty->mask; ty++) 423 if (t & ty->mask) fprintf (stdout, "%s, ", ty->tname); 424 } 425 fflush (stdout); 426 } 427 428 #endif /* DEBUG386 */ 429 430 /* 431 This is the guts of the machine-dependent assembler. LINE points to a 432 machine dependent instruction. This funciton is supposed to emit 433 the frags/bytes it assembles to. 434 */ 435 void md_assemble (line) 436 char *line; 437 { 438 /* Holds temlate once we've found it. */ 439 register template * t; 440 441 /* Possible templates for current insn */ 442 templates *current_templates = (templates *) 0; 443 444 /* Initialize globals. */ 445 bzero (&i, sizeof(i)); 446 bzero (disp_expressions, sizeof(disp_expressions)); 447 bzero (im_expressions, sizeof(im_expressions)); 448 save_stack_p = save_stack; /* reset stack pointer */ 449 450 /* Fist parse an opcode & call i386_operand for the operands. 451 We assume that the scrubber has arranged it so that line[0] is the valid 452 start of a (possibly prefixed) opcode. */ 453 { 454 register char *l = line; /* Fast place to put LINE. */ 455 456 /* TRUE if operand is pending after ','. */ 457 uint expecting_operand = 0; 458 /* TRUE if we found a prefix only acceptable with string insns. */ 459 uint expecting_string_instruction = 0; 460 /* Non-zero if operand parens not balenced. */ 461 uint paren_not_balenced; 462 char * token_start = l; 463 464 while (! is_space_char(*l) && *l != END_OF_INSN) { 465 if (! is_opcode_char(*l)) { 466 as_bad ("invalid character %s in opcode", output_invalid(*l)); 467 return; 468 } else if (*l != PREFIX_SEPERATOR) { 469 *l = opcode_chars[(unsigned char) *l]; /* fold case of opcodes */ 470 l++; 471 } else { /* this opcode's got a prefix */ 472 register int q; 473 register prefix_entry * prefix; 474 475 if (l == token_start) { 476 as_bad ("expecting prefix; got nothing"); 477 return; 478 } 479 END_STRING_AND_SAVE (l); 480 prefix = (prefix_entry *) hash_find (prefix_hash, token_start); 481 if (! prefix) { 482 as_bad ("no such opcode prefix ('%s')", token_start); 483 return; 484 } 485 RESTORE_END_STRING (l); 486 /* check for repeated prefix */ 487 for (q = 0; q < i.prefixes; q++) 488 if (i.prefix[q] == prefix->prefix_code) { 489 as_bad ("same prefix used twice; you don't really want this!"); 490 return; 491 } 492 if (i.prefixes == MAX_PREFIXES) { 493 as_bad ("too many opcode prefixes"); 494 return; 495 } 496 i.prefix[i.prefixes++] = prefix->prefix_code; 497 if (prefix->prefix_code == REPE || prefix->prefix_code == REPNE) 498 expecting_string_instruction = TRUE; 499 /* skip past PREFIX_SEPERATOR and reset token_start */ 500 token_start = ++l; 501 } 502 } 503 END_STRING_AND_SAVE (l); 504 if (token_start == l) { 505 as_bad ("expecting opcode; got nothing"); 506 return; 507 } 508 509 /* Lookup insn in hash; try intel & att naming conventions if appropriate; 510 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */ 511 current_templates = (templates *) hash_find (op_hash, token_start); 512 if (! current_templates) { 513 int last_index = strlen(token_start) - 1; 514 char last_char = token_start[last_index]; 515 switch (last_char) { 516 case DWORD_OPCODE_SUFFIX: 517 case WORD_OPCODE_SUFFIX: 518 case BYTE_OPCODE_SUFFIX: 519 token_start[last_index] = '\0'; 520 current_templates = (templates *) hash_find (op_hash, token_start); 521 token_start[last_index] = last_char; 522 i.suffix = last_char; 523 } 524 if (!current_templates) { 525 as_bad ("no such 386 instruction: `%s'", token_start); return; 526 } 527 } 528 RESTORE_END_STRING (l); 529 530 /* check for rep/repne without a string instruction */ 531 if (expecting_string_instruction && 532 ! IS_STRING_INSTRUCTION (current_templates-> 533 start->base_opcode)) { 534 as_bad ("expecting string instruction after rep/repne"); 535 return; 536 } 537 538 /* There may be operands to parse. */ 539 if (*l != END_OF_INSN && 540 /* For string instructions, we ignore any operands if given. This 541 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where 542 the operands are always going to be the same, and are not really 543 encoded in machine code. */ 544 ! IS_STRING_INSTRUCTION (current_templates-> 545 start->base_opcode)) { 546 /* parse operands */ 547 do { 548 /* skip optional white space before operand */ 549 while (! is_operand_char(*l) && *l != END_OF_INSN) { 550 if (! is_space_char(*l)) { 551 as_bad ("invalid character %s before %s operand", 552 output_invalid(*l), 553 ordinal_names[i.operands]); 554 return; 555 } 556 l++; 557 } 558 token_start = l; /* after white space */ 559 paren_not_balenced = 0; 560 while (paren_not_balenced || *l != ',') { 561 if (*l == END_OF_INSN) { 562 if (paren_not_balenced) { 563 as_bad ("unbalenced parenthesis in %s operand.", 564 ordinal_names[i.operands]); 565 return; 566 } else break; /* we are done */ 567 } else if (! is_operand_char(*l)) { 568 as_bad ("invalid character %s in %s operand", 569 output_invalid(*l), 570 ordinal_names[i.operands]); 571 return; 572 } 573 if (*l == '(') ++paren_not_balenced; 574 if (*l == ')') --paren_not_balenced; 575 l++; 576 } 577 if (l != token_start) { /* yes, we've read in another operand */ 578 uint operand_ok; 579 this_operand = i.operands++; 580 if (i.operands > MAX_OPERANDS) { 581 as_bad ("spurious operands; (%d operands/instruction max)", 582 MAX_OPERANDS); 583 return; 584 } 585 /* now parse operand adding info to 'i' as we go along */ 586 END_STRING_AND_SAVE (l); 587 operand_ok = i386_operand (token_start); 588 RESTORE_END_STRING (l); /* restore old contents */ 589 if (!operand_ok) return; 590 } else { 591 if (expecting_operand) { 592 expecting_operand_after_comma: 593 as_bad ("expecting operand after ','; got nothing"); 594 return; 595 } 596 if (*l == ',') { 597 as_bad ("expecting operand before ','; got nothing"); 598 return; 599 } 600 } 601 602 /* now *l must be either ',' or END_OF_INSN */ 603 if (*l == ',') { 604 if (*++l == END_OF_INSN) { /* just skip it, if it's \n complain */ 605 goto expecting_operand_after_comma; 606 } 607 expecting_operand = TRUE; 608 } 609 } while (*l != END_OF_INSN); /* until we get end of insn */ 610 } 611 } 612 613 /* Now we've parsed the opcode into a set of templates, and have the 614 operands at hand. 615 Next, we find a template that matches the given insn, 616 making sure the overlap of the given operands types is consistent 617 with the template operand types. */ 618 619 #define MATCH(overlap,given_type) \ 620 (overlap && \ 621 (overlap & (JumpAbsolute|BaseIndex|Mem8)) \ 622 == (given_type & (JumpAbsolute|BaseIndex|Mem8))) 623 624 /* If m0 and m1 are register matches they must be consistent 625 with the expected operand types t0 and t1. 626 That is, if both m0 & m1 are register matches 627 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ? 628 then, either 1. or 2. must be true: 629 1. the expected operand type register overlap is null: 630 (t0 & t1 & Reg) == 0 631 AND 632 the given register overlap is null: 633 (m0 & m1 & Reg) == 0 634 2. the expected operand type register overlap == the given 635 operand type overlap: (t0 & t1 & m0 & m1 & Reg). 636 */ 637 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \ 638 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \ 639 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \ 640 ((t0 & t1) & (m0 & m1) & (Reg)) \ 641 ) : 1) 642 { 643 register uint overlap0, overlap1; 644 expressionS * exp; 645 uint overlap2; 646 uint found_reverse_match; 647 648 overlap0 = overlap1 = overlap2 = found_reverse_match = 0; 649 for (t = current_templates->start; 650 t < current_templates->end; 651 t++) { 652 653 /* must have right number of operands */ 654 if (i.operands != t->operands) continue; 655 else if (!t->operands) break; /* 0 operands always matches */ 656 657 overlap0 = i.types[0] & t->operand_types[0]; 658 switch (t->operands) { 659 case 1: 660 if (! MATCH (overlap0,i.types[0])) continue; 661 break; 662 case 2: case 3: 663 overlap1 = i.types[1] & t->operand_types[1]; 664 if (! MATCH (overlap0,i.types[0]) || 665 ! MATCH (overlap1,i.types[1]) || 666 ! CONSISTENT_REGISTER_MATCH(overlap0, overlap1, 667 t->operand_types[0], 668 t->operand_types[1])) { 669 670 /* check if other direction is valid ... */ 671 if (! (t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS)) 672 continue; 673 674 /* try reversing direction of operands */ 675 overlap0 = i.types[0] & t->operand_types[1]; 676 overlap1 = i.types[1] & t->operand_types[0]; 677 if (! MATCH (overlap0,i.types[0]) || 678 ! MATCH (overlap1,i.types[1]) || 679 ! CONSISTENT_REGISTER_MATCH (overlap0, overlap1, 680 t->operand_types[0], 681 t->operand_types[1])) { 682 /* does not match either direction */ 683 continue; 684 } 685 /* found a reverse match here -- slip through */ 686 /* found_reverse_match holds which of D or FloatD we've found */ 687 found_reverse_match = t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS; 688 } /* endif: not forward match */ 689 /* found either forward/reverse 2 operand match here */ 690 if (t->operands == 3) { 691 overlap2 = i.types[2] & t->operand_types[2]; 692 if (! MATCH (overlap2,i.types[2]) || 693 ! CONSISTENT_REGISTER_MATCH (overlap0, overlap2, 694 t->operand_types[0], 695 t->operand_types[2]) || 696 ! CONSISTENT_REGISTER_MATCH (overlap1, overlap2, 697 t->operand_types[1], 698 t->operand_types[2])) 699 continue; 700 } 701 /* found either forward/reverse 2 or 3 operand match here: 702 slip through to break */ 703 } 704 break; /* we've found a match; break out of loop */ 705 } /* for (t = ... */ 706 if (t == current_templates->end) { /* we found no match */ 707 as_bad ("operands given don't match any known 386 instruction"); 708 return; 709 } 710 711 /* Copy the template we found (we may change it!). */ 712 bcopy (t, &i.tm, sizeof (template)); 713 t = &i.tm; /* alter new copy of template */ 714 715 /* If there's no opcode suffix we try to invent one based on register 716 operands. */ 717 if (! i.suffix && i.reg_operands) { 718 /* We take i.suffix from the LAST register operand specified. This 719 assumes that the last register operands is the destination register 720 operand. */ 721 int o; 722 for (o = 0; o < MAX_OPERANDS; o++) 723 if (i.types[o] & Reg) { 724 i.suffix = (i.types[o] == Reg8) ? BYTE_OPCODE_SUFFIX : 725 (i.types[o] == Reg16) ? WORD_OPCODE_SUFFIX : 726 DWORD_OPCODE_SUFFIX; 727 } 728 } 729 730 /* Make still unresolved immediate matches conform to size of immediate 731 given in i.suffix. Note: overlap2 cannot be an immediate! 732 We assume this. */ 733 if ((overlap0 & (Imm8|Imm8S|Imm16|Imm32)) 734 && overlap0 != Imm8 && overlap0 != Imm8S 735 && overlap0 != Imm16 && overlap0 != Imm32) { 736 if (! i.suffix) { 737 as_bad ("no opcode suffix given; can't determine immediate size"); 738 return; 739 } 740 overlap0 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) : 741 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32)); 742 } 743 if ((overlap1 & (Imm8|Imm8S|Imm16|Imm32)) 744 && overlap1 != Imm8 && overlap1 != Imm8S 745 && overlap1 != Imm16 && overlap1 != Imm32) { 746 if (! i.suffix) { 747 as_bad ("no opcode suffix given; can't determine immediate size"); 748 return; 749 } 750 overlap1 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) : 751 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32)); 752 } 753 754 i.types[0] = overlap0; 755 i.types[1] = overlap1; 756 i.types[2] = overlap2; 757 758 if (overlap0 & ImplicitRegister) i.reg_operands--; 759 if (overlap1 & ImplicitRegister) i.reg_operands--; 760 if (overlap2 & ImplicitRegister) i.reg_operands--; 761 if (overlap0 & Imm1) i.imm_operands = 0; /* kludge for shift insns */ 762 763 if (found_reverse_match) { 764 uint save; 765 save = t->operand_types[0]; 766 t->operand_types[0] = t->operand_types[1]; 767 t->operand_types[1] = save; 768 } 769 770 /* Finalize opcode. First, we change the opcode based on the operand 771 size given by i.suffix: we never have to change things for byte insns, 772 or when no opcode suffix is need to size the operands. */ 773 774 if (! i.suffix && (t->opcode_modifier & W)) { 775 as_bad ("no opcode suffix given and no register operands; can't size instruction"); 776 return; 777 } 778 779 if (i.suffix && i.suffix != BYTE_OPCODE_SUFFIX) { 780 /* Select between byte and word/dword operations. */ 781 if (t->opcode_modifier & W) 782 t->base_opcode |= W; 783 /* Now select between word & dword operations via the 784 operand size prefix. */ 785 if (i.suffix == WORD_OPCODE_SUFFIX) { 786 if (i.prefixes == MAX_PREFIXES) { 787 as_bad ("%d prefixes given and 'w' opcode suffix gives too many prefixes", 788 MAX_PREFIXES); 789 return; 790 } 791 i.prefix[i.prefixes++] = WORD_PREFIX_OPCODE; 792 } 793 } 794 795 /* For insns with operands there are more diddles to do to the opcode. */ 796 if (i.operands) { 797 /* If we found a reverse match we must alter the opcode direction bit 798 found_reverse_match holds bit to set (different for int & 799 float insns). */ 800 801 if (found_reverse_match) { 802 t->base_opcode |= found_reverse_match; 803 } 804 805 /* 806 The imul $imm, %reg instruction is converted into 807 imul $imm, %reg, %reg. */ 808 if (t->opcode_modifier & imulKludge) { 809 i.regs[2] = i.regs[1]; /* Pretend we saw the 3 operand case. */ 810 i.reg_operands = 2; 811 } 812 813 /* Certain instructions expect the destination to be in the i.rm.reg 814 field. This is by far the exceptional case. For these instructions, 815 if the source operand is a register, we must reverse the i.rm.reg 816 and i.rm.regmem fields. We accomplish this by faking that the 817 two register operands were given in the reverse order. */ 818 if ((t->opcode_modifier & ReverseRegRegmem) && i.reg_operands == 2) { 819 uint first_reg_operand = (i.types[0] & Reg) ? 0 : 1; 820 uint second_reg_operand = first_reg_operand + 1; 821 reg_entry *tmp = i.regs[first_reg_operand]; 822 i.regs[first_reg_operand] = i.regs[second_reg_operand]; 823 i.regs[second_reg_operand] = tmp; 824 } 825 826 if (t->opcode_modifier & ShortForm) { 827 /* The register or float register operand is in operand 0 or 1. */ 828 uint o = (i.types[0] & (Reg|FloatReg)) ? 0 : 1; 829 /* Register goes in low 3 bits of opcode. */ 830 t->base_opcode |= i.regs[o]->reg_num; 831 } else if (t->opcode_modifier & ShortFormW) { 832 /* Short form with 0x8 width bit. Register is always dest. operand */ 833 t->base_opcode |= i.regs[1]->reg_num; 834 if (i.suffix == WORD_OPCODE_SUFFIX || 835 i.suffix == DWORD_OPCODE_SUFFIX) 836 t->base_opcode |= 0x8; 837 } else if (t->opcode_modifier & Seg2ShortForm) { 838 if (t->base_opcode == POP_SEG_SHORT && i.regs[0]->reg_num == 1) { 839 as_bad ("you can't 'pop cs' on the 386."); 840 return; 841 } 842 t->base_opcode |= (i.regs[0]->reg_num << 3); 843 } else if (t->opcode_modifier & Seg3ShortForm) { 844 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1. 845 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9. 846 So, only if i.regs[0]->reg_num == 5 (%gs) do we need 847 to change the opcode. */ 848 if (i.regs[0]->reg_num == 5) 849 t->base_opcode |= 0x08; 850 } else if (t->opcode_modifier & Modrm) { 851 /* The opcode is completed (modulo t->extension_opcode which must 852 be put into the modrm byte. 853 Now, we make the modrm & index base bytes based on all the info 854 we've collected. */ 855 856 /* i.reg_operands MUST be the number of real register operands; 857 implicit registers do not count. */ 858 if (i.reg_operands == 2) { 859 uint source, dest; 860 source = (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 : 1; 861 dest = source + 1; 862 i.rm.mode = 3; 863 /* We must be careful to make sure that all segment/control/test/ 864 debug registers go into the i.rm.reg field (despite the whether 865 they are source or destination operands). */ 866 if (i.regs[dest]->reg_type & (SReg2|SReg3|Control|Debug|Test)) { 867 i.rm.reg = i.regs[dest]->reg_num; 868 i.rm.regmem = i.regs[source]->reg_num; 869 } else { 870 i.rm.reg = i.regs[source]->reg_num; 871 i.rm.regmem = i.regs[dest]->reg_num; 872 } 873 } else { /* if it's not 2 reg operands... */ 874 if (i.mem_operands) { 875 uint fake_zero_displacement = FALSE; 876 uint o = (i.types[0] & Mem) ? 0 : ((i.types[1] & Mem) ? 1 : 2); 877 878 /* Encode memory operand into modrm byte and base index byte. */ 879 880 if (i.base_reg == esp && ! i.index_reg) { 881 /* <disp>(%esp) becomes two byte modrm with no index register. */ 882 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING; 883 i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]); 884 i.bi.base = ESP_REG_NUM; 885 i.bi.index = NO_INDEX_REGISTER; 886 i.bi.scale = 0; /* Must be zero! */ 887 } else if (i.base_reg == ebp && !i.index_reg) { 888 if (! (i.types[o] & Disp)) { 889 /* Must fake a zero byte displacement. 890 There is no direct way to code '(%ebp)' directly. */ 891 fake_zero_displacement = TRUE; 892 /* fake_zero_displacement code does not set this. */ 893 i.types[o] |= Disp8; 894 } 895 i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]); 896 i.rm.regmem = EBP_REG_NUM; 897 } else if (! i.base_reg && (i.types[o] & BaseIndex)) { 898 /* There are three cases here. 899 Case 1: '<32bit disp>(,1)' -- indirect absolute. 900 (Same as cases 2 & 3 with NO index register) 901 Case 2: <32bit disp> (,<index>) -- no base register with disp 902 Case 3: (, <index>) --- no base register; 903 no disp (must add 32bit 0 disp). */ 904 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING; 905 i.rm.mode = 0; /* 32bit mode */ 906 i.bi.base = NO_BASE_REGISTER; 907 i.types[o] &= ~Disp; 908 i.types[o] |= Disp32; /* Must be 32bit! */ 909 if (i.index_reg) { /* case 2 or case 3 */ 910 i.bi.index = i.index_reg->reg_num; 911 i.bi.scale = i.log2_scale_factor; 912 if (i.disp_operands == 0) 913 fake_zero_displacement = TRUE; /* case 3 */ 914 } else { 915 i.bi.index = NO_INDEX_REGISTER; 916 i.bi.scale = 0; 917 } 918 } else if (i.disp_operands && !i.base_reg && !i.index_reg) { 919 /* Operand is just <32bit disp> */ 920 i.rm.regmem = EBP_REG_NUM; 921 i.rm.mode = 0; 922 i.types[o] &= ~Disp; 923 i.types[o] |= Disp32; 924 } else { 925 /* It's not a special case; rev'em up. */ 926 i.rm.regmem = i.base_reg->reg_num; 927 i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]); 928 if (i.index_reg) { 929 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING; 930 i.bi.base = i.base_reg->reg_num; 931 i.bi.index = i.index_reg->reg_num; 932 i.bi.scale = i.log2_scale_factor; 933 if (i.base_reg == ebp && i.disp_operands == 0) { /* pace */ 934 fake_zero_displacement = TRUE; 935 i.types[o] |= Disp8; 936 i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]); 937 } 938 } 939 } 940 if (fake_zero_displacement) { 941 /* Fakes a zero displacement assuming that i.types[o] holds 942 the correct displacement size. */ 943 exp = &disp_expressions[i.disp_operands++]; 944 i.disps[o] = exp; 945 exp->X_seg = SEG_ABSOLUTE; 946 exp->X_add_number = 0; 947 exp->X_add_symbol = (symbolS *) 0; 948 exp->X_subtract_symbol = (symbolS *) 0; 949 } 950 951 /* Select the correct segment for the memory operand. */ 952 if (i.seg) { 953 uint seg_index; 954 seg_entry * default_seg; 955 956 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING) { 957 seg_index = (i.rm.mode<<3) | i.bi.base; 958 default_seg = two_byte_segment_defaults [seg_index]; 959 } else { 960 seg_index = (i.rm.mode<<3) | i.rm.regmem; 961 default_seg = one_byte_segment_defaults [seg_index]; 962 } 963 /* If the specified segment is not the default, use an 964 opcode prefix to select it */ 965 if (i.seg != default_seg) { 966 if (i.prefixes == MAX_PREFIXES) { 967 as_bad ("%d prefixes given and %s segment override gives too many prefixes", 968 MAX_PREFIXES, i.seg->seg_name); 969 return; 970 } 971 i.prefix[i.prefixes++] = i.seg->seg_prefix; 972 } 973 } 974 } 975 976 /* Fill in i.rm.reg or i.rm.regmem field with register operand 977 (if any) based on t->extension_opcode. Again, we must be careful 978 to make sure that segment/control/debug/test registers are coded 979 into the i.rm.reg field. */ 980 if (i.reg_operands) { 981 uint o = 982 (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 : 983 (i.types[1] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 1 : 2; 984 /* If there is an extension opcode to put here, the register number 985 must be put into the regmem field. */ 986 if (t->extension_opcode != None) 987 i.rm.regmem = i.regs[o]->reg_num; 988 else i.rm.reg = i.regs[o]->reg_num; 989 990 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2 991 we must set it to 3 to indicate this is a register operand 992 int the regmem field */ 993 if (! i.mem_operands) i.rm.mode = 3; 994 } 995 996 /* Fill in i.rm.reg field with extension opcode (if any). */ 997 if (t->extension_opcode != None) 998 i.rm.reg = t->extension_opcode; 999 } 1000 } 1001 } 1002 } 1003 1004 /* Handle conversion of 'int $3' --> special int3 insn. */ 1005 if (t->base_opcode == INT_OPCODE && i.imms[0]->X_add_number == 3) { 1006 t->base_opcode = INT3_OPCODE; 1007 i.imm_operands = 0; 1008 } 1009 1010 /* We are ready to output the insn. */ 1011 { 1012 register char * p; 1013 1014 /* Output jumps. */ 1015 if (t->opcode_modifier & Jump) { 1016 int n = i.disps[0]->X_add_number; 1017 1018 switch (i.disps[0]->X_seg) { 1019 case SEG_ABSOLUTE: 1020 if (FITS_IN_SIGNED_BYTE (n)) { 1021 p = frag_more (2); 1022 p[0] = t->base_opcode; 1023 p[1] = n; 1024 #if 0 /* leave out 16 bit jumps - pace */ 1025 } else if (FITS_IN_SIGNED_WORD (n)) { 1026 p = frag_more (4); 1027 p[0] = WORD_PREFIX_OPCODE; 1028 p[1] = t->base_opcode; 1029 md_number_to_chars (&p[2], n, 2); 1030 #endif 1031 } else { /* It's an absolute dword displacement. */ 1032 if (t->base_opcode == JUMP_PC_RELATIVE) { /* pace */ 1033 /* unconditional jump */ 1034 p = frag_more (5); 1035 p[0] = 0xe9; 1036 md_number_to_chars (&p[1], n, 4); 1037 } else { 1038 /* conditional jump */ 1039 p = frag_more (6); 1040 p[0] = TWO_BYTE_OPCODE_ESCAPE; 1041 p[1] = t->base_opcode + 0x10; 1042 md_number_to_chars (&p[2], n, 4); 1043 } 1044 } 1045 break; 1046 default: 1047 /* It's a symbol; end frag & setup for relax. 1048 Make sure there are 6 chars left in the current frag; if not 1049 we'll have to start a new one. */ 1050 /* I caught it failing with obstack_room == 6, 1051 so I changed to <= pace */ 1052 if (obstack_room (&frags) <= 6) { 1053 frag_wane(frag_now); 1054 frag_new (0); 1055 } 1056 p = frag_more (1); 1057 p[0] = t->base_opcode; 1058 frag_var (rs_machine_dependent, 1059 6, /* 2 opcode/prefix + 4 displacement */ 1060 1, 1061 ((uchar) *p == JUMP_PC_RELATIVE 1062 ? ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE) 1063 : ENCODE_RELAX_STATE (COND_JUMP, BYTE)), 1064 i.disps[0]->X_add_symbol, 1065 n, p); 1066 break; 1067 } 1068 } else if (t->opcode_modifier & (JumpByte|JumpDword)) { 1069 int size = (t->opcode_modifier & JumpByte) ? 1 : 4; 1070 int n = i.disps[0]->X_add_number; 1071 1072 if (FITS_IN_UNSIGNED_BYTE(t->base_opcode)) { 1073 FRAG_APPEND_1_CHAR (t->base_opcode); 1074 } else { 1075 p = frag_more (2); /* opcode can be at most two bytes */ 1076 /* put out high byte first: can't use md_number_to_chars! */ 1077 *p++ = (t->base_opcode >> 8) & 0xff; 1078 *p = t->base_opcode & 0xff; 1079 } 1080 1081 p = frag_more (size); 1082 switch (i.disps[0]->X_seg) { 1083 case SEG_ABSOLUTE: 1084 md_number_to_chars (p, n, size); 1085 if (size == 1 && ! FITS_IN_SIGNED_BYTE (n)) { 1086 as_bad ("loop/jecx only takes byte displacement; %d shortened to %d", 1087 n, *p); 1088 } 1089 break; 1090 default: 1091 fix_new (frag_now, p - frag_now->fr_literal, size, 1092 i.disps[0]->X_add_symbol, i.disps[0]->X_subtract_symbol, 1093 i.disps[0]->X_add_number, 1); 1094 break; 1095 } 1096 } else if (t->opcode_modifier & JumpInterSegment) { 1097 p = frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */ 1098 p[0] = t->base_opcode; 1099 if (i.imms[1]->X_seg == SEG_ABSOLUTE) 1100 md_number_to_chars (p + 1, i.imms[1]->X_add_number, 4); 1101 else 1102 fix_new (frag_now, p + 1 - frag_now->fr_literal, 4, 1103 i.imms[1]->X_add_symbol, 1104 i.imms[1]->X_subtract_symbol, 1105 i.imms[1]->X_add_number, 0); 1106 if (i.imms[0]->X_seg != SEG_ABSOLUTE) 1107 as_bad ("can't handle non absolute segment in long call/jmp"); 1108 md_number_to_chars (p + 5, i.imms[0]->X_add_number, 2); 1109 } else { 1110 /* Output normal instructions here. */ 1111 register char *q; 1112 1113 /* First the prefix bytes. */ 1114 for (q = i.prefix; q < i.prefix + i.prefixes; q++) { 1115 p = frag_more (1); 1116 md_number_to_chars (p, (uint) *q, 1); 1117 } 1118 1119 /* Now the opcode; be careful about word order here! */ 1120 if (FITS_IN_UNSIGNED_BYTE(t->base_opcode)) { 1121 FRAG_APPEND_1_CHAR (t->base_opcode); 1122 } else if (FITS_IN_UNSIGNED_WORD(t->base_opcode)) { 1123 p = frag_more (2); 1124 /* put out high byte first: can't use md_number_to_chars! */ 1125 *p++ = (t->base_opcode >> 8) & 0xff; 1126 *p = t->base_opcode & 0xff; 1127 } else { /* opcode is either 3 or 4 bytes */ 1128 if (t->base_opcode & 0xff000000) { 1129 p = frag_more (4); 1130 *p++ = (t->base_opcode >> 24) & 0xff; 1131 } else p = frag_more (3); 1132 *p++ = (t->base_opcode >> 16) & 0xff; 1133 *p++ = (t->base_opcode >> 8) & 0xff; 1134 *p = (t->base_opcode ) & 0xff; 1135 } 1136 1137 /* Now the modrm byte and base index byte (if present). */ 1138 if (t->opcode_modifier & Modrm) { 1139 p = frag_more (1); 1140 /* md_number_to_chars (p, i.rm, 1); */ 1141 md_number_to_chars (p, (i.rm.regmem<<0 | i.rm.reg<<3 | i.rm.mode<<6), 1); 1142 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode) 1143 ==> need second modrm byte. */ 1144 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING && i.rm.mode != 3) { 1145 p = frag_more (1); 1146 /* md_number_to_chars (p, i.bi, 1); */ 1147 md_number_to_chars (p,(i.bi.base<<0 | i.bi.index<<3 | i.bi.scale<<6), 1); 1148 } 1149 } 1150 1151 if (i.disp_operands) { 1152 register int n; 1153 1154 for (n = 0; n < i.operands; n++) { 1155 if (i.disps[n]) { 1156 if (i.disps[n]->X_seg == SEG_ABSOLUTE) { 1157 if (i.types[n] & (Disp8|Abs8)) { 1158 p = frag_more (1); 1159 md_number_to_chars (p, i.disps[n]->X_add_number, 1); 1160 } else if (i.types[n] & (Disp16|Abs16)) { 1161 p = frag_more (2); 1162 md_number_to_chars (p, i.disps[n]->X_add_number, 2); 1163 } else { /* Disp32|Abs32 */ 1164 p = frag_more (4); 1165 md_number_to_chars (p, i.disps[n]->X_add_number, 4); 1166 } 1167 } else { /* not SEG_ABSOLUTE */ 1168 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */ 1169 p = frag_more (4); 1170 fix_new (frag_now, p - frag_now->fr_literal, 4, 1171 i.disps[n]->X_add_symbol, i.disps[n]->X_subtract_symbol, 1172 i.disps[n]->X_add_number, 0); 1173 } 1174 } 1175 } 1176 } /* end displacement output */ 1177 1178 /* output immediate */ 1179 if (i.imm_operands) { 1180 register int n; 1181 1182 for (n = 0; n < i.operands; n++) { 1183 if (i.imms[n]) { 1184 if (i.imms[n]->X_seg == SEG_ABSOLUTE) { 1185 if (i.types[n] & (Imm8|Imm8S)) { 1186 p = frag_more (1); 1187 md_number_to_chars (p, i.imms[n]->X_add_number, 1); 1188 } else if (i.types[n] & Imm16) { 1189 p = frag_more (2); 1190 md_number_to_chars (p, i.imms[n]->X_add_number, 2); 1191 } else { 1192 p = frag_more (4); 1193 md_number_to_chars (p, i.imms[n]->X_add_number, 4); 1194 } 1195 } else { /* not SEG_ABSOLUTE */ 1196 /* need a 32-bit fixup (don't support 8bit non-absolute ims) */ 1197 /* try to support other sizes ... */ 1198 int size; 1199 if (i.types[n] & (Imm8|Imm8S)) 1200 size = 1; 1201 else if (i.types[n] & Imm16) 1202 size = 2; 1203 else 1204 size = 4; 1205 p = frag_more (size); 1206 fix_new (frag_now, p - frag_now->fr_literal, size, 1207 i.imms[n]->X_add_symbol, i.imms[n]->X_subtract_symbol, 1208 i.imms[n]->X_add_number, 0); 1209 } 1210 } 1211 } 1212 } /* end immediate output */ 1213 } 1214 1215 #ifdef DEBUG386 1216 if (flagseen ['D']) { 1217 pi (line, &i); 1218 } 1219 #endif /* DEBUG386 */ 1220 1221 } 1222 return; 1223 } 1224 1225 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero 1226 on error. */ 1227 1228 int i386_operand (operand_string) 1229 char *operand_string; 1230 { 1231 register char *op_string = operand_string; 1232 1233 /* Address of '\0' at end of operand_string. */ 1234 char * end_of_operand_string = operand_string + strlen(operand_string); 1235 1236 /* Start and end of displacement string expression (if found). */ 1237 char * displacement_string_start = 0; 1238 char * displacement_string_end; 1239 1240 /* We check for an absolute prefix (differentiating, 1241 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */ 1242 if (*op_string == ABSOLUTE_PREFIX) { 1243 op_string++; 1244 i.types[this_operand] |= JumpAbsolute; 1245 } 1246 1247 /* Check if operand is a register. */ 1248 if (*op_string == REGISTER_PREFIX) { 1249 register reg_entry * r; 1250 if (! (r = parse_register (op_string))) { 1251 as_bad ("bad register name ('%s')", op_string); 1252 return 0; 1253 } 1254 /* Check for segment override, rather than segment register by 1255 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */ 1256 if ((r->reg_type & (SReg2|SReg3)) && op_string[3] == ':') { 1257 switch (r->reg_num) { 1258 case 0: 1259 i.seg = &es; break; 1260 case 1: 1261 i.seg = &cs; break; 1262 case 2: 1263 i.seg = &ss; break; 1264 case 3: 1265 i.seg = &ds; break; 1266 case 4: 1267 i.seg = &fs; break; 1268 case 5: 1269 i.seg = &gs; break; 1270 } 1271 op_string += 4; /* skip % <x> s : */ 1272 operand_string = op_string; /* Pretend given string starts here. */ 1273 if (!is_digit_char(*op_string) && !is_identifier_char(*op_string) 1274 && *op_string != '(' && *op_string != ABSOLUTE_PREFIX) { 1275 as_bad ("bad memory operand after segment override"); 1276 return 0; 1277 } 1278 /* Handle case of %es:*foo. */ 1279 if (*op_string == ABSOLUTE_PREFIX) { 1280 op_string++; 1281 i.types[this_operand] |= JumpAbsolute; 1282 } 1283 goto do_memory_reference; 1284 } 1285 i.types[this_operand] |= r->reg_type; 1286 i.regs[this_operand] = r; 1287 i.reg_operands++; 1288 } else if (*op_string == IMMEDIATE_PREFIX) { /* ... or an immediate */ 1289 char * save_input_line_pointer; 1290 register expressionS *exp; 1291 segT exp_seg; 1292 if (i.imm_operands == MAX_IMMEDIATE_OPERANDS) { 1293 as_bad ("only 1 or 2 immediate operands are allowed"); 1294 return 0; 1295 } 1296 exp = &im_expressions[i.imm_operands++]; 1297 i.imms [this_operand] = exp; 1298 save_input_line_pointer = input_line_pointer; 1299 input_line_pointer = ++op_string; /* must advance op_string! */ 1300 exp_seg = expression (exp); 1301 input_line_pointer = save_input_line_pointer; 1302 switch (exp_seg) { 1303 case SEG_NONE: /* missing or bad expr becomes absolute 0 */ 1304 as_bad ("missing or invalid immediate expression '%s' taken as 0", 1305 operand_string); 1306 exp->X_seg = SEG_ABSOLUTE; 1307 exp->X_add_number = 0; 1308 exp->X_add_symbol = (symbolS *) 0; 1309 exp->X_subtract_symbol = (symbolS *) 0; 1310 i.types[this_operand] |= Imm; 1311 break; 1312 case SEG_ABSOLUTE: 1313 i.types[this_operand] |= SMALLEST_IMM_TYPE (exp->X_add_number); 1314 break; 1315 case SEG_TEXT: case SEG_DATA: case SEG_BSS: case SEG_UNKNOWN: 1316 i.types[this_operand] |= Imm32; /* this is an address ==> 32bit */ 1317 break; 1318 default: 1319 seg_unimplemented: 1320 as_bad ("Unimplemented segment type %d in parse_operand", exp_seg); 1321 return 0; 1322 } 1323 /* shorten this type of this operand if the instruction wants 1324 * fewer bits than are present in the immediate. The bit field 1325 * code can put out 'andb $0xffffff, %al', for example. pace 1326 * also 'movw $foo,(%eax)' 1327 */ 1328 switch (i.suffix) { 1329 case WORD_OPCODE_SUFFIX: 1330 i.types[this_operand] |= Imm16; 1331 break; 1332 case BYTE_OPCODE_SUFFIX: 1333 i.types[this_operand] |= Imm16 | Imm8 | Imm8S; 1334 break; 1335 } 1336 } else if (is_digit_char(*op_string) || is_identifier_char(*op_string) 1337 || *op_string == '(') { 1338 /* This is a memory reference of some sort. */ 1339 register char * base_string; 1340 uint found_base_index_form; 1341 1342 do_memory_reference: 1343 if (i.mem_operands == MAX_MEMORY_OPERANDS) { 1344 as_bad ("more than 1 memory reference in instruction"); 1345 return 0; 1346 } 1347 i.mem_operands++; 1348 1349 /* Determine type of memory operand from opcode_suffix; 1350 no opcode suffix implies general memory references. */ 1351 switch (i.suffix) { 1352 case BYTE_OPCODE_SUFFIX: 1353 i.types[this_operand] |= Mem8; 1354 break; 1355 case WORD_OPCODE_SUFFIX: 1356 i.types[this_operand] |= Mem16; 1357 break; 1358 case DWORD_OPCODE_SUFFIX: 1359 default: 1360 i.types[this_operand] |= Mem32; 1361 } 1362 1363 /* Check for base index form. We detect the base index form by 1364 looking for an ')' at the end of the operand, searching 1365 for the '(' matching it, and finding a REGISTER_PREFIX or ',' 1366 after it. */ 1367 base_string = end_of_operand_string - 1; 1368 found_base_index_form = FALSE; 1369 if (*base_string == ')') { 1370 uint parens_balenced = 1; 1371 /* We've already checked that the number of left & right ()'s are equal, 1372 so this loop will not be infinite. */ 1373 do { 1374 base_string--; 1375 if (*base_string == ')') parens_balenced++; 1376 if (*base_string == '(') parens_balenced--; 1377 } while (parens_balenced); 1378 base_string++; /* Skip past '('. */ 1379 if (*base_string == REGISTER_PREFIX || *base_string == ',') 1380 found_base_index_form = TRUE; 1381 } 1382 1383 /* If we can't parse a base index register expression, we've found 1384 a pure displacement expression. We set up displacement_string_start 1385 and displacement_string_end for the code below. */ 1386 if (! found_base_index_form) { 1387 displacement_string_start = op_string; 1388 displacement_string_end = end_of_operand_string; 1389 } else { 1390 char *base_reg_name, *index_reg_name, *num_string; 1391 int num; 1392 1393 i.types[this_operand] |= BaseIndex; 1394 1395 /* If there is a displacement set-up for it to be parsed later. */ 1396 if (base_string != op_string + 1) { 1397 displacement_string_start = op_string; 1398 displacement_string_end = base_string - 1; 1399 } 1400 1401 /* Find base register (if any). */ 1402 if (*base_string != ',') { 1403 base_reg_name = base_string++; 1404 /* skip past register name & parse it */ 1405 while (isalpha(*base_string)) base_string++; 1406 if (base_string == base_reg_name+1) { 1407 as_bad ("can't find base register name after '(%c'", 1408 REGISTER_PREFIX); 1409 return 0; 1410 } 1411 END_STRING_AND_SAVE (base_string); 1412 if (! (i.base_reg = parse_register (base_reg_name))) { 1413 as_bad ("bad base register name ('%s')", base_reg_name); 1414 return 0; 1415 } 1416 RESTORE_END_STRING (base_string); 1417 } 1418 1419 /* Now check seperator; must be ',' ==> index reg 1420 OR num ==> no index reg. just scale factor 1421 OR ')' ==> end. (scale factor = 1) */ 1422 if (*base_string != ',' && *base_string != ')') { 1423 as_bad ("expecting ',' or ')' after base register in `%s'", 1424 operand_string); 1425 return 0; 1426 } 1427 1428 /* There may index reg here; and there may be a scale factor. */ 1429 if (*base_string == ',' && *(base_string+1) == REGISTER_PREFIX) { 1430 index_reg_name = ++base_string; 1431 while (isalpha(*++base_string)); 1432 END_STRING_AND_SAVE (base_string); 1433 if (! (i.index_reg = parse_register(index_reg_name))) { 1434 as_bad ("bad index register name ('%s')", index_reg_name); 1435 return 0; 1436 } 1437 RESTORE_END_STRING (base_string); 1438 } 1439 1440 /* Check for scale factor. */ 1441 if (*base_string == ',' && isdigit(*(base_string+1))) { 1442 num_string = ++base_string; 1443 while (is_digit_char(*base_string)) base_string++; 1444 if (base_string == num_string) { 1445 as_bad ("can't find a scale factor after ','"); 1446 return 0; 1447 } 1448 END_STRING_AND_SAVE (base_string); 1449 /* We've got a scale factor. */ 1450 if (! sscanf (num_string, "%d", &num)) { 1451 as_bad ("can't parse scale factor from '%s'", num_string); 1452 return 0; 1453 } 1454 RESTORE_END_STRING (base_string); 1455 switch (num) { /* must be 1 digit scale */ 1456 case 1: i.log2_scale_factor = 0; break; 1457 case 2: i.log2_scale_factor = 1; break; 1458 case 4: i.log2_scale_factor = 2; break; 1459 case 8: i.log2_scale_factor = 3; break; 1460 default: 1461 as_bad ("expecting scale factor of 1, 2, 4, 8; got %d", num); 1462 return 0; 1463 } 1464 } else { 1465 if (! i.index_reg && *base_string == ',') { 1466 as_bad ("expecting index register or scale factor after ','; got '%c'", 1467 *(base_string+1)); 1468 return 0; 1469 } 1470 } 1471 } 1472 1473 /* If there's an expression begining the operand, parse it, 1474 assuming displacement_string_start and displacement_string_end 1475 are meaningful. */ 1476 if (displacement_string_start) { 1477 register expressionS * exp; 1478 segT exp_seg; 1479 char * save_input_line_pointer; 1480 exp = &disp_expressions[i.disp_operands]; 1481 i.disps [this_operand] = exp; 1482 i.disp_operands++; 1483 save_input_line_pointer = input_line_pointer; 1484 input_line_pointer = displacement_string_start; 1485 END_STRING_AND_SAVE (displacement_string_end); 1486 exp_seg = expression (exp); 1487 if(*input_line_pointer) 1488 as_bad("Ignoring junk '%s' after expression",input_line_pointer); 1489 RESTORE_END_STRING (displacement_string_end); 1490 input_line_pointer = save_input_line_pointer; 1491 switch (exp_seg) { 1492 case SEG_NONE: 1493 /* missing expr becomes absolute 0 */ 1494 as_bad ("missing or invalid displacement '%s' taken as 0", 1495 operand_string); 1496 i.types[this_operand] |= (Disp|Abs); 1497 exp->X_seg = SEG_ABSOLUTE; 1498 exp->X_add_number = 0; 1499 exp->X_add_symbol = (symbolS *) 0; 1500 exp->X_subtract_symbol = (symbolS *) 0; 1501 break; 1502 case SEG_ABSOLUTE: 1503 i.types[this_operand] |= SMALLEST_DISP_TYPE (exp->X_add_number); 1504 break; 1505 case SEG_TEXT: case SEG_DATA: case SEG_BSS: 1506 case SEG_UNKNOWN: /* must be 32 bit displacement (i.e. address) */ 1507 i.types[this_operand] |= Disp32; 1508 break; 1509 default: 1510 goto seg_unimplemented; 1511 } 1512 } 1513 1514 /* Make sure the memory operand we've been dealt is valid. */ 1515 if (i.base_reg && i.index_reg && 1516 ! (i.base_reg->reg_type & i.index_reg->reg_type & Reg)) { 1517 as_bad ("register size mismatch in (base,index,scale) expression"); 1518 return 0; 1519 } 1520 if ((i.base_reg && (i.base_reg->reg_type & Reg32) == 0) || 1521 (i.index_reg && (i.index_reg->reg_type & Reg32) == 0)) { 1522 as_bad ("base/index register must be 32 bit register"); 1523 return 0; 1524 } 1525 if (i.index_reg && i.index_reg == esp) { 1526 as_bad ("%s may not be used as an index register", esp->reg_name); 1527 return 0; 1528 } 1529 } else { /* it's not a memory operand; argh! */ 1530 as_bad ("invalid char %s begining %s operand '%s'", 1531 output_invalid(*op_string), ordinal_names[this_operand], 1532 op_string); 1533 return 0; 1534 } 1535 return 1; /* normal return */ 1536 } 1537 1538 /* 1539 * md_estimate_size_before_relax() 1540 * 1541 * Called just before relax(). 1542 * Any symbol that is now undefined will not become defined. 1543 * Return the correct fr_subtype in the frag. 1544 * Return the initial "guess for fr_var" to caller. 1545 * The guess for fr_var is ACTUALLY the growth beyond fr_fix. 1546 * Whatever we do to grow fr_fix or fr_var contributes to our returned value. 1547 * Although it may not be explicit in the frag, pretend fr_var starts with a 1548 * 0 value. 1549 */ 1550 int 1551 md_estimate_size_before_relax (fragP, segment_type) 1552 register fragS * fragP; 1553 register int segment_type; /* N_DATA or N_TEXT. */ 1554 { 1555 register uchar * opcode; 1556 register int old_fr_fix; 1557 1558 old_fr_fix = fragP -> fr_fix; 1559 opcode = (uchar *) fragP -> fr_opcode; 1560 /* We've already got fragP->fr_subtype right; all we have to do is check 1561 for un-relaxable symbols. */ 1562 if ((fragP -> fr_symbol -> sy_type & N_TYPE) != segment_type) { 1563 /* symbol is undefined in this segment */ 1564 switch (opcode[0]) { 1565 case JUMP_PC_RELATIVE: /* make jmp (0xeb) a dword displacement jump */ 1566 opcode[0] = 0xe9; /* dword disp jmp */ 1567 fragP -> fr_fix += 4; 1568 fix_new (fragP, old_fr_fix, 4, 1569 fragP -> fr_symbol, 1570 (symbolS *) 0, 1571 fragP -> fr_offset, 1); 1572 break; 1573 1574 default: 1575 /* This changes the byte-displacement jump 0x7N --> 1576 the dword-displacement jump 0x0f8N */ 1577 opcode[1] = opcode[0] + 0x10; 1578 opcode[0] = TWO_BYTE_OPCODE_ESCAPE; /* two-byte escape */ 1579 fragP -> fr_fix += 1 + 4; /* we've added an opcode byte */ 1580 fix_new (fragP, old_fr_fix + 1, 4, 1581 fragP -> fr_symbol, 1582 (symbolS *) 0, 1583 fragP -> fr_offset, 1); 1584 break; 1585 } 1586 frag_wane (fragP); 1587 } 1588 return (fragP -> fr_var + fragP -> fr_fix - old_fr_fix); 1589 } /* md_estimate_size_before_relax() */ 1590 1591 /* 1592 * md_convert_frag(); 1593 * 1594 * Called after relax() is finished. 1595 * In: Address of frag. 1596 * fr_type == rs_machine_dependent. 1597 * fr_subtype is what the address relaxed to. 1598 * 1599 * Out: Any fixSs and constants are set up. 1600 * Caller will turn frag into a ".space 0". 1601 */ 1602 void 1603 md_convert_frag (fragP) 1604 register fragS * fragP; 1605 { 1606 register uchar * opcode; 1607 uchar * where_to_put_displacement; 1608 uint target_address, opcode_address; 1609 uint extension; 1610 int displacement_from_opcode_start; 1611 1612 opcode = (uchar *) fragP -> fr_opcode; 1613 1614 /* Address we want to reach in file space. */ 1615 target_address = fragP->fr_symbol->sy_value + fragP->fr_offset; 1616 1617 /* Address opcode resides at in file space. */ 1618 opcode_address = fragP->fr_address + fragP->fr_fix; 1619 1620 /* Displacement from opcode start to fill into instruction. */ 1621 displacement_from_opcode_start = target_address - opcode_address; 1622 1623 switch (fragP->fr_subtype) { 1624 case ENCODE_RELAX_STATE (COND_JUMP, BYTE): 1625 case ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE): 1626 /* don't have to change opcode */ 1627 extension = 1; /* 1 opcode + 1 displacement */ 1628 where_to_put_displacement = &opcode[1]; 1629 break; 1630 1631 case ENCODE_RELAX_STATE (COND_JUMP, WORD): 1632 opcode[1] = TWO_BYTE_OPCODE_ESCAPE; 1633 opcode[2] = opcode[0] + 0x10; 1634 opcode[0] = WORD_PREFIX_OPCODE; 1635 extension = 4; /* 3 opcode + 2 displacement */ 1636 where_to_put_displacement = &opcode[3]; 1637 break; 1638 1639 case ENCODE_RELAX_STATE (UNCOND_JUMP, WORD): 1640 opcode[1] = 0xe9; 1641 opcode[0] = WORD_PREFIX_OPCODE; 1642 extension = 3; /* 2 opcode + 2 displacement */ 1643 where_to_put_displacement = &opcode[2]; 1644 break; 1645 1646 case ENCODE_RELAX_STATE (COND_JUMP, DWORD): 1647 opcode[1] = opcode[0] + 0x10; 1648 opcode[0] = TWO_BYTE_OPCODE_ESCAPE; 1649 extension = 5; /* 2 opcode + 4 displacement */ 1650 where_to_put_displacement = &opcode[2]; 1651 break; 1652 1653 case ENCODE_RELAX_STATE (UNCOND_JUMP, DWORD): 1654 opcode[0] = 0xe9; 1655 extension = 4; /* 1 opcode + 4 displacement */ 1656 where_to_put_displacement = &opcode[1]; 1657 break; 1658 1659 default: 1660 BAD_CASE(fragP -> fr_subtype); 1661 break; 1662 } 1663 /* now put displacement after opcode */ 1664 md_number_to_chars (where_to_put_displacement, 1665 displacement_from_opcode_start - extension, 1666 SIZE_FROM_RELAX_STATE (fragP->fr_subtype)); 1667 fragP -> fr_fix += extension; 1668 } 1669 1670 1671 int md_short_jump_size = 2; /* size of byte displacement jmp */ 1672 int md_long_jump_size = 5; /* size of dword displacement jmp */ 1673 1674 void md_create_short_jump(ptr, from_addr, to_addr) 1675 char *ptr; 1676 long from_addr, to_addr; 1677 { 1678 long offset; 1679 1680 offset = to_addr - (from_addr + 2); 1681 md_number_to_chars (ptr, (long) 0xeb, 1); /* opcode for byte-disp jump */ 1682 md_number_to_chars (ptr + 1, offset, 1); 1683 } 1684 1685 void md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol) 1686 char *ptr; 1687 long from_addr, to_addr; 1688 fragS *frag; 1689 symbolS *to_symbol; 1690 { 1691 long offset; 1692 1693 if (flagseen['m']) { 1694 offset = to_addr - to_symbol->sy_value; 1695 md_number_to_chars (ptr, 0xe9, 1); /* opcode for long jmp */ 1696 md_number_to_chars (ptr + 1, offset, 4); 1697 fix_new (frag, (ptr+1) - frag->fr_literal, 4, 1698 to_symbol, (symbolS *) 0, (long int) 0, 0); 1699 } else { 1700 offset = to_addr - (from_addr + 5); 1701 md_number_to_chars(ptr, (long) 0xe9, 1); 1702 md_number_to_chars(ptr + 1, offset, 4); 1703 } 1704 } 1705 1706 int 1707 md_parse_option(argP,cntP,vecP) 1708 char **argP; 1709 int *cntP; 1710 char ***vecP; 1711 { 1712 return 1; 1713 } 1714 1715 void /* Knows about order of bytes in address. */ 1716 md_number_to_chars (con, value, nbytes) 1717 char con []; /* Return 'nbytes' of chars here. */ 1718 long int value; /* The value of the bits. */ 1719 int nbytes; /* Number of bytes in the output. */ 1720 { 1721 register char * p = con; 1722 1723 switch (nbytes) { 1724 case 1: 1725 p[0] = value & 0xff; 1726 break; 1727 case 2: 1728 p[0] = value & 0xff; 1729 p[1] = (value >> 8) & 0xff; 1730 break; 1731 case 4: 1732 p[0] = value & 0xff; 1733 p[1] = (value>>8) & 0xff; 1734 p[2] = (value>>16) & 0xff; 1735 p[3] = (value>>24) & 0xff; 1736 break; 1737 default: 1738 BAD_CASE (nbytes); 1739 } 1740 } 1741 1742 void /* Knows about order of bytes in address. */ 1743 md_number_to_disp (con, value, nbytes) 1744 char con []; /* Return 'nbytes' of chars here. */ 1745 long int value; /* The value of the bits. */ 1746 int nbytes; /* Number of bytes in the output. */ 1747 { 1748 char * answer = alloca (nbytes); 1749 register char * p = answer; 1750 1751 switch (nbytes) { 1752 case 1: 1753 *p = value; 1754 break; 1755 case 2: 1756 *p++ = value; 1757 *p = (value>>8); 1758 break; 1759 case 4: 1760 *p++ = value; 1761 *p++ = (value>>8); 1762 *p++ = (value>>16); 1763 *p = (value>>24); 1764 break; 1765 default: 1766 BAD_CASE (nbytes); 1767 } 1768 bcopy (answer, con, nbytes); 1769 } 1770 1771 void /* Knows about order of bytes in address. */ 1772 md_number_to_imm (con, value, nbytes) 1773 char con []; /* Return 'nbytes' of chars here. */ 1774 long int value; /* The value of the bits. */ 1775 int nbytes; /* Number of bytes in the output. */ 1776 { 1777 char * answer = alloca (nbytes); 1778 register char * p = answer; 1779 1780 switch (nbytes) { 1781 case 1: 1782 *p = value; 1783 break; 1784 case 2: 1785 *p++ = value; 1786 *p = (value>>8); 1787 break; 1788 case 4: 1789 *p++ = value; 1790 *p++ = (value>>8); 1791 *p++ = (value>>16); 1792 *p = (value>>24); 1793 break; 1794 default: 1795 BAD_CASE (nbytes); 1796 } 1797 bcopy (answer, con, nbytes); 1798 } 1799 1800 void /* Knows about order of bytes in address. */ 1801 md_number_to_field (con, value, nbytes) 1802 char con []; /* Return 'nbytes' of chars here. */ 1803 long int value; /* The value of the bits. */ 1804 int nbytes; /* Number of bytes in the output. */ 1805 { 1806 char * answer = alloca (nbytes); 1807 register char * p = answer; 1808 1809 switch (nbytes) { 1810 case 1: 1811 *p = value; 1812 break; 1813 case 2: 1814 *p++ = value; 1815 *p = (value>>8); 1816 break; 1817 case 4: 1818 *p++ = value; 1819 *p++ = (value>>8); 1820 *p++ = (value>>16); 1821 *p = (value>>24); 1822 break; 1823 default: 1824 BAD_CASE (nbytes); 1825 } 1826 bcopy (answer, con, nbytes); 1827 } 1828 1829 long int /* Knows about the byte order in a word. */ 1830 md_chars_to_number (con, nbytes) 1831 unsigned char con[]; /* Low order byte 1st. */ 1832 int nbytes; /* Number of bytes in the input. */ 1833 { 1834 long int retval; 1835 for (retval=0, con+=nbytes-1; nbytes--; con--) 1836 { 1837 retval <<= BITS_PER_CHAR; 1838 retval |= *con; 1839 } 1840 return retval; 1841 } 1842 1843 void md_ri_to_chars(ri_p, ri) 1844 struct relocation_info *ri_p, ri; 1845 { 1846 unsigned char the_bytes[8]; 1847 1848 /* this is easy */ 1849 md_number_to_chars(the_bytes, ri.r_address, sizeof(ri.r_address)); 1850 /* now the fun stuff */ 1851 the_bytes[6] = (ri.r_symbolnum >> 16) & 0x0ff; 1852 the_bytes[5] = (ri.r_symbolnum >> 8) & 0x0ff; 1853 the_bytes[4] = ri.r_symbolnum & 0x0ff; 1854 the_bytes[7] = (((ri.r_extern << 3) & 0x08) | ((ri.r_length << 1) & 0x06) | 1855 ((ri.r_pcrel << 0) & 0x01)) & 0x0F; 1856 /* now put it back where you found it */ 1857 bcopy (the_bytes, (char *)ri_p, sizeof(struct relocation_info)); 1858 } 1859 1860 1861 #define MAX_LITTLENUMS 6 1862 1863 /* Turn the string pointed to by litP into a floating point constant of type 1864 type, and emit the appropriate bytes. The number of LITTLENUMS emitted 1865 is stored in *sizeP . An error message is returned, or NULL on OK. 1866 */ 1867 char * 1868 md_atof(type,litP,sizeP) 1869 char type; 1870 char *litP; 1871 int *sizeP; 1872 { 1873 int prec; 1874 LITTLENUM_TYPE words[MAX_LITTLENUMS]; 1875 LITTLENUM_TYPE *wordP; 1876 char *t; 1877 char *atof_ieee(); 1878 1879 switch(type) { 1880 case 'f': 1881 case 'F': 1882 prec = 2; 1883 break; 1884 1885 case 'd': 1886 case 'D': 1887 prec = 4; 1888 break; 1889 1890 case 'x': 1891 case 'X': 1892 prec = 5; 1893 break; 1894 1895 default: 1896 *sizeP=0; 1897 return "Bad call to md_atof ()"; 1898 } 1899 t = atof_ieee (input_line_pointer,type,words); 1900 if(t) 1901 input_line_pointer=t; 1902 1903 *sizeP = prec * sizeof(LITTLENUM_TYPE); 1904 /* this loops outputs the LITTLENUMs in REVERSE order; in accord with 1905 the bigendian 386 */ 1906 for(wordP = words + prec - 1;prec--;) { 1907 md_number_to_chars (litP, (long) (*wordP--), sizeof(LITTLENUM_TYPE)); 1908 litP += sizeof(LITTLENUM_TYPE); 1909 } 1910 return ""; /* Someone should teach Dean about null pointers */ 1911 } 1912 1913 char output_invalid_buf[8]; 1914 1915 char * output_invalid (c) 1916 char c; 1917 { 1918 if (isprint(c)) sprintf (output_invalid_buf, "'%c'", c); 1919 else sprintf (output_invalid_buf, "(0x%x)", c); 1920 return output_invalid_buf; 1921 } 1922 1923 reg_entry *parse_register (reg_string) 1924 char *reg_string; /* reg_string starts *before* REGISTER_PREFIX */ 1925 { 1926 register char *s = reg_string; 1927 register char *p; 1928 char reg_name_given[MAX_REG_NAME_SIZE]; 1929 1930 s++; /* skip REGISTER_PREFIX */ 1931 for (p = reg_name_given; is_register_char (*s); p++, s++) { 1932 *p = register_chars [*s]; 1933 if (p >= reg_name_given + MAX_REG_NAME_SIZE) 1934 return (reg_entry *) 0; 1935 } 1936 *p = '\0'; 1937 return (reg_entry *) hash_find (reg_hash, reg_name_given); 1938 } 1939 1940