xref: /original-bsd/sys/hp/dev/dcareg.h (revision 3705696b)
1 /*
2  * Copyright (c) 1982, 1986, 1990, 1993
3  *	The Regents of the University of California.  All rights reserved.
4  *
5  * %sccs.include.redist.c%
6  *
7  *	@(#)dcareg.h	8.1 (Berkeley) 06/10/93
8  */
9 
10 #include <hp/dev/iotypes.h>			/* XXX */
11 
12 #ifdef hp700
13 struct dcadevice {
14 	vu_char	dca_reset;
15 	vu_char dca_pad[0x800-1];
16 	vu_char	dca_data;			/* receive buf or xmit hold */
17 	vu_char	dca_ier;			/* interrupt enable */
18 	vu_char	dca_iir;			/* (RO) interrupt identify */
19 #define		dca_fifo	dca_iir		/* (WO) FIFO control */
20 	vu_char	dca_cfcr;			/* line control */
21 	vu_char	dca_mcr;			/* modem control */
22 	vu_char	dca_lsr;			/* line status */
23 	vu_char	dca_msr;			/* modem status */
24 	vu_char	dca_scr;			/* scratch pad */
25 };
26 #else
27 struct dcadevice {
28 	/* card registers */
29 	u_char	dca_pad0;
30 	vu_char	dca_id;				/* 0x01 (read) */
31 #define		dca_reset	dca_id		/* 0x01 (write) */
32 	u_char	dca_pad1;
33 	vu_char	dca_ic;				/* 0x03 */
34 	u_char	dca_pad2;
35 	vu_char	dca_ocbrc;			/* 0x05 */
36 	u_char	dca_pad3;
37 	vu_char	dca_lcsm;			/* 0x07 */
38 	u_char	dca_pad4[8];
39 	/* chip registers */
40 	u_char	dca_pad5;
41 	vu_char	dca_data;			/* 0x11 */
42 	u_char	dca_pad6;
43 	vu_char	dca_ier;			/* 0x13 */
44 	u_char	dca_pad7;
45 	vu_char	dca_iir;			/* 0x15 (read) */
46 #define		dca_fifo	dca_iir		/* 0x15 (write) */
47 	u_char	dca_pad8;
48 	vu_char	dca_cfcr;			/* 0x17 */
49 	u_char	dca_pad9;
50 	vu_char	dca_mcr;			/* 0x19 */
51 	u_char	dca_padA;
52 	vu_char	dca_lsr;			/* 0x1B */
53 	u_char	dca_padB;
54 	vu_char	dca_msr;			/* 0x1D */
55 };
56 #endif
57 
58 /* interface reset/id (300 only) */
59 #define	DCAID0		0x02
60 #define DCAREMID0	0x82
61 #define	DCAID1		0x42
62 #define DCAREMID1	0xC2
63 
64 /* interrupt control (300 only) */
65 #define	DCAIPL(x)	((((x) >> 4) & 3) + 3)
66 #define	IC_IR		0x40
67 #define	IC_IE		0x80
68 
69 /*
70  * 16 bit baud rate divisor (lower byte in dca_data, upper in dca_ier)
71  * NB: This constant is for a 7.3728 clock frequency. The 300 clock
72  *     frequency is 2.4576, giving a constant of 153600.
73  */
74 #ifdef hp300
75 #define	DCABRD(x)	(153600 / (x))
76 #endif
77 #ifdef hp700
78 #define	DCABRD(x)	(460800 / (x))
79 #endif
80 
81 /* interrupt enable register */
82 #define	IER_ERXRDY	0x1
83 #define	IER_ETXRDY	0x2
84 #define	IER_ERLS	0x4
85 #define	IER_EMSC	0x8
86 
87 /* interrupt identification register */
88 #define	IIR_IMASK	0xf
89 #define	IIR_RXTOUT	0xc
90 #define	IIR_RLS		0x6
91 #define	IIR_RXRDY	0x4
92 #define	IIR_TXRDY	0x2
93 #define	IIR_NOPEND	0x1
94 #define	IIR_MLSC	0x0
95 #define	IIR_FIFO_MASK	0xc0	/* set if FIFOs are enabled */
96 
97 /* fifo control register */
98 #define	FIFO_ENABLE	0x01
99 #define	FIFO_RCV_RST	0x02
100 #define	FIFO_XMT_RST	0x04
101 #define	FIFO_DMA_MODE	0x08
102 #define	FIFO_TRIGGER_1	0x00
103 #define	FIFO_TRIGGER_4	0x40
104 #define	FIFO_TRIGGER_8	0x80
105 #define	FIFO_TRIGGER_14	0xc0
106 
107 /* character format control register */
108 #define	CFCR_DLAB	0x80
109 #define	CFCR_SBREAK	0x40
110 #define	CFCR_PZERO	0x30
111 #define	CFCR_PONE	0x20
112 #define	CFCR_PEVEN	0x10
113 #define	CFCR_PODD	0x00
114 #define	CFCR_PENAB	0x08
115 #define	CFCR_STOPB	0x04
116 #define	CFCR_8BITS	0x03
117 #define	CFCR_7BITS	0x02
118 #define	CFCR_6BITS	0x01
119 #define	CFCR_5BITS	0x00
120 
121 /* modem control register */
122 #define	MCR_LOOPBACK	0x10
123 #define	MCR_IEN		0x08
124 #define	MCR_DRS		0x04
125 #define	MCR_RTS		0x02
126 #define	MCR_DTR		0x01
127 
128 /* line status register */
129 #define	LSR_RCV_FIFO	0x80
130 #define	LSR_TSRE	0x40
131 #define	LSR_TXRDY	0x20
132 #define	LSR_BI		0x10
133 #define	LSR_FE		0x08
134 #define	LSR_PE		0x04
135 #define	LSR_OE		0x02
136 #define	LSR_RXRDY	0x01
137 #define	LSR_RCV_MASK	0x1f
138 
139 /* modem status register */
140 #define	MSR_DCD		0x80
141 #define	MSR_RI		0x40
142 #define	MSR_DSR		0x20
143 #define	MSR_CTS		0x10
144 #define	MSR_DDCD	0x08
145 #define	MSR_TERI	0x04
146 #define	MSR_DDSR	0x02
147 #define	MSR_DCTS	0x01
148 
149 #ifdef hp300
150 /* WARNING: Serial console is assumed to be at SC9 */
151 #define CONSCODE	(9)
152 #endif
153 #ifdef hp700
154 /* hardwired port addresses */
155 #define PORT1		((struct dcadevice *)CORE_RS232_1)
156 #define PORT2		((struct dcadevice *)CORE_RS232_2)
157 #define CONPORT		PORT1
158 #endif
159 #define CONUNIT		(0)
160