1 /* 2 * Copyright (c) 1982, 1986, 1990 Regents of the University of California. 3 * All rights reserved. 4 * 5 * %sccs.include.redist.c% 6 * 7 * @(#)dcareg.h 7.4 (Berkeley) 06/05/92 8 */ 9 10 #ifdef KERNEL 11 #include "hp/dev/iotypes.h" /* XXX */ 12 #else 13 #include <hp/dev/iotypes.h> /* XXX */ 14 #endif 15 16 #ifdef hp700 17 struct dcadevice { 18 vu_char dca_reset; 19 vu_char dca_pad[0x800-1]; 20 vu_char dca_data; /* receive buf or xmit hold */ 21 vu_char dca_ier; /* interrupt enable */ 22 vu_char dca_iir; /* (RO) interrupt identify */ 23 #define dca_fifo dca_iir /* (WO) FIFO control */ 24 vu_char dca_cfcr; /* line control */ 25 vu_char dca_mcr; /* modem control */ 26 vu_char dca_lsr; /* line status */ 27 vu_char dca_msr; /* modem status */ 28 vu_char dca_scr; /* scratch pad */ 29 }; 30 #else 31 struct dcadevice { 32 /* card registers */ 33 u_char dca_pad0; 34 vu_char dca_id; /* 0x01 (read) */ 35 #define dca_reset dca_id /* 0x01 (write) */ 36 u_char dca_pad1; 37 vu_char dca_ic; /* 0x03 */ 38 u_char dca_pad2; 39 vu_char dca_ocbrc; /* 0x05 */ 40 u_char dca_pad3; 41 vu_char dca_lcsm; /* 0x07 */ 42 u_char dca_pad4[8]; 43 /* chip registers */ 44 u_char dca_pad5; 45 vu_char dca_data; /* 0x11 */ 46 u_char dca_pad6; 47 vu_char dca_ier; /* 0x13 */ 48 u_char dca_pad7; 49 vu_char dca_iir; /* 0x15 (read) */ 50 #define dca_fifo dca_iir /* 0x15 (write) */ 51 u_char dca_pad8; 52 vu_char dca_cfcr; /* 0x17 */ 53 u_char dca_pad9; 54 vu_char dca_mcr; /* 0x19 */ 55 u_char dca_padA; 56 vu_char dca_lsr; /* 0x1B */ 57 u_char dca_padB; 58 vu_char dca_msr; /* 0x1D */ 59 }; 60 #endif 61 62 /* interface reset/id (300 only) */ 63 #define DCAID0 0x02 64 #define DCAREMID0 0x82 65 #define DCAID1 0x42 66 #define DCAREMID1 0xC2 67 68 /* interrupt control (300 only) */ 69 #define DCAIPL(x) ((((x) >> 4) & 3) + 3) 70 #define IC_IR 0x40 71 #define IC_IE 0x80 72 73 /* 74 * 16 bit baud rate divisor (lower byte in dca_data, upper in dca_ier) 75 * NB: This constant is for a 7.3728 clock frequency. The 300 clock 76 * frequency is 2.4576, giving a constant of 153600. 77 */ 78 #ifdef hp300 79 #define DCABRD(x) (153600 / (x)) 80 #endif 81 #ifdef hp700 82 #define DCABRD(x) (460800 / (x)) 83 #endif 84 85 /* interrupt enable register */ 86 #define IER_ERXRDY 0x1 87 #define IER_ETXRDY 0x2 88 #define IER_ERLS 0x4 89 #define IER_EMSC 0x8 90 91 /* interrupt identification register */ 92 #define IIR_IMASK 0xf 93 #define IIR_RXTOUT 0xc 94 #define IIR_RLS 0x6 95 #define IIR_RXRDY 0x4 96 #define IIR_TXRDY 0x2 97 #define IIR_NOPEND 0x1 98 #define IIR_MLSC 0x0 99 #define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */ 100 101 /* fifo control register */ 102 #define FIFO_ENABLE 0x01 103 #define FIFO_RCV_RST 0x02 104 #define FIFO_XMT_RST 0x04 105 #define FIFO_DMA_MODE 0x08 106 #define FIFO_TRIGGER_1 0x00 107 #define FIFO_TRIGGER_4 0x40 108 #define FIFO_TRIGGER_8 0x80 109 #define FIFO_TRIGGER_14 0xc0 110 111 /* character format control register */ 112 #define CFCR_DLAB 0x80 113 #define CFCR_SBREAK 0x40 114 #define CFCR_PZERO 0x30 115 #define CFCR_PONE 0x20 116 #define CFCR_PEVEN 0x10 117 #define CFCR_PODD 0x00 118 #define CFCR_PENAB 0x08 119 #define CFCR_STOPB 0x04 120 #define CFCR_8BITS 0x03 121 #define CFCR_7BITS 0x02 122 #define CFCR_6BITS 0x01 123 #define CFCR_5BITS 0x00 124 125 /* modem control register */ 126 #define MCR_LOOPBACK 0x10 127 #define MCR_IEN 0x08 128 #define MCR_DRS 0x04 129 #define MCR_RTS 0x02 130 #define MCR_DTR 0x01 131 132 /* line status register */ 133 #define LSR_RCV_FIFO 0x80 134 #define LSR_TSRE 0x40 135 #define LSR_TXRDY 0x20 136 #define LSR_BI 0x10 137 #define LSR_FE 0x08 138 #define LSR_PE 0x04 139 #define LSR_OE 0x02 140 #define LSR_RXRDY 0x01 141 #define LSR_RCV_MASK 0x1f 142 143 /* modem status register */ 144 #define MSR_DCD 0x80 145 #define MSR_RI 0x40 146 #define MSR_DSR 0x20 147 #define MSR_CTS 0x10 148 #define MSR_DDCD 0x08 149 #define MSR_TERI 0x04 150 #define MSR_DDSR 0x02 151 #define MSR_DCTS 0x01 152 153 #ifdef hp300 154 /* WARNING: Serial console is assumed to be at SC9 */ 155 #define CONSCODE (9) 156 #endif 157 #ifdef hp700 158 /* hardwired port addresses */ 159 #define PORT1 ((struct dcadevice *)CORE_RS232_1) 160 #define PORT2 ((struct dcadevice *)CORE_RS232_2) 161 #define CONPORT PORT1 162 #endif 163 #define CONUNIT (0) 164