xref: /original-bsd/sys/hp/dev/hilreg.h (revision c5df922f)
1 /*
2  * Copyright (c) 1988 University of Utah.
3  * Copyright (c) 1990 The Regents of the University of California.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to Berkeley by
7  * the Systems Programming Group of the University of Utah Computer
8  * Science Department.
9  *
10  * %sccs.include.redist.c%
11  *
12  * from: Utah $Hdr: hilreg.h 1.9 91/01/21$
13  *
14  *	@(#)hilreg.h	7.3 (Berkeley) 05/07/91
15  */
16 
17 struct	hil_dev {
18 	char	hil_pad0;
19 	volatile char	hil_data;
20 	char	hil_pad1;
21 	volatile char	hil_cmd;
22 #define hil_stat hil_cmd
23 };
24 
25 #define	HILADDR			((struct hil_dev *)IIOV(0x428000))
26 #define BBCADDR			((struct hil_dev *)IIOV(0x420000))
27 
28 #define splhil			spl1
29 
30 #define	HIL_BUSY		0x02
31 #define HIL_DATA_RDY		0x01
32 
33 #define HILWAIT(hil_dev)	while ((hil_dev->hil_stat & HIL_BUSY))
34 #define HILDATAWAIT(hil_dev)	while ((hil_dev->hil_stat & HIL_DATA_RDY) == 0)
35 
36 /* HIL status bits */
37 #define	HIL_POLLDATA	0x10		/* HIL poll data follows */
38 #define HIL_COMMAND	0x08		/* Start of original command */
39 #define HIL_ERROR	0x080		/* HIL error */
40 #define HIL_RECONFIG	0x080		/* HIL has reconfigured */
41 #define	HIL_STATMASK	(HIL_DATA | HIL_COMMAND)
42 
43 #define HIL_SSHIFT		4	/* Bits to shift status over */
44 #define HIL_SMASK		0xF	/* Service request status mask */
45 #define HIL_DEVMASK		0x07
46 
47 /* HIL status types */
48 #define	HIL_STATUS	0x5		/* HIL status in data register */
49 #define	HIL_DATA	0x6		/* HIL data in data register */
50 #define	HIL_CTRLSHIFT	0x8		/* key + CTRL + SHIFT */
51 #define	HIL_CTRL	0x9		/* key + CTRL */
52 #define	HIL_SHIFT	0xA		/* key + SHIFT */
53 #define	HIL_KEY		0xB		/* key only */
54 #define HIL_68K		0x4		/* Data from the 68k is ready */
55 
56 /* HIL commands */
57 #define	HIL_SETARD	0xA0		/* set auto-repeat delay */
58 #define	HIL_SETARR	0xA2		/* set auto-repeat rate */
59 #define	HIL_SETTONE	0xA3		/* set tone generator */
60 #define HIL_CNMT	0xB2		/* clear nmi */
61 #define HIL_INTON	0x5C		/* Turn on interrupts. */
62 #define HIL_INTOFF	0x5D		/* Turn off interrupts. */
63 #define HIL_TRIGGER	0xC5		/* trigger command */
64 #define HIL_STARTCMD	0xE0		/* start loop command */
65 #define HIL_TIMEOUT	0xFE		/* timeout */
66 #define HIL_READTIME	0x13		/* Read real time register */
67 
68 /* Read/write various registers on the 8042. */
69 #define	HIL_READBUSY		0x02	/* internal "busy" register */
70 #define HIL_READKBDLANG		0x12	/* read keyboard language code */
71 #define	HIL_READKBDSADR	 	0xF9
72 #define	HIL_WRITEKBDSADR 	0xE9
73 #define HIL_READLPSTAT  	0xFA
74 #define HIL_WRITELPSTAT 	0xEA
75 #define HIL_READLPCTRL  	0xFB
76 #define HIL_WRITELPCTRL 	0xEB
77 
78 /* BUSY bits */
79 #define BSY_LOOPBUSY	0x04
80 
81 /* LPCTRL bits */
82 #define LPC_AUTOPOLL	0x01	/* enable auto-polling */
83 #define LPC_NOERROR	0x02	/* don't report errors */
84 #define LPC_NORECONF	0x04	/* don't report reconfigure */
85 #define LPC_KBDCOOK	0x10	/* cook all keyboards */
86 #define LPC_RECONF	0x80	/* reconfigure the loop */
87 
88 /* LPSTAT bits */
89 #define LPS_DEVMASK	0x07	/* number of loop devices */
90 #define LPS_CONFGOOD	0x08	/* reconfiguration worked */
91 #define LPS_CONFFAIL	0x80	/* reconfiguration failed */
92 
93 /* HIL packet headers */
94 #define HIL_MOUSEDATA   0x2
95 #define HIL_KBDDATA     0x40
96 
97 #define	HIL_MOUSEMOTION	0x02		/* mouse movement event */
98 #define	HIL_KBDBUTTON	0x40		/* keyboard button event */
99 #define HIL_MOUSEBUTTON 0x40            /* mouse button event */
100 #define HIL_BUTTONBOX   0x60            /* button box event */
101 #define HIL_TABLET      0x02            /* tablet motion event */
102 #define HIL_KNOBBOX     0x03            /* knob box motion data */
103 
104 /* Magic */
105 #define KBDNMISTAT		((volatile char *)IIOV(0x478005))
106 #define	KBDNMI			0x04
107 
108 /* For setting auto repeat on the keyboard */
109 #define ar_format(x)	~((x - 10) / 10)
110 #define KBD_ARD		400		/* initial delay in msec (10 - 2560) */
111 #define KBD_ARR		60		/* rate (10 - 2550 msec, 2551 == off)*/
112