xref: /original-bsd/sys/hp300/dev/dcmreg.h (revision 51e389b0)
1 /*
2  * Copyright (c) 1988 University of Utah.
3  * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to Berkeley by
7  * the Systems Programming Group of the University of Utah Computer
8  * Science Department.
9  *
10  * %sccs.include.redist.c%
11  *
12  * from: Utah $Hdr: dcmreg.h 1.1 90/07/09$
13  *
14  *	@(#)dcmreg.h	7.4 (Berkeley) 11/04/90
15  */
16 
17 struct dcmdevice {	   /* host address, only odd bytes addressed */
18 	u_char	dcm_pad0;
19 	volatile u_char	dcm_rsid;	/* Reset / ID			0001 */
20 	u_char	dcm_pad1;
21 	volatile u_char	dcm_ic;		/* Interrupt control register	0003 */
22 	u_char	dcm_pad2;
23 	volatile u_char	dcm_sem;	/* Semaphore register		0005 */
24 	u_char  dcm_pad3[0x7ffa];	/* Unaddressable	0006-7fff */
25 	u_char	dcm_pad4;
26 	volatile u_char	dcm_iir;	/* Interrupt ident register	8001 */
27 	u_char	dcm_pad5;
28 	volatile u_char	dcm_cr;		/* Command register		8003 */
29 	u_char  dcm_pad6[0x3fc];	/* Card scratch		8004-83ff */
30 	struct	dcmrfifo {
31 		u_char	ptr_pad1;
32 		volatile u_char	data_char;
33 		u_char	ptr_pad2;
34 		volatile u_char	data_stat;
35 	} dcm_rfifos[4][0x80];		/* Receive queues		8400 */
36 	struct  {
37 		u_char	ptr_pad1;
38 		volatile u_char	data_data;
39 	} dcm_bmap[0x100];		/* Bitmap table			8c00 */
40 	struct  {
41 		u_char	ptr_pad;
42 		volatile u_char	ptr;
43 	} dcm_rhead[4];			/* Fifo head - receive		8e00 */
44 	struct  {
45 		u_char  ptr_pad;
46 		volatile u_char  ptr;
47 	} dcm_rtail[4];			/* Fifo tail - receive		8e08 */
48 	struct  {
49 		u_char	ptr_pad;
50 		volatile u_char	ptr;
51 	} dcm_thead[4];			/* Fifo head - transmit		8e10 */
52 	struct  {
53 		u_char	ptr_pad;
54 		volatile u_char	ptr;
55 	} dcm_ttail[4];			/* Fifo tail - transmit		8e18 */
56 	struct  {
57 		u_char	pad1;
58 		volatile u_char	dcm_conf;
59 		u_char	pad2;
60 		volatile u_char	dcm_baud;
61 	} dcm_data[4];			/* Configuration registers	8e20 */
62 	struct	modemreg {
63 		u_char	pad0;
64 		volatile u_char  mdmin;		/* Modem in		8e31 */
65 		u_char  pad1;
66 		volatile u_char  mdmout;	/* Modem out		8e33 */
67 		u_char  pad2;
68 		volatile u_char  mdmmsk;	/* Modem mask		8e35 */
69 	} dcm_modem0;
70 	struct  {
71 		u_char pad1;
72 		volatile u_char dcm_data;
73 	} dcm_cmdtab[4];		/* Command tables		8e36 */
74 	struct  {
75 		u_char pad1;
76 		volatile u_char dcm_data;
77 	} dcm_icrtab[4];		/* Interrupt data		8e3e */
78 	u_char  dcm_pad10;
79 	volatile u_char  dcm_stcon;	/* Self test condition		8e47 */
80 	struct modemreg dcm_modem1;	/* 638 Modem port1		8e48 */
81 	struct modemreg dcm_modem2;	/* 638 Modem port2		8e4e */
82 	struct modemreg dcm_modem3;	/* 638 Modem port3		8e54 */
83 	u_char	dcm_pad11;
84 	volatile u_char	dcm_modemchng;	/* 638 Modem change mask	8e5b */
85 	u_char	dcm_pad12;
86 	volatile u_char	dcm_modemintr;	/* 638 Modem interrupt mask	8e5d */
87 	u_char  dcm_pad13[0x82];	/* Undef Shared Ram	8e5e-8edf */
88 	struct	dcmtfifo {
89 	    u_char  ptr_pad1;
90 	    volatile u_char  data_char;
91 	} dcm_tfifos[4][0x10];		/* Transmit queues		8ee0 */
92 };
93 
94 /*
95  * Overlay structure for port specific queue "registers".
96  * Starts at offset 0x8E00+(port*2).
97  */
98 struct	dcmpreg {
99 	u_char		pad0;		/* +00 */
100 	volatile u_char	r_head;		/* +01 */
101 	u_char		pad1[7];	/* +02 */
102 	volatile u_char	r_tail;		/* +09 */
103 	u_char		pad2[7];	/* +0A */
104 	volatile u_char	t_head;		/* +11 */
105 	u_char		pad3[7];	/* +12 */
106 	volatile u_char	t_tail;		/* +19 */
107 };
108 #define	dcm_preg(d, p)	((struct dcmpreg *)((u_int)(d)+0x8e00+(p)*2))
109 
110 /* interface reset/id */
111 #define DCMCON          0x80	/* REMOTE/LOCAL switch, read */
112 #define	DCMID		0x5	/* hardwired card id, read */
113 #define	DCMRS		0x80	/* software reset, write */
114 
115 /* interrupt control */
116 #define	DCMIPL(x)	((((x) >> 4) & 3) + 3)	/* interupt level, read */
117 #define	IC_IR		0x40	/* interupt request, read */
118 #define	IC_IE		0x80	/* interupt enable, write */
119 #define	IC_ID		0x00	/* interupt disable, write */
120 
121 
122 /* Semaphore control */
123 #define	SEM_BSY		0x80	/* read */
124 #define SEM_CLR         0xFF	/* write */
125 #define SEM_LOCK(dcm)	while ((dcm)->dcm_sem & SEM_BSY)
126 #define SEM_UNLOCK(dcm)	(dcm)->dcm_sem = SEM_CLR
127 
128 /* command register */
129 #define	CR_PORT0	0x1
130 #define	CR_PORT1	0x2
131 #define	CR_PORT2	0x4
132 #define	CR_PORT3	0x8
133 #define	CR_MODM		0x10	/* change modem output lines */
134 #define	CR_TIMER	0x20	/* 16ms interrupt timer toggle */
135 #define	CR_SELFT	0x40	/* run self test */
136 #define CR_MASK		0x7f
137 
138 /* interrupt ident register */
139 #define	IIR_PORT0	0x1
140 #define	IIR_PORT1	0x2
141 #define	IIR_PORT2	0x4
142 #define	IIR_PORT3	0x8
143 #define	IIR_SELFT	0x10	/* self test completed */
144 #define	IIR_MODM	0x20	/* change in modem input lines */
145 #define	IIR_TIMEO	0x40	/* Time out */
146 #define IIR_MASK	0x7f
147 
148 /* self test cond reg */
149 #define ST_OK           0xe0
150 
151 /* Line configuration register */
152 #define	LC_PNO		0x00
153 #define	LC_PODD		0x01
154 #define	LC_PEVEN	0x02
155 #define	LC_PMSK		0x03
156 
157 #define	LC_1STOP	0x00
158 #define	LC_1HSTOP	0x04
159 #define	LC_2STOP	0x08
160 #define	LC_STOPMSK	0x0b
161 
162 #define	LC_8BITS	0x30
163 #define	LC_7BITS	0x20
164 #define	LC_6BITS	0x10
165 #define	LC_5BITS	0x00
166 #define	LC_BITMSK	0x30
167 
168 /* baud reg */
169 #define BR_0		0x00
170 #define BR_50		0x01
171 #define BR_75		0x02
172 #define BR_110		0x03
173 #define BR_134  	0x04
174 #define BR_150		0x05
175 #define BR_300		0x06
176 #define BR_600		0x07
177 #define BR_900		0x08
178 #define BR_1200		0x09
179 #define BR_1800		0x0a
180 #define BR_2400		0x0b
181 #define BR_3600		0x0c
182 #define BR_4800		0x0d
183 #define BR_7200		0x0e
184 #define BR_9600		0x0f
185 #define BR_19200	0x10
186 #define BR_38400	0x11
187 
188 /* modem input register */
189 #define	MI_CTS		0x08
190 #define	MI_DM		0x04
191 #define	MI_CD		0x02
192 #define	MI_RI		0x01
193 
194 /* modem output register */
195 #define	MO_SR		0x04
196 #define	MO_DTR		0x02
197 #define	MO_RTS		0x01
198 #define	MO_ON		((MO_DTR) | (MO_RTS))
199 #define	MO_OFF		0x00
200 
201 /* cmd-tab values, write */
202 #define CT_CON		0x1	/* configuration change */
203 #define CT_TX		0x2	/* transmit buffer not empty */
204 #define CT_BRK		0x4	/* toggle BREAK */
205 
206 /* icr-tab values, read */
207 #define IT_TX		0x1	/* transmit buffer empty */
208 #define IT_SPEC		0x2	/* special character received */
209 
210 /* data errors */
211 #define RD_OVF		0x08
212 #define RD_BD		0x10
213 #define RD_PE		0x20
214 #define RD_OE		0x40
215 #define RD_FE		0x80
216 #define RD_MASK		0xf8
217 
218 /* Transmit/Receive masks */
219 #define TX_MASK		0x0f
220 #define RX_MASK		0xff
221 
222 /*
223  * WARNING: Serial console is assumed to be the lowest select-code card
224  * and that card must be logical unit 0 in the kernel.  Also, CONUNIT must
225  * be 1, the port affected by the REMOTE/LOCAL switch.
226  */
227 #define CONUNIT	(1)
228