1 /* 2 * Copyright (c) 1982, 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * %sccs.include.redist.c% 6 * 7 * @(#)dmareg.h 7.4 (Berkeley) 06/05/92 8 */ 9 10 #ifdef KERNEL 11 #include "hp/dev/iotypes.h" /* XXX */ 12 #else 13 #include <hp/dev/iotypes.h> /* XXX */ 14 #endif 15 16 /* 17 * Hardware layout for the 98620[ABC]: 18 * 98620A (old 320s?): byte/word DMA in up to 64K chunks 19 * 98620B (320s only): 98620A with programmable IPL 20 * 98620C (all others): byte/word/longword DMA in up to 4Gb chunks 21 */ 22 23 struct dmaBdevice { 24 v_char *dmaB_addr; 25 vu_short dmaB_count; 26 vu_short dmaB_cmd; 27 #define dmaB_stat dmaB_cmd 28 }; 29 30 struct dmadevice { 31 v_char *dma_addr; 32 vu_int dma_count; 33 vu_short dma_cmd; 34 vu_short dma_stat; 35 }; 36 37 struct dmareg { 38 struct dmaBdevice dma_Bchan0; 39 struct dmaBdevice dma_Bchan1; 40 /* the rest are 98620C specific */ 41 v_char dma_id[4]; 42 vu_char dma_cr; 43 char dma_pad1[0xEB]; 44 struct dmadevice dma_chan0; 45 char dma_pad2[0xF4]; 46 struct dmadevice dma_chan1; 47 }; 48 49 #define NDMA 2 50 51 /* intr level must be >= level of any device using dma. i.e., splbio */ 52 #define DMAINTLVL 5 53 54 /* addresses */ 55 #define DMA_BASE IIOV(0x500000) 56 57 /* command bits */ 58 #define DMA_ENAB 0x0001 59 #define DMA_WORD 0x0002 60 #define DMA_WRT 0x0004 61 #define DMA_PRI 0x0008 62 #define DMA_IPL(x) (((x) - 3) << 4) 63 #define DMA_LWORD 0x0100 64 #define DMA_START 0x8000 65 66 /* status bits */ 67 #define DMA_ARMED 0x01 68 #define DMA_INTR 0x02 69 #define DMA_ACC 0x04 70 #define DMA_HALT 0x08 71 #define DMA_BERR 0x10 72 #define DMA_ALIGN 0x20 73 #define DMA_WRAP 0x40 74 75 #ifdef KERNEL 76 /* 77 * Macros to attempt to hide the HW differences between the 98620B DMA 78 * board and the 1TQ4-0401 DMA chip (68020C "board"). The latter 79 * includes emulation registers for the former but you need to access 80 * the "native-mode" registers directly in order to do 32-bit DMA. 81 * 82 * DMA_CLEAR: Clear interrupt on DMA board. We just use the 83 * emulation registers on the 98620C as that is easiest. 84 * DMA_STAT: Read status register. Again, we always read the 85 * emulation register. Someday we might want to 86 * look at the 98620C status to get the extended bits. 87 * DMA_ARM: Load address, count and kick-off DMA. 88 */ 89 #define DMA_CLEAR(dc) { v_int dmaclr = (int)dc->sc_Bhwaddr->dmaB_addr; } 90 #define DMA_STAT(dc) dc->sc_Bhwaddr->dmaB_stat 91 92 #if defined(HP320) 93 #define DMA_ARM(dc) \ 94 if (dc->sc_type == DMA_B) { \ 95 register struct dmaBdevice *dma = dc->sc_Bhwaddr; \ 96 dma->dmaB_addr = dc->sc_cur->dc_addr; \ 97 dma->dmaB_count = dc->sc_cur->dc_count - 1; \ 98 dma->dmaB_cmd = dc->sc_cmd; \ 99 } else { \ 100 register struct dmadevice *dma = dc->sc_hwaddr; \ 101 dma->dma_addr = dc->sc_cur->dc_addr; \ 102 dma->dma_count = dc->sc_cur->dc_count - 1; \ 103 dma->dma_cmd = dc->sc_cmd; \ 104 } 105 #else 106 #define DMA_ARM(dc) \ 107 { \ 108 register struct dmadevice *dma = dc->sc_hwaddr; \ 109 dma->dma_addr = dc->sc_cur->dc_addr; \ 110 dma->dma_count = dc->sc_cur->dc_count - 1; \ 111 dma->dma_cmd = dc->sc_cmd; \ 112 } 113 #endif 114 #endif 115