16df4657fSmckusick /* 26df4657fSmckusick * Copyright (c) 1988 University of Utah. 3*9639f1d4Sbostic * Copyright (c) 1990, 1993 4*9639f1d4Sbostic * The Regents of the University of California. All rights reserved. 56df4657fSmckusick * 66df4657fSmckusick * This code is derived from software contributed to Berkeley by 76df4657fSmckusick * the Systems Programming Group of the University of Utah Computer 86df4657fSmckusick * Science Department. 96df4657fSmckusick * 106df4657fSmckusick * %sccs.include.redist.c% 116df4657fSmckusick * 12a6250d32Shibler * from: Utah $Hdr: grf_rbreg.h 1.9 92/01/21$ 136df4657fSmckusick * 14*9639f1d4Sbostic * @(#)grf_rbreg.h 8.1 (Berkeley) 06/10/93 156df4657fSmckusick */ 166df4657fSmckusick 176df4657fSmckusick /* 186df4657fSmckusick * Map of the Renaissance frame buffer controller chip in memory ... 196df4657fSmckusick */ 206df4657fSmckusick 21a6250d32Shibler #include <hp/dev/iotypes.h> /* XXX */ 22a6250d32Shibler 236df4657fSmckusick #define rb_waitbusy(regaddr) \ 246df4657fSmckusick while (((struct rboxfb *)(regaddr))->wbusy & 0x01) DELAY(100) 256df4657fSmckusick 266df4657fSmckusick #define CM1RED ((struct rencm *)(ip->regbase + 0x6400)) 276df4657fSmckusick #define CM1GRN ((struct rencm *)(ip->regbase + 0x6800)) 286df4657fSmckusick #define CM1BLU ((struct rencm *)(ip->regbase + 0x6C00)) 296df4657fSmckusick #define CM2RED ((struct rencm *)(ip->regbase + 0x7400)) 306df4657fSmckusick #define CM2GRN ((struct rencm *)(ip->regbase + 0x7800)) 316df4657fSmckusick #define CM2BLU ((struct rencm *)(ip->regbase + 0x7C00)) 326df4657fSmckusick 336df4657fSmckusick struct rencm { 346df4657fSmckusick u_char :8, :8, :8; 356df4657fSmckusick vu_char value; 366df4657fSmckusick }; 376df4657fSmckusick 386df4657fSmckusick struct rboxfb { 396df4657fSmckusick u_char filler1[1]; 406df4657fSmckusick vu_char reset; /* reset register 0x01 */ 416df4657fSmckusick vu_char fb_address; /* frame buffer address 0x02 */ 426df4657fSmckusick vu_char interrupt; /* interrupt register 0x03 */ 436df4657fSmckusick u_char filler1a; 446df4657fSmckusick vu_char fbwmsb; /* frame buffer width MSB 0x05 */ 456df4657fSmckusick u_char filler1b; 466df4657fSmckusick vu_char fbwlsb; /* frame buffer width MSB 0x07 */ 476df4657fSmckusick u_char filler1c; 486df4657fSmckusick vu_char fbhmsb; /* frame buffer height MSB 0x09 */ 496df4657fSmckusick u_char filler1d; 506df4657fSmckusick vu_char fbhlsb; /* frame buffer height MSB 0x0b */ 516df4657fSmckusick u_char filler1e; 526df4657fSmckusick vu_char dwmsb; /* display width MSB 0x0d */ 536df4657fSmckusick u_char filler1f; 546df4657fSmckusick vu_char dwlsb; /* display width MSB 0x0f */ 556df4657fSmckusick u_char filler1g; 566df4657fSmckusick vu_char dhmsb; /* display height MSB 0x11 */ 576df4657fSmckusick u_char filler1h; 586df4657fSmckusick vu_char dhlsb; /* display height MSB 0x13 */ 596df4657fSmckusick u_char filler1i; 606df4657fSmckusick vu_char fbid; /* frame buffer id 0x15 */ 616df4657fSmckusick u_char filler1j[0x47]; 626df4657fSmckusick vu_char fbomsb; /* frame buffer offset MSB 0x5d */ 636df4657fSmckusick u_char filler1k; 646df4657fSmckusick vu_char fbolsb; /* frame buffer offset LSB 0x5f */ 656df4657fSmckusick u_char filler2[16359]; 666df4657fSmckusick vu_char wbusy; /* window mover is active 0x4047 */ 676df4657fSmckusick u_char filler3[0x405b - 0x4048]; 686df4657fSmckusick vu_char scanbusy; /* scan converteris active 0x405B */ 696df4657fSmckusick u_char filler3b[0x4083 - 0x405c]; 706df4657fSmckusick vu_char video_enable; /* drive vid. refresh bus 0x4083 */ 716df4657fSmckusick u_char filler4[3]; 726df4657fSmckusick vu_char display_enable; /* enable the display 0x4087 */ 736df4657fSmckusick u_char filler5[8]; 746df4657fSmckusick vu_int write_enable; /* write enable register 0x4090 */ 756df4657fSmckusick u_char filler6[11]; 766df4657fSmckusick vu_char wmove; /* start window mover 0x409f */ 776df4657fSmckusick u_char filler7[3]; 786df4657fSmckusick vu_char blink; /* blink register 0x40a3 */ 796df4657fSmckusick u_char filler8[15]; 806df4657fSmckusick vu_char fold; /* fold register 0x40b3 */ 816df4657fSmckusick vu_int opwen; /* overlay plane write enable 0x40b4 */ 826df4657fSmckusick u_char filler9[3]; 836df4657fSmckusick vu_char tmode; /* Tile mode size 0x40bb */ 846df4657fSmckusick u_char filler9a[3]; 856df4657fSmckusick vu_char drive; /* drive register 0x40bf */ 866df4657fSmckusick u_char filler10[3]; 876df4657fSmckusick vu_char vdrive; /* vdrive register 0x40c3 */ 886df4657fSmckusick u_char filler10a[0x40cb-0x40c4]; 896df4657fSmckusick vu_char zconfig; /* Z-buffer mode 0x40cb */ 906df4657fSmckusick u_char filler11a[2]; 916df4657fSmckusick vu_short tpatt; /* Transparency pattern 0x40ce */ 926df4657fSmckusick u_char filler11b[3]; 936df4657fSmckusick vu_char dmode; /* dither mode 0x40d3 */ 946df4657fSmckusick u_char filler11c[3]; 956df4657fSmckusick vu_char en_scan; /* enable scan board to DTACK 0x40d7 */ 966df4657fSmckusick u_char filler11d[0x40ef-0x40d8]; 976df4657fSmckusick vu_char rep_rule; /* replacement rule 0x40ef */ 986df4657fSmckusick u_char filler12[2]; 996df4657fSmckusick vu_short source_x; /* source x 0x40f2 */ 1006df4657fSmckusick u_char filler13[2]; 1016df4657fSmckusick vu_short source_y; /* source y 0x40f6 */ 1026df4657fSmckusick u_char filler14[2]; 1036df4657fSmckusick vu_short dest_x; /* dest x 0x40fa */ 1046df4657fSmckusick u_char filler15[2]; 1056df4657fSmckusick vu_short dest_y; /* dest y 0x40fe */ 1066df4657fSmckusick u_char filler16[2]; 1076df4657fSmckusick vu_short wwidth; /* window width 0x4102 */ 1086df4657fSmckusick u_char filler17[2]; 1096df4657fSmckusick vu_short wheight; /* window height 0x4106 */ 1106df4657fSmckusick u_char filler18[18]; 1116df4657fSmckusick vu_short patt_x; /* pattern x 0x411a */ 1126df4657fSmckusick u_char filler19[2]; 1136df4657fSmckusick vu_short patt_y; /* pattern y 0x411e */ 1146df4657fSmckusick u_char filler20[0x8012 - 0x4120]; 1156df4657fSmckusick vu_short te_status; /* transform engine status 0x8012 */ 1166df4657fSmckusick u_char filler21[0x1ffff-0x8014]; 1176df4657fSmckusick }; 118