1 /* 2 * Copyright (c) 1991, 1993 3 * The Regents of the University of California. All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * the Systems Programming Group of the University of Utah Computer 7 * Science Department. 8 * 9 * %sccs.include.redist.c% 10 * 11 * @(#)pmap.c 8.4 (Berkeley) 01/12/94 12 */ 13 14 /* 15 * HP9000/300 series physical map management code. 16 * 17 * Supports: 18 * 68020 with HP MMU models 320, 350 19 * 68020 with 68551 MMU models 318, 319, 330 (all untested) 20 * 68030 with on-chip MMU models 340, 360, 370, 345, 375, 400 21 * 68040 with on-chip MMU models 380, 425, 433 22 * 23 * Notes: 24 * Don't even pay lip service to multiprocessor support. 25 * 26 * We assume TLB entries don't have process tags (except for the 27 * supervisor/user distinction) so we only invalidate TLB entries 28 * when changing mappings for the current (or kernel) pmap. This is 29 * technically not true for the 68551 but we flush the TLB on every 30 * context switch, so it effectively winds up that way. 31 * 32 * Bitwise and/or operations are significantly faster than bitfield 33 * references so we use them when accessing STE/PTEs in the pmap_pte_* 34 * macros. Note also that the two are not always equivalent; e.g.: 35 * (*(int *)pte & PG_PROT) [4] != pte->pg_prot [1] 36 * and a couple of routines that deal with protection and wiring take 37 * some shortcuts that assume the and/or definitions. 38 * 39 * This implementation will only work for PAGE_SIZE == NBPG 40 * (i.e. 4096 bytes). 41 */ 42 43 /* 44 * Manages physical address maps. 45 * 46 * In addition to hardware address maps, this 47 * module is called upon to provide software-use-only 48 * maps which may or may not be stored in the same 49 * form as hardware maps. These pseudo-maps are 50 * used to store intermediate results from copy 51 * operations to and from address spaces. 52 * 53 * Since the information managed by this module is 54 * also stored by the logical address mapping module, 55 * this module may throw away valid virtual-to-physical 56 * mappings at almost any time. However, invalidations 57 * of virtual-to-physical mappings must be done as 58 * requested. 59 * 60 * In order to cope with hardware architectures which 61 * make virtual-to-physical map invalidates expensive, 62 * this module may delay invalidate or reduced protection 63 * operations until such time as they are actually 64 * necessary. This module is given full information as 65 * to which processors are currently using which maps, 66 * and to when physical maps must be made correct. 67 */ 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/proc.h> 72 #include <sys/malloc.h> 73 #include <sys/user.h> 74 75 #include <hp300/hp300/pte.h> 76 77 #include <vm/vm.h> 78 #include <vm/vm_kern.h> 79 #include <vm/vm_page.h> 80 81 #include <machine/cpu.h> 82 83 #ifdef PMAPSTATS 84 struct { 85 int collectscans; 86 int collectpages; 87 int kpttotal; 88 int kptinuse; 89 int kptmaxuse; 90 } kpt_stats; 91 struct { 92 int kernel; /* entering kernel mapping */ 93 int user; /* entering user mapping */ 94 int ptpneeded; /* needed to allocate a PT page */ 95 int nochange; /* no change at all */ 96 int pwchange; /* no mapping change, just wiring or protection */ 97 int wchange; /* no mapping change, just wiring */ 98 int pchange; /* no mapping change, just protection */ 99 int mchange; /* was mapped but mapping to different page */ 100 int managed; /* a managed page */ 101 int firstpv; /* first mapping for this PA */ 102 int secondpv; /* second mapping for this PA */ 103 int ci; /* cache inhibited */ 104 int unmanaged; /* not a managed page */ 105 int flushes; /* cache flushes */ 106 } enter_stats; 107 struct { 108 int calls; 109 int removes; 110 int pvfirst; 111 int pvsearch; 112 int ptinvalid; 113 int uflushes; 114 int sflushes; 115 } remove_stats; 116 struct { 117 int calls; 118 int changed; 119 int alreadyro; 120 int alreadyrw; 121 } protect_stats; 122 struct chgstats { 123 int setcalls; 124 int sethits; 125 int setmiss; 126 int clrcalls; 127 int clrhits; 128 int clrmiss; 129 } changebit_stats[16]; 130 #endif 131 132 #ifdef DEBUG 133 int debugmap = 0; 134 int pmapdebug = 0x2000; 135 #define PDB_FOLLOW 0x0001 136 #define PDB_INIT 0x0002 137 #define PDB_ENTER 0x0004 138 #define PDB_REMOVE 0x0008 139 #define PDB_CREATE 0x0010 140 #define PDB_PTPAGE 0x0020 141 #define PDB_CACHE 0x0040 142 #define PDB_BITS 0x0080 143 #define PDB_COLLECT 0x0100 144 #define PDB_PROTECT 0x0200 145 #define PDB_SEGTAB 0x0400 146 #define PDB_MULTIMAP 0x0800 147 #define PDB_PARANOIA 0x2000 148 #define PDB_WIRING 0x4000 149 #define PDB_PVDUMP 0x8000 150 151 #ifdef HAVEVAC 152 int pmapvacflush = 0; 153 #define PVF_ENTER 0x01 154 #define PVF_REMOVE 0x02 155 #define PVF_PROTECT 0x04 156 #define PVF_TOTAL 0x80 157 #endif 158 159 #if defined(HP380) 160 int dowriteback = 1; /* 68040: enable writeback caching */ 161 int dokwriteback = 1; /* 68040: enable writeback caching of kernel AS */ 162 #endif 163 164 extern vm_offset_t pager_sva, pager_eva; 165 #endif 166 167 /* 168 * Get STEs and PTEs for user/kernel address space 169 */ 170 #if defined(HP380) 171 #define pmap_ste1(m, v) \ 172 (&((m)->pm_stab[(vm_offset_t)(v) >> SG4_SHIFT1])) 173 /* XXX assumes physically contiguous ST pages (if more than one) */ 174 #define pmap_ste2(m, v) \ 175 (&((m)->pm_stab[(st_entry_t *)(*(u_int *)pmap_ste1(m, v) & SG4_ADDR1) \ 176 - (m)->pm_stpa + (((v) & SG4_MASK2) >> SG4_SHIFT2)])) 177 #define pmap_ste(m, v) \ 178 (&((m)->pm_stab[(vm_offset_t)(v) \ 179 >> (mmutype == MMU_68040 ? SG4_SHIFT1 : SG_ISHIFT)])) 180 #define pmap_ste_v(m, v) \ 181 (mmutype == MMU_68040 \ 182 ? ((*(int *)pmap_ste1(m, v) & SG_V) && \ 183 (*(int *)pmap_ste2(m, v) & SG_V)) \ 184 : (*(int *)pmap_ste(m, v) & SG_V)) 185 #else 186 #define pmap_ste(m, v) (&((m)->pm_stab[(vm_offset_t)(v) >> SG_ISHIFT])) 187 #define pmap_ste_v(m, v) (*(int *)pmap_ste(m, v) & SG_V) 188 #endif 189 190 #define pmap_pte(m, v) (&((m)->pm_ptab[(vm_offset_t)(v) >> PG_SHIFT])) 191 #define pmap_pte_pa(pte) (*(int *)(pte) & PG_FRAME) 192 #define pmap_pte_w(pte) (*(int *)(pte) & PG_W) 193 #define pmap_pte_ci(pte) (*(int *)(pte) & PG_CI) 194 #define pmap_pte_m(pte) (*(int *)(pte) & PG_M) 195 #define pmap_pte_u(pte) (*(int *)(pte) & PG_U) 196 #define pmap_pte_prot(pte) (*(int *)(pte) & PG_PROT) 197 #define pmap_pte_v(pte) (*(int *)(pte) & PG_V) 198 199 #define pmap_pte_set_w(pte, v) \ 200 if (v) *(int *)(pte) |= PG_W; else *(int *)(pte) &= ~PG_W 201 #define pmap_pte_set_prot(pte, v) \ 202 if (v) *(int *)(pte) |= PG_PROT; else *(int *)(pte) &= ~PG_PROT 203 #define pmap_pte_w_chg(pte, nw) ((nw) ^ pmap_pte_w(pte)) 204 #define pmap_pte_prot_chg(pte, np) ((np) ^ pmap_pte_prot(pte)) 205 206 /* 207 * Given a map and a machine independent protection code, 208 * convert to an hp300 protection code. 209 */ 210 #define pte_prot(m, p) (protection_codes[p]) 211 int protection_codes[8]; 212 213 /* 214 * Kernel page table page management. 215 */ 216 struct kpt_page { 217 struct kpt_page *kpt_next; /* link on either used or free list */ 218 vm_offset_t kpt_va; /* always valid kernel VA */ 219 vm_offset_t kpt_pa; /* PA of this page (for speed) */ 220 }; 221 struct kpt_page *kpt_free_list, *kpt_used_list; 222 struct kpt_page *kpt_pages; 223 224 /* 225 * Kernel segment/page table and page table map. 226 * The page table map gives us a level of indirection we need to dynamically 227 * expand the page table. It is essentially a copy of the segment table 228 * with PTEs instead of STEs. All are initialized in locore at boot time. 229 * Sysmap will initially contain VM_KERNEL_PT_PAGES pages of PTEs. 230 * Segtabzero is an empty segment table which all processes share til they 231 * reference something. 232 */ 233 st_entry_t *Sysseg; 234 pt_entry_t *Sysmap, *Sysptmap; 235 st_entry_t *Segtabzero, *Segtabzeropa; 236 vm_size_t Sysptsize = VM_KERNEL_PT_PAGES; 237 238 struct pmap kernel_pmap_store; 239 vm_map_t pt_map; 240 241 vm_offset_t avail_start; /* PA of first available physical page */ 242 vm_offset_t avail_end; /* PA of last available physical page */ 243 vm_size_t mem_size; /* memory size in bytes */ 244 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss)*/ 245 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 246 vm_offset_t vm_first_phys; /* PA of first managed page */ 247 vm_offset_t vm_last_phys; /* PA just past last managed page */ 248 boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 249 char *pmap_attributes; /* reference and modify bits */ 250 #ifdef HAVEVAC 251 int pmap_aliasmask; /* seperation at which VA aliasing ok */ 252 #endif 253 #if defined(HP380) 254 int protostfree; /* prototype (default) free ST map */ 255 #endif 256 257 /* 258 * Internal routines 259 */ 260 void pmap_remove_mapping __P((pmap_t, vm_offset_t, pt_entry_t *, int)); 261 boolean_t pmap_testbit __P((vm_offset_t, int)); 262 void pmap_changebit __P((vm_offset_t, int, boolean_t)); 263 void pmap_enter_ptpage __P((pmap_t, vm_offset_t)); 264 #ifdef DEBUG 265 void pmap_pvdump __P((vm_offset_t)); 266 void pmap_check_wiring __P((char *, vm_offset_t)); 267 #endif 268 269 /* pmap_remove_mapping flags */ 270 #define PRM_TFLUSH 1 271 #define PRM_CFLUSH 2 272 273 /* 274 * Bootstrap memory allocator. This function allows for early dynamic 275 * memory allocation until the virtual memory system has been bootstrapped. 276 * After that point, either kmem_alloc or malloc should be used. This 277 * function works by stealing pages from the (to be) managed page pool, 278 * stealing virtual address space, then mapping the pages and zeroing them. 279 * 280 * It should be used from pmap_bootstrap till vm_page_startup, afterwards 281 * it cannot be used, and will generate a panic if tried. Note that this 282 * memory will never be freed, and in essence it is wired down. 283 */ 284 void * 285 pmap_bootstrap_alloc(size) 286 int size; 287 { 288 extern boolean_t vm_page_startup_initialized; 289 vm_offset_t val; 290 291 if (vm_page_startup_initialized) 292 panic("pmap_bootstrap_alloc: called after startup initialized"); 293 size = round_page(size); 294 val = virtual_avail; 295 296 virtual_avail = pmap_map(virtual_avail, avail_start, 297 avail_start + size, VM_PROT_READ|VM_PROT_WRITE); 298 avail_start += size; 299 300 blkclr ((caddr_t) val, size); 301 return ((void *) val); 302 } 303 304 /* 305 * Initialize the pmap module. 306 * Called by vm_init, to initialize any structures that the pmap 307 * system needs to map virtual memory. 308 */ 309 void 310 pmap_init(phys_start, phys_end) 311 vm_offset_t phys_start, phys_end; 312 { 313 vm_offset_t addr, addr2; 314 vm_size_t npg, s; 315 int rv; 316 extern char kstack[]; 317 318 #ifdef DEBUG 319 if (pmapdebug & PDB_FOLLOW) 320 printf("pmap_init(%x, %x)\n", phys_start, phys_end); 321 #endif 322 /* 323 * Now that kernel map has been allocated, we can mark as 324 * unavailable regions which we have mapped in locore. 325 */ 326 addr = (vm_offset_t) intiobase; 327 (void) vm_map_find(kernel_map, NULL, (vm_offset_t) 0, 328 &addr, hp300_ptob(IIOMAPSIZE+EIOMAPSIZE), FALSE); 329 if (addr != (vm_offset_t)intiobase) 330 goto bogons; 331 addr = (vm_offset_t) Sysmap; 332 vm_object_reference(kernel_object); 333 (void) vm_map_find(kernel_map, kernel_object, addr, 334 &addr, HP_MAX_PTSIZE, FALSE); 335 /* 336 * If this fails it is probably because the static portion of 337 * the kernel page table isn't big enough and we overran the 338 * page table map. Need to adjust pmap_size() in hp300_init.c. 339 */ 340 if (addr != (vm_offset_t)Sysmap) 341 goto bogons; 342 343 addr = (vm_offset_t) kstack; 344 vm_object_reference(kernel_object); 345 (void) vm_map_find(kernel_map, kernel_object, addr, 346 &addr, hp300_ptob(UPAGES), FALSE); 347 if (addr != (vm_offset_t)kstack) 348 bogons: 349 panic("pmap_init: bogons in the VM system!\n"); 350 351 #ifdef DEBUG 352 if (pmapdebug & PDB_INIT) { 353 printf("pmap_init: Sysseg %x, Sysmap %x, Sysptmap %x\n", 354 Sysseg, Sysmap, Sysptmap); 355 printf(" pstart %x, pend %x, vstart %x, vend %x\n", 356 avail_start, avail_end, virtual_avail, virtual_end); 357 } 358 #endif 359 360 /* 361 * Allocate memory for random pmap data structures. Includes the 362 * initial segment table, pv_head_table and pmap_attributes. 363 */ 364 npg = atop(phys_end - phys_start); 365 s = (vm_size_t) (HP_STSIZE + sizeof(struct pv_entry) * npg + npg); 366 s = round_page(s); 367 addr = (vm_offset_t) kmem_alloc(kernel_map, s); 368 Segtabzero = (st_entry_t *) addr; 369 Segtabzeropa = (st_entry_t *) pmap_extract(kernel_pmap, addr); 370 addr += HP_STSIZE; 371 pv_table = (pv_entry_t) addr; 372 addr += sizeof(struct pv_entry) * npg; 373 pmap_attributes = (char *) addr; 374 #ifdef DEBUG 375 if (pmapdebug & PDB_INIT) 376 printf("pmap_init: %x bytes: npg %x s0 %x(%x) tbl %x atr %x\n", 377 s, npg, Segtabzero, Segtabzeropa, 378 pv_table, pmap_attributes); 379 #endif 380 381 /* 382 * Allocate physical memory for kernel PT pages and their management. 383 * We need 1 PT page per possible task plus some slop. 384 */ 385 npg = min(atop(HP_MAX_KPTSIZE), maxproc+16); 386 s = ptoa(npg) + round_page(npg * sizeof(struct kpt_page)); 387 388 /* 389 * Verify that space will be allocated in region for which 390 * we already have kernel PT pages. 391 */ 392 addr = 0; 393 rv = vm_map_find(kernel_map, NULL, 0, &addr, s, TRUE); 394 if (rv != KERN_SUCCESS || addr + s >= (vm_offset_t)Sysmap) 395 panic("pmap_init: kernel PT too small"); 396 vm_map_remove(kernel_map, addr, addr + s); 397 398 /* 399 * Now allocate the space and link the pages together to 400 * form the KPT free list. 401 */ 402 addr = (vm_offset_t) kmem_alloc(kernel_map, s); 403 s = ptoa(npg); 404 addr2 = addr + s; 405 kpt_pages = &((struct kpt_page *)addr2)[npg]; 406 kpt_free_list = (struct kpt_page *) 0; 407 do { 408 addr2 -= HP_PAGE_SIZE; 409 (--kpt_pages)->kpt_next = kpt_free_list; 410 kpt_free_list = kpt_pages; 411 kpt_pages->kpt_va = addr2; 412 kpt_pages->kpt_pa = pmap_extract(kernel_pmap, addr2); 413 } while (addr != addr2); 414 #ifdef PMAPSTATS 415 kpt_stats.kpttotal = atop(s); 416 #endif 417 #ifdef DEBUG 418 if (pmapdebug & PDB_INIT) 419 printf("pmap_init: KPT: %d pages from %x to %x\n", 420 atop(s), addr, addr + s); 421 #endif 422 423 /* 424 * Slightly modified version of kmem_suballoc() to get page table 425 * map where we want it. 426 */ 427 addr = HP_PTBASE; 428 s = min(HP_PTMAXSIZE, maxproc*HP_MAX_PTSIZE); 429 addr2 = addr + s; 430 rv = vm_map_find(kernel_map, NULL, 0, &addr, s, TRUE); 431 if (rv != KERN_SUCCESS) 432 panic("pmap_init: cannot allocate space for PT map"); 433 pmap_reference(vm_map_pmap(kernel_map)); 434 pt_map = vm_map_create(vm_map_pmap(kernel_map), addr, addr2, TRUE); 435 if (pt_map == NULL) 436 panic("pmap_init: cannot create pt_map"); 437 rv = vm_map_submap(kernel_map, addr, addr2, pt_map); 438 if (rv != KERN_SUCCESS) 439 panic("pmap_init: cannot map range to pt_map"); 440 #ifdef DEBUG 441 if (pmapdebug & PDB_INIT) 442 printf("pmap_init: pt_map [%x - %x)\n", addr, addr2); 443 #endif 444 445 #if defined(HP380) 446 if (mmutype == MMU_68040) { 447 protostfree = ~l2tobm(0); 448 for (rv = MAXUL2SIZE; rv < sizeof(protostfree)*NBBY; rv++) 449 protostfree &= ~l2tobm(rv); 450 } 451 #endif 452 453 /* 454 * Now it is safe to enable pv_table recording. 455 */ 456 vm_first_phys = phys_start; 457 vm_last_phys = phys_end; 458 pmap_initialized = TRUE; 459 } 460 461 /* 462 * Used to map a range of physical addresses into kernel 463 * virtual address space. 464 * 465 * For now, VM is already on, we only need to map the 466 * specified memory. 467 */ 468 vm_offset_t 469 pmap_map(virt, start, end, prot) 470 vm_offset_t virt; 471 vm_offset_t start; 472 vm_offset_t end; 473 int prot; 474 { 475 #ifdef DEBUG 476 if (pmapdebug & PDB_FOLLOW) 477 printf("pmap_map(%x, %x, %x, %x)\n", virt, start, end, prot); 478 #endif 479 while (start < end) { 480 pmap_enter(kernel_pmap, virt, start, prot, FALSE); 481 virt += PAGE_SIZE; 482 start += PAGE_SIZE; 483 } 484 return(virt); 485 } 486 487 /* 488 * Create and return a physical map. 489 * 490 * If the size specified for the map 491 * is zero, the map is an actual physical 492 * map, and may be referenced by the 493 * hardware. 494 * 495 * If the size specified is non-zero, 496 * the map will be used in software only, and 497 * is bounded by that size. 498 */ 499 pmap_t 500 pmap_create(size) 501 vm_size_t size; 502 { 503 register pmap_t pmap; 504 505 #ifdef DEBUG 506 if (pmapdebug & (PDB_FOLLOW|PDB_CREATE)) 507 printf("pmap_create(%x)\n", size); 508 #endif 509 /* 510 * Software use map does not need a pmap 511 */ 512 if (size) 513 return(NULL); 514 515 /* XXX: is it ok to wait here? */ 516 pmap = (pmap_t) malloc(sizeof *pmap, M_VMPMAP, M_WAITOK); 517 #ifdef notifwewait 518 if (pmap == NULL) 519 panic("pmap_create: cannot allocate a pmap"); 520 #endif 521 bzero(pmap, sizeof(*pmap)); 522 pmap_pinit(pmap); 523 return (pmap); 524 } 525 526 /* 527 * Initialize a preallocated and zeroed pmap structure, 528 * such as one in a vmspace structure. 529 */ 530 void 531 pmap_pinit(pmap) 532 register struct pmap *pmap; 533 { 534 535 #ifdef DEBUG 536 if (pmapdebug & (PDB_FOLLOW|PDB_CREATE)) 537 printf("pmap_pinit(%x)\n", pmap); 538 #endif 539 /* 540 * No need to allocate page table space yet but we do need a 541 * valid segment table. Initially, we point everyone at the 542 * "null" segment table. On the first pmap_enter, a real 543 * segment table will be allocated. 544 */ 545 pmap->pm_stab = Segtabzero; 546 pmap->pm_stpa = Segtabzeropa; 547 #if defined(HP380) 548 if (mmutype == MMU_68040) 549 pmap->pm_stfree = protostfree; 550 #endif 551 pmap->pm_stchanged = TRUE; 552 pmap->pm_count = 1; 553 simple_lock_init(&pmap->pm_lock); 554 } 555 556 /* 557 * Retire the given physical map from service. 558 * Should only be called if the map contains 559 * no valid mappings. 560 */ 561 void 562 pmap_destroy(pmap) 563 register pmap_t pmap; 564 { 565 int count; 566 567 #ifdef DEBUG 568 if (pmapdebug & PDB_FOLLOW) 569 printf("pmap_destroy(%x)\n", pmap); 570 #endif 571 if (pmap == NULL) 572 return; 573 574 simple_lock(&pmap->pm_lock); 575 count = --pmap->pm_count; 576 simple_unlock(&pmap->pm_lock); 577 if (count == 0) { 578 pmap_release(pmap); 579 free((caddr_t)pmap, M_VMPMAP); 580 } 581 } 582 583 /* 584 * Release any resources held by the given physical map. 585 * Called when a pmap initialized by pmap_pinit is being released. 586 * Should only be called if the map contains no valid mappings. 587 */ 588 void 589 pmap_release(pmap) 590 register struct pmap *pmap; 591 { 592 593 #ifdef DEBUG 594 if (pmapdebug & PDB_FOLLOW) 595 printf("pmap_release(%x)\n", pmap); 596 #endif 597 #ifdef notdef /* DIAGNOSTIC */ 598 /* count would be 0 from pmap_destroy... */ 599 simple_lock(&pmap->pm_lock); 600 if (pmap->pm_count != 1) 601 panic("pmap_release count"); 602 #endif 603 if (pmap->pm_ptab) 604 kmem_free_wakeup(pt_map, (vm_offset_t)pmap->pm_ptab, 605 HP_MAX_PTSIZE); 606 if (pmap->pm_stab != Segtabzero) 607 kmem_free(kernel_map, (vm_offset_t)pmap->pm_stab, HP_STSIZE); 608 } 609 610 /* 611 * Add a reference to the specified pmap. 612 */ 613 void 614 pmap_reference(pmap) 615 pmap_t pmap; 616 { 617 #ifdef DEBUG 618 if (pmapdebug & PDB_FOLLOW) 619 printf("pmap_reference(%x)\n", pmap); 620 #endif 621 if (pmap != NULL) { 622 simple_lock(&pmap->pm_lock); 623 pmap->pm_count++; 624 simple_unlock(&pmap->pm_lock); 625 } 626 } 627 628 /* 629 * Remove the given range of addresses from the specified map. 630 * 631 * It is assumed that the start and end are properly 632 * rounded to the page size. 633 */ 634 void 635 pmap_remove(pmap, sva, eva) 636 register pmap_t pmap; 637 register vm_offset_t sva, eva; 638 { 639 register vm_offset_t nssva; 640 register pt_entry_t *pte; 641 boolean_t firstpage, needcflush; 642 int flags; 643 644 #ifdef DEBUG 645 if (pmapdebug & (PDB_FOLLOW|PDB_REMOVE|PDB_PROTECT)) 646 printf("pmap_remove(%x, %x, %x)\n", pmap, sva, eva); 647 #endif 648 649 if (pmap == NULL) 650 return; 651 652 #ifdef PMAPSTATS 653 remove_stats.calls++; 654 #endif 655 firstpage = TRUE; 656 needcflush = FALSE; 657 flags = active_pmap(pmap) ? PRM_TFLUSH : 0; 658 while (sva < eva) { 659 nssva = hp300_trunc_seg(sva) + HP_SEG_SIZE; 660 if (nssva == 0 || nssva > eva) 661 nssva = eva; 662 /* 663 * If VA belongs to an unallocated segment, 664 * skip to the next segment boundary. 665 */ 666 if (!pmap_ste_v(pmap, sva)) { 667 sva = nssva; 668 continue; 669 } 670 /* 671 * Invalidate every valid mapping within this segment. 672 */ 673 pte = pmap_pte(pmap, sva); 674 while (sva < nssva) { 675 if (pmap_pte_v(pte)) { 676 #ifdef HAVEVAC 677 if (pmap_aliasmask) { 678 /* 679 * Purge kernel side of VAC to ensure 680 * we get the correct state of any 681 * hardware maintained bits. 682 */ 683 if (firstpage) { 684 DCIS(); 685 #ifdef PMAPSTATS 686 remove_stats.sflushes++; 687 #endif 688 } 689 /* 690 * Remember if we may need to 691 * flush the VAC due to a non-CI 692 * mapping. 693 */ 694 if (!needcflush && !pmap_pte_ci(pte)) 695 needcflush = TRUE; 696 697 } 698 #endif 699 pmap_remove_mapping(pmap, sva, pte, flags); 700 firstpage = FALSE; 701 } 702 pte++; 703 sva += PAGE_SIZE; 704 } 705 } 706 /* 707 * Didn't do anything, no need for cache flushes 708 */ 709 if (firstpage) 710 return; 711 #ifdef HAVEVAC 712 /* 713 * In a couple of cases, we don't need to worry about flushing 714 * the VAC: 715 * 1. if this is a kernel mapping, 716 * we have already done it 717 * 2. if it is a user mapping not for the current process, 718 * it won't be there 719 */ 720 if (pmap_aliasmask && 721 (pmap == kernel_pmap || pmap != curproc->p_vmspace->vm_map.pmap)) 722 needcflush = FALSE; 723 #ifdef DEBUG 724 if (pmap_aliasmask && (pmapvacflush & PVF_REMOVE)) { 725 if (pmapvacflush & PVF_TOTAL) 726 DCIA(); 727 else if (pmap == kernel_pmap) 728 DCIS(); 729 else 730 DCIU(); 731 } else 732 #endif 733 if (needcflush) { 734 if (pmap == kernel_pmap) { 735 DCIS(); 736 #ifdef PMAPSTATS 737 remove_stats.sflushes++; 738 #endif 739 } else { 740 DCIU(); 741 #ifdef PMAPSTATS 742 remove_stats.uflushes++; 743 #endif 744 } 745 } 746 #endif 747 } 748 749 /* 750 * pmap_page_protect: 751 * 752 * Lower the permission for all mappings to a given page. 753 */ 754 void 755 pmap_page_protect(pa, prot) 756 vm_offset_t pa; 757 vm_prot_t prot; 758 { 759 register pv_entry_t pv; 760 int s; 761 762 #ifdef DEBUG 763 if ((pmapdebug & (PDB_FOLLOW|PDB_PROTECT)) || 764 prot == VM_PROT_NONE && (pmapdebug & PDB_REMOVE)) 765 printf("pmap_page_protect(%x, %x)\n", pa, prot); 766 #endif 767 if (pa < vm_first_phys || pa >= vm_last_phys) 768 return; 769 770 switch (prot) { 771 case VM_PROT_READ|VM_PROT_WRITE: 772 case VM_PROT_ALL: 773 return; 774 /* copy_on_write */ 775 case VM_PROT_READ: 776 case VM_PROT_READ|VM_PROT_EXECUTE: 777 pmap_changebit(pa, PG_RO, TRUE); 778 return; 779 /* remove_all */ 780 default: 781 break; 782 } 783 pv = pa_to_pvh(pa); 784 s = splimp(); 785 while (pv->pv_pmap != NULL) { 786 register pt_entry_t *pte; 787 788 pte = pmap_pte(pv->pv_pmap, pv->pv_va); 789 #ifdef DEBUG 790 if (!pmap_ste_v(pv->pv_pmap, pv->pv_va) || 791 pmap_pte_pa(pte) != pa) 792 panic("pmap_page_protect: bad mapping"); 793 #endif 794 if (!pmap_pte_w(pte)) 795 pmap_remove_mapping(pv->pv_pmap, pv->pv_va, 796 pte, PRM_TFLUSH|PRM_CFLUSH); 797 else { 798 pv = pv->pv_next; 799 #ifdef DEBUG 800 if (pmapdebug & PDB_PARANOIA) 801 printf("%s wired mapping for %x not removed\n", 802 "pmap_page_protect:", pa); 803 #endif 804 } 805 } 806 splx(s); 807 } 808 809 /* 810 * Set the physical protection on the 811 * specified range of this map as requested. 812 */ 813 void 814 pmap_protect(pmap, sva, eva, prot) 815 register pmap_t pmap; 816 register vm_offset_t sva, eva; 817 vm_prot_t prot; 818 { 819 register vm_offset_t nssva; 820 register pt_entry_t *pte; 821 boolean_t firstpage, needtflush; 822 int isro; 823 824 #ifdef DEBUG 825 if (pmapdebug & (PDB_FOLLOW|PDB_PROTECT)) 826 printf("pmap_protect(%x, %x, %x, %x)\n", pmap, sva, eva, prot); 827 #endif 828 829 if (pmap == NULL) 830 return; 831 832 #ifdef PMAPSTATS 833 protect_stats.calls++; 834 #endif 835 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 836 pmap_remove(pmap, sva, eva); 837 return; 838 } 839 if (prot & VM_PROT_WRITE) 840 return; 841 842 isro = pte_prot(pmap, prot); 843 needtflush = active_pmap(pmap); 844 firstpage = TRUE; 845 while (sva < eva) { 846 nssva = hp300_trunc_seg(sva) + HP_SEG_SIZE; 847 if (nssva == 0 || nssva > eva) 848 nssva = eva; 849 /* 850 * If VA belongs to an unallocated segment, 851 * skip to the next segment boundary. 852 */ 853 if (!pmap_ste_v(pmap, sva)) { 854 sva = nssva; 855 continue; 856 } 857 /* 858 * Change protection on mapping if it is valid and doesn't 859 * already have the correct protection. 860 */ 861 pte = pmap_pte(pmap, sva); 862 while (sva < nssva) { 863 if (pmap_pte_v(pte) && pmap_pte_prot_chg(pte, isro)) { 864 #ifdef HAVEVAC 865 /* 866 * Purge kernel side of VAC to ensure we 867 * get the correct state of any hardware 868 * maintained bits. 869 * 870 * XXX do we need to clear the VAC in 871 * general to reflect the new protection? 872 */ 873 if (firstpage && pmap_aliasmask) 874 DCIS(); 875 #endif 876 #if defined(HP380) 877 /* 878 * Clear caches if making RO (see section 879 * "7.3 Cache Coherency" in the manual). 880 */ 881 if (isro && mmutype == MMU_68040) { 882 vm_offset_t pa = pmap_pte_pa(pte); 883 884 DCFP(pa); 885 ICPP(pa); 886 } 887 #endif 888 pmap_pte_set_prot(pte, isro); 889 if (needtflush) 890 TBIS(sva); 891 #ifdef PMAPSTATS 892 protect_stats.changed++; 893 #endif 894 firstpage = FALSE; 895 } 896 #ifdef PMAPSTATS 897 else if (pmap_pte_v(pte)) { 898 if (isro) 899 protect_stats.alreadyro++; 900 else 901 protect_stats.alreadyrw++; 902 } 903 #endif 904 pte++; 905 sva += PAGE_SIZE; 906 } 907 } 908 #if defined(HAVEVAC) && defined(DEBUG) 909 if (pmap_aliasmask && (pmapvacflush & PVF_PROTECT)) { 910 if (pmapvacflush & PVF_TOTAL) 911 DCIA(); 912 else if (pmap == kernel_pmap) 913 DCIS(); 914 else 915 DCIU(); 916 } 917 #endif 918 } 919 920 /* 921 * Insert the given physical page (p) at 922 * the specified virtual address (v) in the 923 * target physical map with the protection requested. 924 * 925 * If specified, the page will be wired down, meaning 926 * that the related pte can not be reclaimed. 927 * 928 * NB: This is the only routine which MAY NOT lazy-evaluate 929 * or lose information. That is, this routine must actually 930 * insert this page into the given map NOW. 931 */ 932 void 933 pmap_enter(pmap, va, pa, prot, wired) 934 register pmap_t pmap; 935 vm_offset_t va; 936 register vm_offset_t pa; 937 vm_prot_t prot; 938 boolean_t wired; 939 { 940 register pt_entry_t *pte; 941 register int npte; 942 vm_offset_t opa; 943 boolean_t cacheable = TRUE; 944 boolean_t checkpv = TRUE; 945 946 #ifdef DEBUG 947 if (pmapdebug & (PDB_FOLLOW|PDB_ENTER)) 948 printf("pmap_enter(%x, %x, %x, %x, %x)\n", 949 pmap, va, pa, prot, wired); 950 #endif 951 if (pmap == NULL) 952 return; 953 954 #ifdef PMAPSTATS 955 if (pmap == kernel_pmap) 956 enter_stats.kernel++; 957 else 958 enter_stats.user++; 959 #endif 960 /* 961 * For user mapping, allocate kernel VM resources if necessary. 962 */ 963 if (pmap->pm_ptab == NULL) 964 pmap->pm_ptab = (pt_entry_t *) 965 kmem_alloc_wait(pt_map, HP_MAX_PTSIZE); 966 967 /* 968 * Segment table entry not valid, we need a new PT page 969 */ 970 if (!pmap_ste_v(pmap, va)) 971 pmap_enter_ptpage(pmap, va); 972 973 pa = hp300_trunc_page(pa); 974 pte = pmap_pte(pmap, va); 975 opa = pmap_pte_pa(pte); 976 #ifdef DEBUG 977 if (pmapdebug & PDB_ENTER) 978 printf("enter: pte %x, *pte %x\n", pte, *(int *)pte); 979 #endif 980 981 /* 982 * Mapping has not changed, must be protection or wiring change. 983 */ 984 if (opa == pa) { 985 #ifdef PMAPSTATS 986 enter_stats.pwchange++; 987 #endif 988 /* 989 * Wiring change, just update stats. 990 * We don't worry about wiring PT pages as they remain 991 * resident as long as there are valid mappings in them. 992 * Hence, if a user page is wired, the PT page will be also. 993 */ 994 if (pmap_pte_w_chg(pte, wired ? PG_W : 0)) { 995 #ifdef DEBUG 996 if (pmapdebug & PDB_ENTER) 997 printf("enter: wiring change -> %x\n", wired); 998 #endif 999 if (wired) 1000 pmap->pm_stats.wired_count++; 1001 else 1002 pmap->pm_stats.wired_count--; 1003 #ifdef PMAPSTATS 1004 if (pmap_pte_prot(pte) == pte_prot(pmap, prot)) 1005 enter_stats.wchange++; 1006 #endif 1007 } 1008 #ifdef PMAPSTATS 1009 else if (pmap_pte_prot(pte) != pte_prot(pmap, prot)) 1010 enter_stats.pchange++; 1011 else 1012 enter_stats.nochange++; 1013 #endif 1014 /* 1015 * Retain cache inhibition status 1016 */ 1017 checkpv = FALSE; 1018 if (pmap_pte_ci(pte)) 1019 cacheable = FALSE; 1020 goto validate; 1021 } 1022 1023 /* 1024 * Mapping has changed, invalidate old range and fall through to 1025 * handle validating new mapping. 1026 */ 1027 if (opa) { 1028 #ifdef DEBUG 1029 if (pmapdebug & PDB_ENTER) 1030 printf("enter: removing old mapping %x\n", va); 1031 #endif 1032 pmap_remove_mapping(pmap, va, pte, PRM_TFLUSH|PRM_CFLUSH); 1033 #ifdef PMAPSTATS 1034 enter_stats.mchange++; 1035 #endif 1036 } 1037 1038 /* 1039 * If this is a new user mapping, increment the wiring count 1040 * on this PT page. PT pages are wired down as long as there 1041 * is a valid mapping in the page. 1042 */ 1043 if (pmap != kernel_pmap) 1044 (void) vm_map_pageable(pt_map, trunc_page(pte), 1045 round_page(pte+1), FALSE); 1046 1047 /* 1048 * Enter on the PV list if part of our managed memory 1049 * Note that we raise IPL while manipulating pv_table 1050 * since pmap_enter can be called at interrupt time. 1051 */ 1052 if (pa >= vm_first_phys && pa < vm_last_phys) { 1053 register pv_entry_t pv, npv; 1054 int s; 1055 1056 #ifdef PMAPSTATS 1057 enter_stats.managed++; 1058 #endif 1059 pv = pa_to_pvh(pa); 1060 s = splimp(); 1061 #ifdef DEBUG 1062 if (pmapdebug & PDB_ENTER) 1063 printf("enter: pv at %x: %x/%x/%x\n", 1064 pv, pv->pv_va, pv->pv_pmap, pv->pv_next); 1065 #endif 1066 /* 1067 * No entries yet, use header as the first entry 1068 */ 1069 if (pv->pv_pmap == NULL) { 1070 #ifdef PMAPSTATS 1071 enter_stats.firstpv++; 1072 #endif 1073 pv->pv_va = va; 1074 pv->pv_pmap = pmap; 1075 pv->pv_next = NULL; 1076 pv->pv_ptste = NULL; 1077 pv->pv_ptpmap = NULL; 1078 pv->pv_flags = 0; 1079 } 1080 /* 1081 * There is at least one other VA mapping this page. 1082 * Place this entry after the header. 1083 */ 1084 else { 1085 #ifdef DEBUG 1086 for (npv = pv; npv; npv = npv->pv_next) 1087 if (pmap == npv->pv_pmap && va == npv->pv_va) 1088 panic("pmap_enter: already in pv_tab"); 1089 #endif 1090 npv = (pv_entry_t) 1091 malloc(sizeof *npv, M_VMPVENT, M_NOWAIT); 1092 npv->pv_va = va; 1093 npv->pv_pmap = pmap; 1094 npv->pv_next = pv->pv_next; 1095 npv->pv_ptste = NULL; 1096 npv->pv_ptpmap = NULL; 1097 npv->pv_flags = 0; 1098 pv->pv_next = npv; 1099 #ifdef PMAPSTATS 1100 if (!npv->pv_next) 1101 enter_stats.secondpv++; 1102 #endif 1103 #ifdef HAVEVAC 1104 /* 1105 * Since there is another logical mapping for the 1106 * same page we may need to cache-inhibit the 1107 * descriptors on those CPUs with external VACs. 1108 * We don't need to CI if: 1109 * 1110 * - No two mappings belong to the same user pmaps. 1111 * Since the cache is flushed on context switches 1112 * there is no problem between user processes. 1113 * 1114 * - Mappings within a single pmap are a certain 1115 * magic distance apart. VAs at these appropriate 1116 * boundaries map to the same cache entries or 1117 * otherwise don't conflict. 1118 * 1119 * To keep it simple, we only check for these special 1120 * cases if there are only two mappings, otherwise we 1121 * punt and always CI. 1122 * 1123 * Note that there are no aliasing problems with the 1124 * on-chip data-cache when the WA bit is set. 1125 */ 1126 if (pmap_aliasmask) { 1127 if (pv->pv_flags & PV_CI) { 1128 #ifdef DEBUG 1129 if (pmapdebug & PDB_CACHE) 1130 printf("enter: pa %x already CI'ed\n", 1131 pa); 1132 #endif 1133 checkpv = cacheable = FALSE; 1134 } else if (npv->pv_next || 1135 ((pmap == pv->pv_pmap || 1136 pmap == kernel_pmap || 1137 pv->pv_pmap == kernel_pmap) && 1138 ((pv->pv_va & pmap_aliasmask) != 1139 (va & pmap_aliasmask)))) { 1140 #ifdef DEBUG 1141 if (pmapdebug & PDB_CACHE) 1142 printf("enter: pa %x CI'ing all\n", 1143 pa); 1144 #endif 1145 cacheable = FALSE; 1146 pv->pv_flags |= PV_CI; 1147 #ifdef PMAPSTATS 1148 enter_stats.ci++; 1149 #endif 1150 } 1151 } 1152 #endif 1153 } 1154 splx(s); 1155 } 1156 /* 1157 * Assumption: if it is not part of our managed memory 1158 * then it must be device memory which may be volitile. 1159 */ 1160 else if (pmap_initialized) { 1161 checkpv = cacheable = FALSE; 1162 #ifdef PMAPSTATS 1163 enter_stats.unmanaged++; 1164 #endif 1165 } 1166 1167 /* 1168 * Increment counters 1169 */ 1170 pmap->pm_stats.resident_count++; 1171 if (wired) 1172 pmap->pm_stats.wired_count++; 1173 1174 validate: 1175 #ifdef HAVEVAC 1176 /* 1177 * Purge kernel side of VAC to ensure we get correct state 1178 * of HW bits so we don't clobber them. 1179 */ 1180 if (pmap_aliasmask) 1181 DCIS(); 1182 #endif 1183 /* 1184 * Build the new PTE. 1185 */ 1186 npte = pa | pte_prot(pmap, prot) | (*(int *)pte & (PG_M|PG_U)) | PG_V; 1187 if (wired) 1188 npte |= PG_W; 1189 if (!checkpv && !cacheable) 1190 npte |= PG_CI; 1191 #if defined(HP380) 1192 if (mmutype == MMU_68040 && (npte & (PG_PROT|PG_CI)) == PG_RW) 1193 #ifdef DEBUG 1194 if (dowriteback && (dokwriteback || pmap != kernel_pmap)) 1195 #endif 1196 npte |= PG_CCB; 1197 #endif 1198 #ifdef DEBUG 1199 if (pmapdebug & PDB_ENTER) 1200 printf("enter: new pte value %x\n", npte); 1201 #endif 1202 /* 1203 * Remember if this was a wiring-only change. 1204 * If so, we need not flush the TLB and caches. 1205 */ 1206 wired = ((*(int *)pte ^ npte) == PG_W); 1207 #if defined(HP380) 1208 if (mmutype == MMU_68040 && !wired) { 1209 DCFP(pa); 1210 ICPP(pa); 1211 } 1212 #endif 1213 *(int *)pte = npte; 1214 if (!wired && active_pmap(pmap)) 1215 TBIS(va); 1216 #ifdef HAVEVAC 1217 /* 1218 * The following is executed if we are entering a second 1219 * (or greater) mapping for a physical page and the mappings 1220 * may create an aliasing problem. In this case we must 1221 * cache inhibit the descriptors involved and flush any 1222 * external VAC. 1223 */ 1224 if (checkpv && !cacheable) { 1225 pmap_changebit(pa, PG_CI, TRUE); 1226 DCIA(); 1227 #ifdef PMAPSTATS 1228 enter_stats.flushes++; 1229 #endif 1230 #ifdef DEBUG 1231 if ((pmapdebug & (PDB_CACHE|PDB_PVDUMP)) == 1232 (PDB_CACHE|PDB_PVDUMP)) 1233 pmap_pvdump(pa); 1234 #endif 1235 } 1236 #ifdef DEBUG 1237 else if (pmapvacflush & PVF_ENTER) { 1238 if (pmapvacflush & PVF_TOTAL) 1239 DCIA(); 1240 else if (pmap == kernel_pmap) 1241 DCIS(); 1242 else 1243 DCIU(); 1244 } 1245 #endif 1246 #endif 1247 #ifdef DEBUG 1248 if ((pmapdebug & PDB_WIRING) && pmap != kernel_pmap) 1249 pmap_check_wiring("enter", trunc_page(pmap_pte(pmap, va))); 1250 #endif 1251 } 1252 1253 /* 1254 * Routine: pmap_change_wiring 1255 * Function: Change the wiring attribute for a map/virtual-address 1256 * pair. 1257 * In/out conditions: 1258 * The mapping must already exist in the pmap. 1259 */ 1260 void 1261 pmap_change_wiring(pmap, va, wired) 1262 register pmap_t pmap; 1263 vm_offset_t va; 1264 boolean_t wired; 1265 { 1266 register pt_entry_t *pte; 1267 1268 #ifdef DEBUG 1269 if (pmapdebug & PDB_FOLLOW) 1270 printf("pmap_change_wiring(%x, %x, %x)\n", pmap, va, wired); 1271 #endif 1272 if (pmap == NULL) 1273 return; 1274 1275 pte = pmap_pte(pmap, va); 1276 #ifdef DEBUG 1277 /* 1278 * Page table page is not allocated. 1279 * Should this ever happen? Ignore it for now, 1280 * we don't want to force allocation of unnecessary PTE pages. 1281 */ 1282 if (!pmap_ste_v(pmap, va)) { 1283 if (pmapdebug & PDB_PARANOIA) 1284 printf("pmap_change_wiring: invalid STE for %x\n", va); 1285 return; 1286 } 1287 /* 1288 * Page not valid. Should this ever happen? 1289 * Just continue and change wiring anyway. 1290 */ 1291 if (!pmap_pte_v(pte)) { 1292 if (pmapdebug & PDB_PARANOIA) 1293 printf("pmap_change_wiring: invalid PTE for %x\n", va); 1294 } 1295 #endif 1296 /* 1297 * If wiring actually changed (always?) set the wire bit and 1298 * update the wire count. Note that wiring is not a hardware 1299 * characteristic so there is no need to invalidate the TLB. 1300 */ 1301 if (pmap_pte_w_chg(pte, wired ? PG_W : 0)) { 1302 pmap_pte_set_w(pte, wired); 1303 if (wired) 1304 pmap->pm_stats.wired_count++; 1305 else 1306 pmap->pm_stats.wired_count--; 1307 } 1308 } 1309 1310 /* 1311 * Routine: pmap_extract 1312 * Function: 1313 * Extract the physical page address associated 1314 * with the given map/virtual_address pair. 1315 */ 1316 1317 vm_offset_t 1318 pmap_extract(pmap, va) 1319 register pmap_t pmap; 1320 vm_offset_t va; 1321 { 1322 register vm_offset_t pa; 1323 1324 #ifdef DEBUG 1325 if (pmapdebug & PDB_FOLLOW) 1326 printf("pmap_extract(%x, %x) -> ", pmap, va); 1327 #endif 1328 pa = 0; 1329 if (pmap && pmap_ste_v(pmap, va)) 1330 pa = *(int *)pmap_pte(pmap, va); 1331 if (pa) 1332 pa = (pa & PG_FRAME) | (va & ~PG_FRAME); 1333 #ifdef DEBUG 1334 if (pmapdebug & PDB_FOLLOW) 1335 printf("%x\n", pa); 1336 #endif 1337 return(pa); 1338 } 1339 1340 /* 1341 * Copy the range specified by src_addr/len 1342 * from the source map to the range dst_addr/len 1343 * in the destination map. 1344 * 1345 * This routine is only advisory and need not do anything. 1346 */ 1347 void pmap_copy(dst_pmap, src_pmap, dst_addr, len, src_addr) 1348 pmap_t dst_pmap; 1349 pmap_t src_pmap; 1350 vm_offset_t dst_addr; 1351 vm_size_t len; 1352 vm_offset_t src_addr; 1353 { 1354 #ifdef DEBUG 1355 if (pmapdebug & PDB_FOLLOW) 1356 printf("pmap_copy(%x, %x, %x, %x, %x)\n", 1357 dst_pmap, src_pmap, dst_addr, len, src_addr); 1358 #endif 1359 } 1360 1361 /* 1362 * Require that all active physical maps contain no 1363 * incorrect entries NOW. [This update includes 1364 * forcing updates of any address map caching.] 1365 * 1366 * Generally used to insure that a thread about 1367 * to run will see a semantically correct world. 1368 */ 1369 void pmap_update() 1370 { 1371 #ifdef DEBUG 1372 if (pmapdebug & PDB_FOLLOW) 1373 printf("pmap_update()\n"); 1374 #endif 1375 TBIA(); 1376 } 1377 1378 /* 1379 * Routine: pmap_collect 1380 * Function: 1381 * Garbage collects the physical map system for 1382 * pages which are no longer used. 1383 * Success need not be guaranteed -- that is, there 1384 * may well be pages which are not referenced, but 1385 * others may be collected. 1386 * Usage: 1387 * Called by the pageout daemon when pages are scarce. 1388 */ 1389 void 1390 pmap_collect(pmap) 1391 pmap_t pmap; 1392 { 1393 register vm_offset_t pa; 1394 register pv_entry_t pv; 1395 register int *pte; 1396 vm_offset_t kpa; 1397 int s; 1398 1399 #ifdef DEBUG 1400 int *ste; 1401 int opmapdebug; 1402 #endif 1403 if (pmap != kernel_pmap) 1404 return; 1405 1406 #ifdef DEBUG 1407 if (pmapdebug & PDB_FOLLOW) 1408 printf("pmap_collect(%x)\n", pmap); 1409 #endif 1410 #ifdef PMAPSTATS 1411 kpt_stats.collectscans++; 1412 #endif 1413 s = splimp(); 1414 for (pa = vm_first_phys; pa < vm_last_phys; pa += PAGE_SIZE) { 1415 register struct kpt_page *kpt, **pkpt; 1416 1417 /* 1418 * Locate physical pages which are being used as kernel 1419 * page table pages. 1420 */ 1421 pv = pa_to_pvh(pa); 1422 if (pv->pv_pmap != kernel_pmap || !(pv->pv_flags & PV_PTPAGE)) 1423 continue; 1424 do { 1425 if (pv->pv_ptste && pv->pv_ptpmap == kernel_pmap) 1426 break; 1427 } while (pv = pv->pv_next); 1428 if (pv == NULL) 1429 continue; 1430 #ifdef DEBUG 1431 if (pv->pv_va < (vm_offset_t)Sysmap || 1432 pv->pv_va >= (vm_offset_t)Sysmap + HP_MAX_PTSIZE) 1433 printf("collect: kernel PT VA out of range\n"); 1434 else 1435 goto ok; 1436 pmap_pvdump(pa); 1437 continue; 1438 ok: 1439 #endif 1440 pte = (int *)(pv->pv_va + HP_PAGE_SIZE); 1441 while (--pte >= (int *)pv->pv_va && *pte == PG_NV) 1442 ; 1443 if (pte >= (int *)pv->pv_va) 1444 continue; 1445 1446 #ifdef DEBUG 1447 if (pmapdebug & (PDB_PTPAGE|PDB_COLLECT)) { 1448 printf("collect: freeing KPT page at %x (ste %x@%x)\n", 1449 pv->pv_va, *(int *)pv->pv_ptste, pv->pv_ptste); 1450 opmapdebug = pmapdebug; 1451 pmapdebug |= PDB_PTPAGE; 1452 } 1453 1454 ste = (int *)pv->pv_ptste; 1455 #endif 1456 /* 1457 * If all entries were invalid we can remove the page. 1458 * We call pmap_remove_entry to take care of invalidating 1459 * ST and Sysptmap entries. 1460 */ 1461 kpa = pmap_extract(pmap, pv->pv_va); 1462 pmap_remove_mapping(pmap, pv->pv_va, PT_ENTRY_NULL, 1463 PRM_TFLUSH|PRM_CFLUSH); 1464 /* 1465 * Use the physical address to locate the original 1466 * (kmem_alloc assigned) address for the page and put 1467 * that page back on the free list. 1468 */ 1469 for (pkpt = &kpt_used_list, kpt = *pkpt; 1470 kpt != (struct kpt_page *)0; 1471 pkpt = &kpt->kpt_next, kpt = *pkpt) 1472 if (kpt->kpt_pa == kpa) 1473 break; 1474 #ifdef DEBUG 1475 if (kpt == (struct kpt_page *)0) 1476 panic("pmap_collect: lost a KPT page"); 1477 if (pmapdebug & (PDB_PTPAGE|PDB_COLLECT)) 1478 printf("collect: %x (%x) to free list\n", 1479 kpt->kpt_va, kpa); 1480 #endif 1481 *pkpt = kpt->kpt_next; 1482 kpt->kpt_next = kpt_free_list; 1483 kpt_free_list = kpt; 1484 #ifdef PMAPSTATS 1485 kpt_stats.kptinuse--; 1486 kpt_stats.collectpages++; 1487 #endif 1488 #ifdef DEBUG 1489 if (pmapdebug & (PDB_PTPAGE|PDB_COLLECT)) 1490 pmapdebug = opmapdebug; 1491 1492 if (*ste) 1493 printf("collect: kernel STE at %x still valid (%x)\n", 1494 ste, *ste); 1495 ste = (int *)&Sysptmap[(st_entry_t *)ste-pmap_ste(kernel_pmap, 0)]; 1496 if (*ste) 1497 printf("collect: kernel PTmap at %x still valid (%x)\n", 1498 ste, *ste); 1499 #endif 1500 } 1501 splx(s); 1502 } 1503 1504 void 1505 pmap_activate(pmap, pcbp) 1506 register pmap_t pmap; 1507 struct pcb *pcbp; 1508 { 1509 #ifdef DEBUG 1510 if (pmapdebug & (PDB_FOLLOW|PDB_SEGTAB)) 1511 printf("pmap_activate(%x, %x)\n", pmap, pcbp); 1512 #endif 1513 PMAP_ACTIVATE(pmap, pcbp, pmap == curproc->p_vmspace->vm_map.pmap); 1514 } 1515 1516 /* 1517 * pmap_zero_page zeros the specified (machine independent) 1518 * page by mapping the page into virtual memory and using 1519 * bzero to clear its contents, one machine dependent page 1520 * at a time. 1521 * 1522 * XXX this is a bad implementation for virtual cache machines 1523 * (320/350) because pmap_enter doesn't cache-inhibit the temporary 1524 * kernel mapping and we wind up with data cached for that KVA. 1525 * It is probably a win for physical cache machines (370/380) 1526 * as the cache loading is not wasted. 1527 */ 1528 void 1529 pmap_zero_page(phys) 1530 vm_offset_t phys; 1531 { 1532 register vm_offset_t kva; 1533 extern caddr_t CADDR1; 1534 1535 #ifdef DEBUG 1536 if (pmapdebug & PDB_FOLLOW) 1537 printf("pmap_zero_page(%x)\n", phys); 1538 #endif 1539 kva = (vm_offset_t) CADDR1; 1540 pmap_enter(kernel_pmap, kva, phys, VM_PROT_READ|VM_PROT_WRITE, TRUE); 1541 bzero((caddr_t)kva, HP_PAGE_SIZE); 1542 pmap_remove_mapping(kernel_pmap, kva, PT_ENTRY_NULL, 1543 PRM_TFLUSH|PRM_CFLUSH); 1544 } 1545 1546 /* 1547 * pmap_copy_page copies the specified (machine independent) 1548 * page by mapping the page into virtual memory and using 1549 * bcopy to copy the page, one machine dependent page at a 1550 * time. 1551 * 1552 * 1553 * XXX this is a bad implementation for virtual cache machines 1554 * (320/350) because pmap_enter doesn't cache-inhibit the temporary 1555 * kernel mapping and we wind up with data cached for that KVA. 1556 * It is probably a win for physical cache machines (370/380) 1557 * as the cache loading is not wasted. 1558 */ 1559 void 1560 pmap_copy_page(src, dst) 1561 vm_offset_t src, dst; 1562 { 1563 register vm_offset_t skva, dkva; 1564 extern caddr_t CADDR1, CADDR2; 1565 1566 #ifdef DEBUG 1567 if (pmapdebug & PDB_FOLLOW) 1568 printf("pmap_copy_page(%x, %x)\n", src, dst); 1569 #endif 1570 skva = (vm_offset_t) CADDR1; 1571 dkva = (vm_offset_t) CADDR2; 1572 pmap_enter(kernel_pmap, skva, src, VM_PROT_READ, TRUE); 1573 pmap_enter(kernel_pmap, dkva, dst, VM_PROT_READ|VM_PROT_WRITE, TRUE); 1574 copypage((caddr_t)skva, (caddr_t)dkva); 1575 /* CADDR1 and CADDR2 are virtually contiguous */ 1576 pmap_remove(kernel_pmap, skva, skva+2*PAGE_SIZE); 1577 } 1578 1579 /* 1580 * Routine: pmap_pageable 1581 * Function: 1582 * Make the specified pages (by pmap, offset) 1583 * pageable (or not) as requested. 1584 * 1585 * A page which is not pageable may not take 1586 * a fault; therefore, its page table entry 1587 * must remain valid for the duration. 1588 * 1589 * This routine is merely advisory; pmap_enter 1590 * will specify that these pages are to be wired 1591 * down (or not) as appropriate. 1592 */ 1593 void 1594 pmap_pageable(pmap, sva, eva, pageable) 1595 pmap_t pmap; 1596 vm_offset_t sva, eva; 1597 boolean_t pageable; 1598 { 1599 #ifdef DEBUG 1600 if (pmapdebug & PDB_FOLLOW) 1601 printf("pmap_pageable(%x, %x, %x, %x)\n", 1602 pmap, sva, eva, pageable); 1603 #endif 1604 /* 1605 * If we are making a PT page pageable then all valid 1606 * mappings must be gone from that page. Hence it should 1607 * be all zeros and there is no need to clean it. 1608 * Assumptions: 1609 * - we are called with only one page at a time 1610 * - PT pages have only one pv_table entry 1611 */ 1612 if (pmap == kernel_pmap && pageable && sva + PAGE_SIZE == eva) { 1613 register pv_entry_t pv; 1614 register vm_offset_t pa; 1615 1616 #ifdef DEBUG 1617 if ((pmapdebug & (PDB_FOLLOW|PDB_PTPAGE)) == PDB_PTPAGE) 1618 printf("pmap_pageable(%x, %x, %x, %x)\n", 1619 pmap, sva, eva, pageable); 1620 #endif 1621 if (!pmap_ste_v(pmap, sva)) 1622 return; 1623 pa = pmap_pte_pa(pmap_pte(pmap, sva)); 1624 if (pa < vm_first_phys || pa >= vm_last_phys) 1625 return; 1626 pv = pa_to_pvh(pa); 1627 if (pv->pv_ptste == NULL) 1628 return; 1629 #ifdef DEBUG 1630 if (pv->pv_va != sva || pv->pv_next) { 1631 printf("pmap_pageable: bad PT page va %x next %x\n", 1632 pv->pv_va, pv->pv_next); 1633 return; 1634 } 1635 #endif 1636 /* 1637 * Mark it unmodified to avoid pageout 1638 */ 1639 pmap_changebit(pa, PG_M, FALSE); 1640 #ifdef DEBUG 1641 if ((PHYS_TO_VM_PAGE(pa)->flags & PG_CLEAN) == 0) { 1642 printf("pa %x: flags=%x: not clean\n", 1643 pa, PHYS_TO_VM_PAGE(pa)->flags); 1644 PHYS_TO_VM_PAGE(pa)->flags |= PG_CLEAN; 1645 } 1646 if (pmapdebug & PDB_PTPAGE) 1647 printf("pmap_pageable: PT page %x(%x) unmodified\n", 1648 sva, *(int *)pmap_pte(pmap, sva)); 1649 if (pmapdebug & PDB_WIRING) 1650 pmap_check_wiring("pageable", sva); 1651 #endif 1652 } 1653 } 1654 1655 /* 1656 * Clear the modify bits on the specified physical page. 1657 */ 1658 1659 void 1660 pmap_clear_modify(pa) 1661 vm_offset_t pa; 1662 { 1663 #ifdef DEBUG 1664 if (pmapdebug & PDB_FOLLOW) 1665 printf("pmap_clear_modify(%x)\n", pa); 1666 #endif 1667 pmap_changebit(pa, PG_M, FALSE); 1668 } 1669 1670 /* 1671 * pmap_clear_reference: 1672 * 1673 * Clear the reference bit on the specified physical page. 1674 */ 1675 1676 void pmap_clear_reference(pa) 1677 vm_offset_t pa; 1678 { 1679 #ifdef DEBUG 1680 if (pmapdebug & PDB_FOLLOW) 1681 printf("pmap_clear_reference(%x)\n", pa); 1682 #endif 1683 pmap_changebit(pa, PG_U, FALSE); 1684 } 1685 1686 /* 1687 * pmap_is_referenced: 1688 * 1689 * Return whether or not the specified physical page is referenced 1690 * by any physical maps. 1691 */ 1692 1693 boolean_t 1694 pmap_is_referenced(pa) 1695 vm_offset_t pa; 1696 { 1697 #ifdef DEBUG 1698 if (pmapdebug & PDB_FOLLOW) { 1699 boolean_t rv = pmap_testbit(pa, PG_U); 1700 printf("pmap_is_referenced(%x) -> %c\n", pa, "FT"[rv]); 1701 return(rv); 1702 } 1703 #endif 1704 return(pmap_testbit(pa, PG_U)); 1705 } 1706 1707 /* 1708 * pmap_is_modified: 1709 * 1710 * Return whether or not the specified physical page is modified 1711 * by any physical maps. 1712 */ 1713 1714 boolean_t 1715 pmap_is_modified(pa) 1716 vm_offset_t pa; 1717 { 1718 #ifdef DEBUG 1719 if (pmapdebug & PDB_FOLLOW) { 1720 boolean_t rv = pmap_testbit(pa, PG_M); 1721 printf("pmap_is_modified(%x) -> %c\n", pa, "FT"[rv]); 1722 return(rv); 1723 } 1724 #endif 1725 return(pmap_testbit(pa, PG_M)); 1726 } 1727 1728 vm_offset_t 1729 pmap_phys_address(ppn) 1730 int ppn; 1731 { 1732 return(hp300_ptob(ppn)); 1733 } 1734 1735 #ifdef HPUXCOMPAT 1736 /* 1737 * 'PUX hack for dealing with the so called multi-mapped address space. 1738 * The first 256mb is mapped in at every 256mb region from 0x10000000 1739 * up to 0xF0000000. This allows for 15 bits of tag information. 1740 * 1741 * We implement this at the segment table level, the machine independent 1742 * VM knows nothing about it. 1743 */ 1744 pmap_mapmulti(pmap, va) 1745 pmap_t pmap; 1746 vm_offset_t va; 1747 { 1748 int *ste, *bste; 1749 1750 #ifdef DEBUG 1751 if (pmapdebug & PDB_MULTIMAP) { 1752 ste = (int *)pmap_ste(pmap, HPMMBASEADDR(va)); 1753 printf("pmap_mapmulti(%x, %x): bste %x(%x)", 1754 pmap, va, ste, *ste); 1755 ste = (int *)pmap_ste(pmap, va); 1756 printf(" ste %x(%x)\n", ste, *ste); 1757 } 1758 #endif 1759 bste = (int *) pmap_ste(pmap, HPMMBASEADDR(va)); 1760 ste = (int *) pmap_ste(pmap, va); 1761 if (*ste == SG_NV && (*bste & SG_V)) { 1762 *ste = *bste; 1763 TBIAU(); 1764 return (KERN_SUCCESS); 1765 } 1766 return (KERN_INVALID_ADDRESS); 1767 } 1768 #endif 1769 1770 /* 1771 * Miscellaneous support routines follow 1772 */ 1773 1774 /* 1775 * Invalidate a single page denoted by pmap/va. 1776 * If (pte != NULL), it is the already computed PTE for the page. 1777 * If (flags & PRM_TFLUSH), we must invalidate any TLB information. 1778 * If (flags & PRM_CFLUSH), we must flush/invalidate any cache information. 1779 */ 1780 /* static */ 1781 void 1782 pmap_remove_mapping(pmap, va, pte, flags) 1783 register pmap_t pmap; 1784 register vm_offset_t va; 1785 register pt_entry_t *pte; 1786 int flags; 1787 { 1788 register vm_offset_t pa; 1789 register pv_entry_t pv, npv; 1790 pmap_t ptpmap; 1791 int *ste, s, bits; 1792 #ifdef DEBUG 1793 pt_entry_t opte; 1794 1795 if (pmapdebug & (PDB_FOLLOW|PDB_REMOVE|PDB_PROTECT)) 1796 printf("pmap_remove_mapping(%x, %x, %x, %x)\n", 1797 pmap, va, pte, flags); 1798 #endif 1799 1800 /* 1801 * PTE not provided, compute it from pmap and va. 1802 */ 1803 if (pte == PT_ENTRY_NULL) { 1804 pte = pmap_pte(pmap, va); 1805 if (*(int *)pte == PG_NV) 1806 return; 1807 } 1808 #ifdef HAVEVAC 1809 if (pmap_aliasmask && (flags & PRM_CFLUSH)) { 1810 /* 1811 * Purge kernel side of VAC to ensure we get the correct 1812 * state of any hardware maintained bits. 1813 */ 1814 DCIS(); 1815 #ifdef PMAPSTATS 1816 remove_stats.sflushes++; 1817 #endif 1818 /* 1819 * If this is a non-CI user mapping for the current process, 1820 * flush the VAC. Note that the kernel side was flushed 1821 * above so we don't worry about non-CI kernel mappings. 1822 */ 1823 if (pmap == curproc->p_vmspace->vm_map.pmap && 1824 !pmap_pte_ci(pte)) { 1825 DCIU(); 1826 #ifdef PMAPSTATS 1827 remove_stats.uflushes++; 1828 #endif 1829 } 1830 } 1831 #endif 1832 pa = pmap_pte_pa(pte); 1833 #ifdef DEBUG 1834 opte = *pte; 1835 #endif 1836 #ifdef PMAPSTATS 1837 remove_stats.removes++; 1838 #endif 1839 /* 1840 * Update statistics 1841 */ 1842 if (pmap_pte_w(pte)) 1843 pmap->pm_stats.wired_count--; 1844 pmap->pm_stats.resident_count--; 1845 1846 /* 1847 * Invalidate the PTE after saving the reference modify info. 1848 */ 1849 #ifdef DEBUG 1850 if (pmapdebug & PDB_REMOVE) 1851 printf("remove: invalidating pte at %x\n", pte); 1852 #endif 1853 bits = *(int *)pte & (PG_U|PG_M); 1854 *(int *)pte = PG_NV; 1855 if ((flags & PRM_TFLUSH) && active_pmap(pmap)) 1856 TBIS(va); 1857 /* 1858 * For user mappings decrement the wiring count on 1859 * the PT page. We do this after the PTE has been 1860 * invalidated because vm_map_pageable winds up in 1861 * pmap_pageable which clears the modify bit for the 1862 * PT page. 1863 */ 1864 if (pmap != kernel_pmap) { 1865 (void) vm_map_pageable(pt_map, trunc_page(pte), 1866 round_page(pte+1), TRUE); 1867 #ifdef DEBUG 1868 if (pmapdebug & PDB_WIRING) 1869 pmap_check_wiring("remove", trunc_page(pte)); 1870 #endif 1871 } 1872 /* 1873 * If this isn't a managed page, we are all done. 1874 */ 1875 if (pa < vm_first_phys || pa >= vm_last_phys) 1876 return; 1877 /* 1878 * Otherwise remove it from the PV table 1879 * (raise IPL since we may be called at interrupt time). 1880 */ 1881 pv = pa_to_pvh(pa); 1882 ste = (int *)0; 1883 s = splimp(); 1884 /* 1885 * If it is the first entry on the list, it is actually 1886 * in the header and we must copy the following entry up 1887 * to the header. Otherwise we must search the list for 1888 * the entry. In either case we free the now unused entry. 1889 */ 1890 if (pmap == pv->pv_pmap && va == pv->pv_va) { 1891 ste = (int *)pv->pv_ptste; 1892 ptpmap = pv->pv_ptpmap; 1893 npv = pv->pv_next; 1894 if (npv) { 1895 npv->pv_flags = pv->pv_flags; 1896 *pv = *npv; 1897 free((caddr_t)npv, M_VMPVENT); 1898 } else 1899 pv->pv_pmap = NULL; 1900 #ifdef PMAPSTATS 1901 remove_stats.pvfirst++; 1902 #endif 1903 } else { 1904 for (npv = pv->pv_next; npv; npv = npv->pv_next) { 1905 #ifdef PMAPSTATS 1906 remove_stats.pvsearch++; 1907 #endif 1908 if (pmap == npv->pv_pmap && va == npv->pv_va) 1909 break; 1910 pv = npv; 1911 } 1912 #ifdef DEBUG 1913 if (npv == NULL) 1914 panic("pmap_remove: PA not in pv_tab"); 1915 #endif 1916 ste = (int *)npv->pv_ptste; 1917 ptpmap = npv->pv_ptpmap; 1918 pv->pv_next = npv->pv_next; 1919 free((caddr_t)npv, M_VMPVENT); 1920 pv = pa_to_pvh(pa); 1921 } 1922 #ifdef HAVEVAC 1923 /* 1924 * If only one mapping left we no longer need to cache inhibit 1925 */ 1926 if (pmap_aliasmask && 1927 pv->pv_pmap && pv->pv_next == NULL && (pv->pv_flags & PV_CI)) { 1928 #ifdef DEBUG 1929 if (pmapdebug & PDB_CACHE) 1930 printf("remove: clearing CI for pa %x\n", pa); 1931 #endif 1932 pv->pv_flags &= ~PV_CI; 1933 pmap_changebit(pa, PG_CI, FALSE); 1934 #ifdef DEBUG 1935 if ((pmapdebug & (PDB_CACHE|PDB_PVDUMP)) == 1936 (PDB_CACHE|PDB_PVDUMP)) 1937 pmap_pvdump(pa); 1938 #endif 1939 } 1940 #endif 1941 /* 1942 * If this was a PT page we must also remove the 1943 * mapping from the associated segment table. 1944 */ 1945 if (ste) { 1946 #ifdef PMAPSTATS 1947 remove_stats.ptinvalid++; 1948 #endif 1949 #ifdef DEBUG 1950 if (pmapdebug & (PDB_REMOVE|PDB_PTPAGE)) 1951 printf("remove: ste was %x@%x pte was %x@%x\n", 1952 *ste, ste, *(int *)&opte, pmap_pte(pmap, va)); 1953 #endif 1954 #if defined(HP380) 1955 if (mmutype == MMU_68040) { 1956 int *este = &ste[NPTEPG/SG4_LEV3SIZE]; 1957 1958 while (ste < este) 1959 *ste++ = SG_NV; 1960 #ifdef DEBUG 1961 ste -= NPTEPG/SG4_LEV3SIZE; 1962 #endif 1963 } else 1964 #endif 1965 *ste = SG_NV; 1966 /* 1967 * If it was a user PT page, we decrement the 1968 * reference count on the segment table as well, 1969 * freeing it if it is now empty. 1970 */ 1971 if (ptpmap != kernel_pmap) { 1972 #ifdef DEBUG 1973 if (pmapdebug & (PDB_REMOVE|PDB_SEGTAB)) 1974 printf("remove: stab %x, refcnt %d\n", 1975 ptpmap->pm_stab, ptpmap->pm_sref - 1); 1976 if ((pmapdebug & PDB_PARANOIA) && 1977 ptpmap->pm_stab != (st_entry_t *)trunc_page(ste)) 1978 panic("remove: bogus ste"); 1979 #endif 1980 if (--(ptpmap->pm_sref) == 0) { 1981 #ifdef DEBUG 1982 if (pmapdebug&(PDB_REMOVE|PDB_SEGTAB)) 1983 printf("remove: free stab %x\n", 1984 ptpmap->pm_stab); 1985 #endif 1986 kmem_free(kernel_map, 1987 (vm_offset_t)ptpmap->pm_stab, 1988 HP_STSIZE); 1989 ptpmap->pm_stab = Segtabzero; 1990 ptpmap->pm_stpa = Segtabzeropa; 1991 #if defined(HP380) 1992 if (mmutype == MMU_68040) 1993 ptpmap->pm_stfree = protostfree; 1994 #endif 1995 ptpmap->pm_stchanged = TRUE; 1996 /* 1997 * XXX may have changed segment table 1998 * pointer for current process so 1999 * update now to reload hardware. 2000 */ 2001 if (ptpmap == curproc->p_vmspace->vm_map.pmap) 2002 PMAP_ACTIVATE(ptpmap, 2003 (struct pcb *)curproc->p_addr, 1); 2004 } 2005 #ifdef DEBUG 2006 else if (ptpmap->pm_sref < 0) 2007 panic("remove: sref < 0"); 2008 #endif 2009 } 2010 #if 0 2011 /* 2012 * XXX this should be unnecessary as we have been 2013 * flushing individual mappings as we go. 2014 */ 2015 if (ptpmap == kernel_pmap) 2016 TBIAS(); 2017 else 2018 TBIAU(); 2019 #endif 2020 pv->pv_flags &= ~PV_PTPAGE; 2021 ptpmap->pm_ptpages--; 2022 } 2023 /* 2024 * Update saved attributes for managed page 2025 */ 2026 pmap_attributes[pa_index(pa)] |= bits; 2027 splx(s); 2028 } 2029 2030 /* static */ 2031 boolean_t 2032 pmap_testbit(pa, bit) 2033 register vm_offset_t pa; 2034 int bit; 2035 { 2036 register pv_entry_t pv; 2037 register int *pte; 2038 int s; 2039 2040 if (pa < vm_first_phys || pa >= vm_last_phys) 2041 return(FALSE); 2042 2043 pv = pa_to_pvh(pa); 2044 s = splimp(); 2045 /* 2046 * Check saved info first 2047 */ 2048 if (pmap_attributes[pa_index(pa)] & bit) { 2049 splx(s); 2050 return(TRUE); 2051 } 2052 #ifdef HAVEVAC 2053 /* 2054 * Flush VAC to get correct state of any hardware maintained bits. 2055 */ 2056 if (pmap_aliasmask && (bit & (PG_U|PG_M))) 2057 DCIS(); 2058 #endif 2059 /* 2060 * Not found, check current mappings returning 2061 * immediately if found. 2062 */ 2063 if (pv->pv_pmap != NULL) { 2064 for (; pv; pv = pv->pv_next) { 2065 pte = (int *) pmap_pte(pv->pv_pmap, pv->pv_va); 2066 if (*pte & bit) { 2067 splx(s); 2068 return(TRUE); 2069 } 2070 } 2071 } 2072 splx(s); 2073 return(FALSE); 2074 } 2075 2076 /* static */ 2077 void 2078 pmap_changebit(pa, bit, setem) 2079 register vm_offset_t pa; 2080 int bit; 2081 boolean_t setem; 2082 { 2083 register pv_entry_t pv; 2084 register int *pte, npte; 2085 vm_offset_t va; 2086 int s; 2087 boolean_t firstpage = TRUE; 2088 #ifdef PMAPSTATS 2089 struct chgstats *chgp; 2090 #endif 2091 2092 #ifdef DEBUG 2093 if (pmapdebug & PDB_BITS) 2094 printf("pmap_changebit(%x, %x, %s)\n", 2095 pa, bit, setem ? "set" : "clear"); 2096 #endif 2097 if (pa < vm_first_phys || pa >= vm_last_phys) 2098 return; 2099 2100 #ifdef PMAPSTATS 2101 chgp = &changebit_stats[(bit>>2)-1]; 2102 if (setem) 2103 chgp->setcalls++; 2104 else 2105 chgp->clrcalls++; 2106 #endif 2107 pv = pa_to_pvh(pa); 2108 s = splimp(); 2109 /* 2110 * Clear saved attributes (modify, reference) 2111 */ 2112 if (!setem) 2113 pmap_attributes[pa_index(pa)] &= ~bit; 2114 /* 2115 * Loop over all current mappings setting/clearing as appropos 2116 * If setting RO do we need to clear the VAC? 2117 */ 2118 if (pv->pv_pmap != NULL) { 2119 #ifdef DEBUG 2120 int toflush = 0; 2121 #endif 2122 for (; pv; pv = pv->pv_next) { 2123 #ifdef DEBUG 2124 toflush |= (pv->pv_pmap == kernel_pmap) ? 2 : 1; 2125 #endif 2126 va = pv->pv_va; 2127 2128 /* 2129 * XXX don't write protect pager mappings 2130 */ 2131 if (bit == PG_RO) { 2132 extern vm_offset_t pager_sva, pager_eva; 2133 2134 if (va >= pager_sva && va < pager_eva) 2135 continue; 2136 } 2137 2138 pte = (int *) pmap_pte(pv->pv_pmap, va); 2139 #ifdef HAVEVAC 2140 /* 2141 * Flush VAC to ensure we get correct state of HW bits 2142 * so we don't clobber them. 2143 */ 2144 if (firstpage && pmap_aliasmask) { 2145 firstpage = FALSE; 2146 DCIS(); 2147 } 2148 #endif 2149 if (setem) 2150 npte = *pte | bit; 2151 else 2152 npte = *pte & ~bit; 2153 if (*pte != npte) { 2154 #if defined(HP380) 2155 /* 2156 * If we are changing caching status or 2157 * protection make sure the caches are 2158 * flushed (but only once). 2159 */ 2160 if (firstpage && mmutype == MMU_68040 && 2161 (bit == PG_RO && setem || 2162 (bit & PG_CMASK))) { 2163 firstpage = FALSE; 2164 DCFP(pa); 2165 ICPP(pa); 2166 } 2167 #endif 2168 *pte = npte; 2169 if (active_pmap(pv->pv_pmap)) 2170 TBIS(va); 2171 #ifdef PMAPSTATS 2172 if (setem) 2173 chgp->sethits++; 2174 else 2175 chgp->clrhits++; 2176 #endif 2177 } 2178 #ifdef PMAPSTATS 2179 else { 2180 if (setem) 2181 chgp->setmiss++; 2182 else 2183 chgp->clrmiss++; 2184 } 2185 #endif 2186 } 2187 #if defined(HAVEVAC) && defined(DEBUG) 2188 if (setem && bit == PG_RO && (pmapvacflush & PVF_PROTECT)) { 2189 if ((pmapvacflush & PVF_TOTAL) || toflush == 3) 2190 DCIA(); 2191 else if (toflush == 2) 2192 DCIS(); 2193 else 2194 DCIU(); 2195 } 2196 #endif 2197 } 2198 splx(s); 2199 } 2200 2201 /* static */ 2202 void 2203 pmap_enter_ptpage(pmap, va) 2204 register pmap_t pmap; 2205 register vm_offset_t va; 2206 { 2207 register vm_offset_t ptpa; 2208 register pv_entry_t pv; 2209 st_entry_t *ste; 2210 int s; 2211 2212 #ifdef DEBUG 2213 if (pmapdebug & (PDB_FOLLOW|PDB_ENTER|PDB_PTPAGE)) 2214 printf("pmap_enter_ptpage: pmap %x, va %x\n", pmap, va); 2215 #endif 2216 #ifdef PMAPSTATS 2217 enter_stats.ptpneeded++; 2218 #endif 2219 /* 2220 * Allocate a segment table if necessary. Note that it is allocated 2221 * from kernel_map and not pt_map. This keeps user page tables 2222 * aligned on segment boundaries in the kernel address space. 2223 * The segment table is wired down. It will be freed whenever the 2224 * reference count drops to zero. 2225 */ 2226 if (pmap->pm_stab == Segtabzero) { 2227 pmap->pm_stab = (st_entry_t *) 2228 kmem_alloc(kernel_map, HP_STSIZE); 2229 pmap->pm_stpa = (st_entry_t *) 2230 pmap_extract(kernel_pmap, (vm_offset_t)pmap->pm_stab); 2231 #if defined(HP380) 2232 if (mmutype == MMU_68040) { 2233 #ifdef DEBUG 2234 if (dowriteback && dokwriteback) 2235 #endif 2236 pmap_changebit((vm_offset_t)pmap->pm_stab, PG_CCB, 0); 2237 pmap->pm_stfree = protostfree; 2238 } 2239 #endif 2240 pmap->pm_stchanged = TRUE; 2241 /* 2242 * XXX may have changed segment table pointer for current 2243 * process so update now to reload hardware. 2244 */ 2245 if (pmap == curproc->p_vmspace->vm_map.pmap) 2246 PMAP_ACTIVATE(pmap, (struct pcb *)curproc->p_addr, 1); 2247 #ifdef DEBUG 2248 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB)) 2249 printf("enter: pmap %x stab %x(%x)\n", 2250 pmap, pmap->pm_stab, pmap->pm_stpa); 2251 #endif 2252 } 2253 2254 ste = pmap_ste(pmap, va); 2255 #if defined(HP380) 2256 /* 2257 * Allocate level 2 descriptor block if necessary 2258 */ 2259 if (mmutype == MMU_68040) { 2260 if (!ste->sg_v) { 2261 int ix; 2262 caddr_t addr; 2263 2264 ix = bmtol2(pmap->pm_stfree); 2265 if (ix == -1) 2266 panic("enter: out of address space"); /* XXX */ 2267 pmap->pm_stfree &= ~l2tobm(ix); 2268 addr = (caddr_t)&pmap->pm_stab[ix*SG4_LEV2SIZE]; 2269 bzero(addr, SG4_LEV2SIZE*sizeof(st_entry_t)); 2270 addr = (caddr_t)&pmap->pm_stpa[ix*SG4_LEV2SIZE]; 2271 *(int *)ste = (u_int)addr | SG_RW | SG_U | SG_V; 2272 #ifdef DEBUG 2273 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB)) 2274 printf("enter: alloc ste2 %d(%x)\n", ix, addr); 2275 #endif 2276 } 2277 ste = pmap_ste2(pmap, va); 2278 /* 2279 * Since a level 2 descriptor maps a block of SG4_LEV3SIZE 2280 * level 3 descriptors, we need a chunk of NPTEPG/SG4_LEV3SIZE 2281 * (16) such descriptors (NBPG/SG4_LEV3SIZE bytes) to map a 2282 * PT page--the unit of allocation. We set `ste' to point 2283 * to the first entry of that chunk which is validated in its 2284 * entirety below. 2285 */ 2286 ste = (st_entry_t *)((int)ste & ~(NBPG/SG4_LEV3SIZE-1)); 2287 #ifdef DEBUG 2288 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB)) 2289 printf("enter: ste2 %x (%x)\n", 2290 pmap_ste2(pmap, va), ste); 2291 #endif 2292 } 2293 #endif 2294 va = trunc_page((vm_offset_t)pmap_pte(pmap, va)); 2295 2296 /* 2297 * In the kernel we allocate a page from the kernel PT page 2298 * free list and map it into the kernel page table map (via 2299 * pmap_enter). 2300 */ 2301 if (pmap == kernel_pmap) { 2302 register struct kpt_page *kpt; 2303 2304 s = splimp(); 2305 if ((kpt = kpt_free_list) == (struct kpt_page *)0) { 2306 /* 2307 * No PT pages available. 2308 * Try once to free up unused ones. 2309 */ 2310 #ifdef DEBUG 2311 if (pmapdebug & PDB_COLLECT) 2312 printf("enter: no KPT pages, collecting...\n"); 2313 #endif 2314 pmap_collect(kernel_pmap); 2315 if ((kpt = kpt_free_list) == (struct kpt_page *)0) 2316 panic("pmap_enter_ptpage: can't get KPT page"); 2317 } 2318 #ifdef PMAPSTATS 2319 if (++kpt_stats.kptinuse > kpt_stats.kptmaxuse) 2320 kpt_stats.kptmaxuse = kpt_stats.kptinuse; 2321 #endif 2322 kpt_free_list = kpt->kpt_next; 2323 kpt->kpt_next = kpt_used_list; 2324 kpt_used_list = kpt; 2325 ptpa = kpt->kpt_pa; 2326 bzero((caddr_t)kpt->kpt_va, HP_PAGE_SIZE); 2327 pmap_enter(pmap, va, ptpa, VM_PROT_DEFAULT, TRUE); 2328 #ifdef DEBUG 2329 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE)) { 2330 int ix = pmap_ste(pmap, va) - pmap_ste(pmap, 0); 2331 2332 printf("enter: add &Sysptmap[%d]: %x (KPT page %x)\n", 2333 ix, *(int *)&Sysptmap[ix], kpt->kpt_va); 2334 } 2335 #endif 2336 splx(s); 2337 } 2338 /* 2339 * For user processes we just simulate a fault on that location 2340 * letting the VM system allocate a zero-filled page. 2341 */ 2342 else { 2343 #ifdef DEBUG 2344 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE)) 2345 printf("enter: about to fault UPT pg at %x\n", va); 2346 #endif 2347 s = vm_fault(pt_map, va, VM_PROT_READ|VM_PROT_WRITE, FALSE); 2348 if (s != KERN_SUCCESS) { 2349 printf("vm_fault(pt_map, %x, RW, 0) -> %d\n", va, s); 2350 panic("pmap_enter: vm_fault failed"); 2351 } 2352 ptpa = pmap_extract(kernel_pmap, va); 2353 /* 2354 * Mark the page clean now to avoid its pageout (and 2355 * hence creation of a pager) between now and when it 2356 * is wired; i.e. while it is on a paging queue. 2357 */ 2358 PHYS_TO_VM_PAGE(ptpa)->flags |= PG_CLEAN; 2359 #ifdef DEBUG 2360 PHYS_TO_VM_PAGE(ptpa)->flags |= PG_PTPAGE; 2361 #endif 2362 } 2363 #if defined(HP380) 2364 /* 2365 * Turn off copyback caching of page table pages, 2366 * could get ugly otherwise. 2367 */ 2368 #ifdef DEBUG 2369 if (dowriteback && dokwriteback) 2370 #endif 2371 if (mmutype == MMU_68040) { 2372 int *pte = (int *)pmap_pte(kernel_pmap, va); 2373 #ifdef DEBUG 2374 if ((pmapdebug & PDB_PARANOIA) && (*pte & PG_CCB) == 0) 2375 printf("%s PT no CCB: kva=%x ptpa=%x pte@%x=%x\n", 2376 pmap == kernel_pmap ? "Kernel" : "User", 2377 va, ptpa, pte, *pte); 2378 #endif 2379 pmap_changebit(ptpa, PG_CCB, 0); 2380 } 2381 #endif 2382 /* 2383 * Locate the PV entry in the kernel for this PT page and 2384 * record the STE address. This is so that we can invalidate 2385 * the STE when we remove the mapping for the page. 2386 */ 2387 pv = pa_to_pvh(ptpa); 2388 s = splimp(); 2389 if (pv) { 2390 pv->pv_flags |= PV_PTPAGE; 2391 do { 2392 if (pv->pv_pmap == kernel_pmap && pv->pv_va == va) 2393 break; 2394 } while (pv = pv->pv_next); 2395 } 2396 #ifdef DEBUG 2397 if (pv == NULL) 2398 panic("pmap_enter_ptpage: PT page not entered"); 2399 #endif 2400 pv->pv_ptste = ste; 2401 pv->pv_ptpmap = pmap; 2402 #ifdef DEBUG 2403 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE)) 2404 printf("enter: new PT page at PA %x, ste at %x\n", ptpa, ste); 2405 #endif 2406 2407 /* 2408 * Map the new PT page into the segment table. 2409 * Also increment the reference count on the segment table if this 2410 * was a user page table page. Note that we don't use vm_map_pageable 2411 * to keep the count like we do for PT pages, this is mostly because 2412 * it would be difficult to identify ST pages in pmap_pageable to 2413 * release them. We also avoid the overhead of vm_map_pageable. 2414 */ 2415 #if defined(HP380) 2416 if (mmutype == MMU_68040) { 2417 st_entry_t *este; 2418 2419 for (este = &ste[NPTEPG/SG4_LEV3SIZE]; ste < este; ste++) { 2420 *(int *)ste = ptpa | SG_U | SG_RW | SG_V; 2421 ptpa += SG4_LEV3SIZE * sizeof(st_entry_t); 2422 } 2423 } else 2424 #endif 2425 *(int *)ste = (ptpa & SG_FRAME) | SG_RW | SG_V; 2426 if (pmap != kernel_pmap) { 2427 pmap->pm_sref++; 2428 #ifdef DEBUG 2429 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB)) 2430 printf("enter: stab %x refcnt %d\n", 2431 pmap->pm_stab, pmap->pm_sref); 2432 #endif 2433 } 2434 #if 0 2435 /* 2436 * Flush stale TLB info. 2437 */ 2438 if (pmap == kernel_pmap) 2439 TBIAS(); 2440 else 2441 TBIAU(); 2442 #endif 2443 pmap->pm_ptpages++; 2444 splx(s); 2445 } 2446 2447 #ifdef DEBUG 2448 /* static */ 2449 void 2450 pmap_pvdump(pa) 2451 vm_offset_t pa; 2452 { 2453 register pv_entry_t pv; 2454 2455 printf("pa %x", pa); 2456 for (pv = pa_to_pvh(pa); pv; pv = pv->pv_next) 2457 printf(" -> pmap %x, va %x, ptste %x, ptpmap %x, flags %x", 2458 pv->pv_pmap, pv->pv_va, pv->pv_ptste, pv->pv_ptpmap, 2459 pv->pv_flags); 2460 printf("\n"); 2461 } 2462 2463 /* static */ 2464 void 2465 pmap_check_wiring(str, va) 2466 char *str; 2467 vm_offset_t va; 2468 { 2469 vm_map_entry_t entry; 2470 register int count, *pte; 2471 2472 va = trunc_page(va); 2473 if (!pmap_ste_v(kernel_pmap, va) || 2474 !pmap_pte_v(pmap_pte(kernel_pmap, va))) 2475 return; 2476 2477 if (!vm_map_lookup_entry(pt_map, va, &entry)) { 2478 printf("wired_check: entry for %x not found\n", va); 2479 return; 2480 } 2481 count = 0; 2482 for (pte = (int *)va; pte < (int *)(va+PAGE_SIZE); pte++) 2483 if (*pte) 2484 count++; 2485 if (entry->wired_count != count) 2486 printf("*%s*: %x: w%d/a%d\n", 2487 str, va, entry->wired_count, count); 2488 } 2489 #endif 2490