xref: /original-bsd/sys/i386/isa/comreg.h (revision 3705696b)
1 /*-
2  * Copyright (c) 1991, 1993
3  *	The Regents of the University of California.  All rights reserved.
4  *
5  * %sccs.include.redist.c%
6  *
7  *	@(#)comreg.h	8.1 (Berkeley) 06/11/93
8  */
9 
10 
11 /* 16 bit baud rate divisor (lower byte in dca_data, upper in dca_ier) */
12 #define	COMBRD(x)	(1843200 / (16*(x)))
13 
14 /* interrupt enable register */
15 #define	IER_ERXRDY	0x1
16 #define	IER_ETXRDY	0x2
17 #define	IER_ERLS	0x4
18 #define	IER_EMSC	0x8
19 
20 /* interrupt identification register */
21 #define	IIR_IMASK	0xf
22 #define	IIR_RXTOUT	0xc
23 #define	IIR_RLS		0x6
24 #define	IIR_RXRDY	0x4
25 #define	IIR_TXRDY	0x2
26 #define	IIR_NOPEND	0x1
27 #define	IIR_MLSC	0x0
28 #define	IIR_FIFO_MASK	0xc0	/* set if FIFOs are enabled */
29 
30 /* fifo control register */
31 #define	FIFO_ENABLE	0x01
32 #define	FIFO_RCV_RST	0x02
33 #define	FIFO_XMT_RST	0x04
34 #define	FIFO_DMA_MODE	0x08
35 #define	FIFO_TRIGGER_1	0x00
36 #define	FIFO_TRIGGER_4	0x40
37 #define	FIFO_TRIGGER_8	0x80
38 #define	FIFO_TRIGGER_14	0xc0
39 
40 /* character format control register */
41 #define	CFCR_DLAB	0x80
42 #define	CFCR_SBREAK	0x40
43 #define	CFCR_PZERO	0x30
44 #define	CFCR_PONE	0x20
45 #define	CFCR_PEVEN	0x10
46 #define	CFCR_PODD	0x00
47 #define	CFCR_PENAB	0x08
48 #define	CFCR_STOPB	0x04
49 #define	CFCR_8BITS	0x03
50 #define	CFCR_7BITS	0x02
51 #define	CFCR_6BITS	0x01
52 #define	CFCR_5BITS	0x00
53 
54 /* modem control register */
55 #define	MCR_LOOPBACK	0x10
56 #define	MCR_IENABLE	0x08
57 #define	MCR_DRS		0x04
58 #define	MCR_RTS		0x02
59 #define	MCR_DTR		0x01
60 
61 /* line status register */
62 #define	LSR_RCV_FIFO	0x80
63 #define	LSR_TSRE	0x40
64 #define	LSR_TXRDY	0x20
65 #define	LSR_BI		0x10
66 #define	LSR_FE		0x08
67 #define	LSR_PE		0x04
68 #define	LSR_OE		0x02
69 #define	LSR_RXRDY	0x01
70 #define	LSR_RCV_MASK	0x1f
71 
72 /* modem status register */
73 #define	MSR_DCD		0x80
74 #define	MSR_RI		0x40
75 #define	MSR_DSR		0x20
76 #define	MSR_CTS		0x10
77 #define	MSR_DDCD	0x08
78 #define	MSR_TERI	0x04
79 #define	MSR_DDSR	0x02
80 #define	MSR_DCTS	0x01
81 
82 /*
83  * WARNING: Serial console is assumed to be at COM1 address
84  * and CONUNIT must be 0.
85  */
86 #define	CONADDR	(0x3f8)
87 #define	CONUNIT	(0)
88