1 /*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * %sccs.include.noredist.c% 9 * 10 * @(#)isa.h 5.6 (Berkeley) 01/08/91 11 */ 12 13 /* 14 * ISA Bus conventions 15 */ 16 17 #ifndef LOCORE 18 unsigned char inb(), rtcin(); 19 void outb(); 20 #endif 21 22 23 /* 24 * Input / Output Port Assignments 25 */ 26 27 #ifndef IO_BEGIN 28 #define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */ 29 30 /* CPU Board */ 31 #define IO_DMA1 0x000 /* 8237A DMA Controller #1 */ 32 #define IO_ICU1 0x020 /* 8259A Interrupt Controller #1 */ 33 #define IO_TIMER1 0x040 /* 8252 Timer #1 */ 34 #define IO_TIMER2 0x048 /* 8252 Timer #2 */ 35 #define IO_KBD 0x060 /* 8042 Keyboard */ 36 #define IO_RTC 0x070 /* RTC */ 37 #define IO_NMI IO_RTC /* NMI Control */ 38 #define IO_DMAPG 0x080 /* DMA Page Registers */ 39 #define IO_ICU2 0x0A0 /* 8259A Interrupt Controller #2 */ 40 #define IO_DMA2 0x0C0 /* 8237A DMA Controller #2 */ 41 #define IO_NPX 0x0F0 /* Numeric Coprocessor */ 42 43 /* Cards */ 44 /* 0x100 - 0x16F Open */ 45 46 #define IO_WD2 0x170 /* Secondary Fixed Disk Controller */ 47 48 /* 0x178 - 0x1EF Open */ 49 50 #define IO_WD1 0x1f0 /* Primary Fixed Disk Controller */ 51 #define IO_GAME 0x200 /* Game Controller */ 52 53 /* 0x208 - 0x277 Open */ 54 55 #define IO_LPT2 0x278 /* Parallel Port #2 */ 56 57 /* 0x280 - 0x2F7 Open */ 58 59 #define IO_COM2 0x2f8 /* COM2 i/o address */ 60 61 /* 0x300 - 0x36F Open */ 62 63 #define IO_FD2 0x370 /* secondary base i/o address */ 64 #define IO_LPT1 0x378 /* Parallel Port #1 */ 65 66 /* 0x380 - 0x3AF Open */ 67 68 #define IO_MDA 0x3B0 /* Monochome Adapter */ 69 #define IO_LPT3 0x3BC /* Monochome Adapter Printer Port */ 70 #define IO_VGA 0x3C0 /* E/VGA Ports */ 71 #define IO_CGA 0x3D0 /* CGA Ports */ 72 73 /* 0x3E0 - 0x3EF Open */ 74 75 #define IO_FD1 0x3f0 /* primary base i/o address */ 76 #define IO_COM1 0x3f8 /* COM1 i/o address */ 77 78 #define IO_ISAEND 0x3FF /* - 0x3FF End of I/O Registers */ 79 #endif IO_ISABEGIN 80 81 /* 82 * Input / Output Memory Physical Addresses 83 */ 84 85 #ifndef IOM_BEGIN 86 #define IOM_BEGIN 0xa0000 /* Start of I/O Memory "hole" */ 87 #define IOM_END 0xFFFFF /* End of I/O Memory "hole" */ 88 #endif IOM_BEGIN 89 90 /* 91 * RAM Physical Address Space (ignoring the above mentioned "hole") 92 */ 93 94 #ifndef RAM_BEGIN 95 #define RAM_BEGIN 0x000000 /* Start of RAM Memory */ 96 #define RAM_END 0xFFFFFF /* End of RAM Memory */ 97 #endif IOM_BEGIN 98 99 /* 100 * Oddball Physical Memory Addresses 101 */ 102 #ifndef COMPAQ_RAMRELOC 103 #define COMPAQ_RAMRELOC 0x80c00000 /* Compaq RAM relocation/diag */ 104 #define COMPAQ_RAMSETUP 0x80c00002 /* Compaq RAM setup */ 105 #define WEITEK_FPU 0xC0000000 /* WTL 2167 */ 106 #define CYRIX_EMC 0xC0000000 /* Cyrix EMC */ 107 #endif COMPAQ_RAMRELOC 108