1b9528ddaSfujita /* 2b9528ddaSfujita * Copyright (c) 1992 OMRON Corporation. 3*b4c7f1a3Sbostic * Copyright (c) 1992, 1993 4*b4c7f1a3Sbostic * The Regents of the University of California. All rights reserved. 5b9528ddaSfujita * 6b9528ddaSfujita * This code is derived from software contributed to Berkeley by 7b9528ddaSfujita * OMRON Corporation. 8b9528ddaSfujita * 9b9528ddaSfujita * %sccs.include.redist.c% 10b9528ddaSfujita * 11*b4c7f1a3Sbostic * @(#)pioreg.h 8.1 (Berkeley) 06/10/93 12b9528ddaSfujita */ 13b9528ddaSfujita 14b9528ddaSfujita /* 15b9528ddaSfujita * PIO definitions 16b9528ddaSfujita * OMRON: $Id: pioreg.h,v 1.1 92/05/27 14:33:18 moti Exp $ 17b9528ddaSfujita * by Shigeto Mochida 18b9528ddaSfujita */ 19b9528ddaSfujita 20b9528ddaSfujita #define PIO0_ADDR 0x49000000 /* pio0 address */ 21b9528ddaSfujita #define PIO1_ADDR 0x4D000000 /* pio1 address */ 22b9528ddaSfujita 23b9528ddaSfujita #define PIO_MODED 0xB6 /* pio mode set */ 24b9528ddaSfujita 25b9528ddaSfujita struct pio { 26b9528ddaSfujita unsigned char a_port; 27b9528ddaSfujita unsigned char b_port; 28b9528ddaSfujita unsigned char c_port; 29b9528ddaSfujita unsigned char control_port; 30b9528ddaSfujita }; 31