1 /* 2 * Copyright (c) 1992 OMRON Corporation. 3 * Copyright (c) 1992 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * OMRON Corporation. 8 * 9 * %sccs.include.redist.c% 10 * 11 * @(#)sc.c 7.2 (Berkeley) 07/13/92 12 */ 13 14 /* 15 * sc.c -- FUJITSU MB89352 SCSI Protocole Controller (SPC) Device Driver 16 * 17 * remaked by A.Fujita, Mar-22-1992 18 * remaked again by A.Fujita, Apr-16-1992 19 */ 20 21 #define DEBUG_FUNC 22 23 #include "sc.h" 24 #if NSC > 0 25 26 #include "sys/param.h" 27 #include "sys/systm.h" 28 #include "sys/buf.h" 29 #include "device.h" 30 31 #include "scsireg.h" 32 #include "scsivar.h" 33 34 /* 35 * SC Driver Options 36 */ 37 38 #define QUADBYTES /* 4 bytes access to SPC DREG Reg. */ 39 #define NODISCONNECT /* not used SCSI DISCONNECT Ops. */ 40 #undef XFER_ENABLE /* using interrupt for DREG access */ 41 42 43 #define SCSI_IPL 2 44 #define SCSI_ID 7 45 46 extern char *hexstr(); 47 48 int scinit(), scstart(), scintr(); 49 void screset(); 50 struct driver scdriver = { 51 scinit, "sc", scstart, (int (*)()) 0, scintr, (int (*)()) 0 52 }; 53 54 struct scsi_softc scsi_softc[NSC]; 55 56 57 #define SC_TIMEOUT 0x01400000 /* (20971520) */ 58 59 60 /* 61 * for DEBUG 62 */ 63 64 char * 65 scsi_status(stat) 66 u_char stat; 67 { 68 if ((stat & 0x1e) == 0) 69 return("Good"); 70 else if ((stat & 0x1e) == STS_CHECKCOND) 71 return("Check Condition"); 72 else if ((stat & 0x1e) == STS_CONDMET) 73 return("Condition Met"); 74 else if ((stat & 0x1e) == STS_BUSY) 75 return("Busy"); 76 else if ((stat & 0x1e) == STS_INTERMED) 77 return("Intermediate status sent"); 78 else if ((stat & 0x1e) == STS_EXT) 79 return("Extended status valid"); 80 else 81 return("Unknown Status"); 82 } 83 84 #ifdef DEBUG_FUNC 85 86 char * 87 scsi_command(cmd) 88 u_char cmd; 89 { 90 if (cmd == CMD_TEST_UNIT_READY) 91 return("TEST_UNIT_READY"); 92 else if (cmd == CMD_REQUEST_SENSE) 93 return("REQUEST_SENSE"); 94 else if (cmd == CMD_INQUIRY) 95 return("INQUIRY"); 96 else if (cmd == CMD_READ) 97 return("READ"); 98 else if (cmd == CMD_WRITE) 99 return("WRITE"); 100 else if (cmd == CMD_READ_EXT) 101 return("READ EXT"); 102 else if (cmd == CMD_WRITE_EXT) 103 return("WRITE_EXT"); 104 else if (cmd == CMD_READ_CAPACITY) 105 return("READ_CAPACITY"); 106 else 107 return(hexstr(cmd, 2)); 108 } 109 110 char * 111 scsi_mesg(mesg) 112 u_char mesg; 113 { 114 if (mesg == MSG_CMD_COMPLETE) 115 return("Command Complete"); 116 else if (mesg == MSG_EXT_MESSAGE) 117 return("Extended Message"); 118 else if (mesg == MSG_SAVE_DATA_PTR) 119 return("Save Data Pointer"); 120 else if (mesg == MSG_RESTORE_PTR) 121 return("Restore Pointer"); 122 else if (mesg == MSG_DISCONNECT) 123 return("Disconnect"); 124 else if (mesg == MSG_INIT_DETECT_ERROR) 125 return("Initiator Detected Error"); 126 else if (mesg == MSG_ABORT) 127 return("Abort"); 128 else if (mesg == MSG_REJECT) 129 return("Message Reject"); 130 else if (mesg == MSG_NOOP) 131 return("No Operation"); 132 else if (mesg == MSG_PARITY_ERROR) 133 return("Message Parity Error"); 134 else if (mesg == MSG_BUS_DEVICE_RESET) 135 return("Bus Device Reset"); 136 else if (mesg == MSG_IDENTIFY) 137 return("Identify"); 138 else if (mesg == MSG_IDENTIFY_DR) 139 return("Identify (Disconnect)"); 140 else 141 return("Unknown Message"); 142 } 143 144 char * 145 phase_name(phase) 146 u_char phase; 147 { 148 if (phase == DATA_OUT_PHASE) 149 return("Data Out"); 150 else if (phase == DATA_IN_PHASE) 151 return("Data In"); 152 else if (phase == CMD_PHASE) 153 return("Command"); 154 else if (phase == STATUS_PHASE) 155 return("Status"); 156 else if (phase == BUS_FREE_PHASE) 157 return("Bus Free"); 158 else if (phase == ARB_SEL_PHASE) 159 return("Arbitration/Select"); 160 else if (phase == MESG_OUT_PHASE) 161 return("Message Out"); 162 else if (phase == MESG_IN_PHASE) 163 return("Message In"); 164 else 165 return("Unknown"); 166 } 167 #endif 168 169 /* 170 * Initialize SPC & Data Structure 171 */ 172 173 int 174 scinit(hc) 175 register struct hp_ctlr *hc; 176 { 177 register struct scsi_softc *hs = &scsi_softc[hc->hp_unit]; 178 register int i; 179 180 hc->hp_ipl = SCSI_IPL; 181 hs->sc_hc = hc; 182 hs->sc_sq.dq_forw = hs->sc_sq.dq_back = &hs->sc_sq; 183 hs->sc_wq.dq_forw = hs->sc_wq.dq_back = &hs->sc_wq; 184 185 hs->sc_flags = 0; 186 hs->sc_phase = BUS_FREE_PHASE; 187 188 hs->sc_stat = 0; 189 hs->sc_msg[0] = 0; 190 191 scsi_init_buf(); 192 193 screset(hc->hp_unit); 194 195 return(1); 196 } 197 198 void 199 screset(unit) 200 register int unit; 201 { 202 register struct scsi_softc *hs = &scsi_softc[unit]; 203 volatile register struct scsidevice *hd = 204 (struct scsidevice *)hs->sc_hc->hp_addr; 205 206 printf("sc%d: ", unit); 207 208 /* 209 * Disable interrupts then reset the FUJI chip. 210 */ 211 212 hd->scsi_sctl = SCTL_DISABLE | SCTL_CTRLRST; 213 hd->scsi_scmd = 0; 214 hd->scsi_pctl = 0; 215 hd->scsi_temp = 0; 216 hd->scsi_tch = 0; 217 hd->scsi_tcm = 0; 218 hd->scsi_tcl = 0; 219 hd->scsi_ints = 0; 220 221 /* We can use Asynchronous Transfer only */ 222 printf("async"); 223 224 /* 225 * Configure MB89352 with its SCSI address, all 226 * interrupts enabled & appropriate parity. 227 */ 228 hd->scsi_bdid = SCSI_ID; 229 hd->scsi_sctl = SCTL_DISABLE | SCTL_ABRT_ENAB| 230 SCTL_PARITY_ENAB | SCTL_RESEL_ENAB | 231 SCTL_INTR_ENAB; 232 printf(", parity"); 233 234 DELAY(400); 235 hd->scsi_sctl &= ~SCTL_DISABLE; 236 237 printf(", scsi id %d\n", SCSI_ID); 238 } 239 240 241 /* 242 * SPC Arbitration/Selection routine 243 */ 244 245 int 246 issue_select(hd, target, flags) 247 volatile register struct scsidevice *hd; 248 u_char target; 249 int flags; 250 { 251 #ifndef NODISCONNECT 252 if (flags & DQ_DISCONNECT) { 253 hd->scsi_scmd = SCMD_SET_ATN; 254 } 255 #endif 256 257 hd->scsi_pctl = 0; 258 hd->scsi_temp = (1 << SCSI_ID) | (1 << target); 259 260 /* select timeout is hardcoded to 2ms */ 261 hd->scsi_tch = 0; 262 hd->scsi_tcm = 32; 263 hd->scsi_tcl = 4; 264 265 hd->scsi_scmd = SCMD_SELECT; 266 267 return (1); 268 } 269 270 271 /* 272 * SPC Manual Transfer routines 273 */ 274 275 /* not yet */ 276 277 278 /* 279 * SPC Program Transfer routines 280 */ 281 282 int 283 ixfer_start(hd, len, phase) 284 volatile register struct scsidevice *hd; 285 register int len; 286 register u_char phase; 287 { 288 register int wait = 0; 289 290 hd->scsi_sdgc = 0; 291 292 hd->scsi_tch = ((len & 0xff0000) >> 16); 293 hd->scsi_tcm = ((len & 0x00ff00) >> 8); 294 hd->scsi_tcl = (len & 0x0000ff); 295 hd->scsi_pctl = phase; 296 hd->scsi_scmd = SCMD_XFR | SCMD_PROG_XFR; 297 298 while ((hd->scsi_ssts & SSTS_BUSY) == 0) { 299 if (wait > SC_TIMEOUT) { 300 panic("ixfer_start: too long wait"); 301 } 302 wait++; 303 DELAY(1); 304 } 305 } 306 307 int 308 ixfer_out(hd, len, buf) 309 volatile register struct scsidevice *hd; 310 register int len; 311 register u_char *buf; 312 { 313 u_char *t = buf; 314 register int wait = 0; 315 #ifdef QUADBYTES 316 register int qwait = 0; 317 register int l_len = len >> 3; 318 register u_long * l_buf = (u_long *) buf; 319 320 for(; l_len > 0; l_len--) { 321 while ((hd->scsi_ssts & SSTS_DREG_EMPTY) == 0) { 322 if (qwait > SC_TIMEOUT) { 323 printf("ixfer_out: quad time out\n"); 324 printf("ixfer_out: %d bytes sended\n", 325 (((u_char *) l_buf) - t)); 326 printf("ixfer_out: TC = %d\n", 327 ( hd->scsi_tch << 16 ) | 328 ( hd->scsi_tcm << 8 ) | 329 ( hd->scsi_tcl )); 330 return(-1); 331 } 332 qwait++; 333 DELAY(1); 334 } 335 *((u_long *) &hd->scsi_dreg) = *l_buf++; 336 *((u_long *) &hd->scsi_dreg) = *l_buf++; 337 } 338 339 len &= 0x07; 340 buf = (u_char *) l_buf; 341 #endif 342 for(; len > 0; len--) { 343 while (hd->scsi_ssts & SSTS_DREG_FULL) { 344 if (wait > SC_TIMEOUT) { 345 printf("ixfer_out: time out\n"); 346 printf("ixfer_out: %d bytes sended\n", 347 (buf - t)); 348 return(-1); 349 } 350 wait++; 351 DELAY(1); 352 } 353 hd->scsi_dreg = *buf++; 354 } 355 356 #ifdef QUADBYTES 357 return(qwait); 358 #else 359 return(wait); 360 #endif 361 } 362 363 int 364 ixfer_in(hd, len, buf) 365 volatile register struct scsidevice *hd; 366 register int len; 367 register u_char *buf; 368 { 369 u_char *t = buf; 370 register int wait = 0; 371 #ifdef QUADBYTES 372 register int qwait = 0; 373 register int l_len = len >> 3; 374 register u_long * l_buf = (u_long *) buf; 375 376 for(; l_len > 0; l_len--) { 377 while ((hd->scsi_ssts & SSTS_DREG_FULL) == 0) { 378 if (qwait > SC_TIMEOUT) { 379 printf("ixfer_in: quad time out\n"); 380 printf("ixfer_in: %d bytes recieved\n", 381 (((u_char *) l_buf) - t)); 382 return(-1); 383 } 384 qwait++; 385 DELAY(1); 386 } 387 *l_buf++ = *((u_long *) &hd->scsi_dreg); 388 *l_buf++ = *((u_long *) &hd->scsi_dreg); 389 } 390 391 len &= 0x07; 392 buf = (u_char *) l_buf; 393 #endif 394 for (; len > 0; len--) { 395 while (hd->scsi_ssts & SSTS_DREG_EMPTY) { 396 if (wait > SC_TIMEOUT) { 397 printf("ixfer_in: time out\n"); 398 printf("ixfer_in: %d bytes recieved\n", 399 (buf - t)); 400 return(-1); 401 } 402 wait++; 403 DELAY(1); 404 } 405 *buf++ = hd->scsi_dreg; 406 } 407 408 409 #ifdef QUADBYTES 410 return(qwait); 411 #else 412 return(wait); 413 #endif 414 } 415 416 417 #ifdef XFER_ENABLE 418 /* 419 * SPC Interrupt base Transfer Routines 420 */ 421 422 int 423 txfer_start(hd, len, phase) 424 volatile register struct scsidevice *hd; 425 register int len; 426 register u_char phase; 427 { 428 register int wait = 0; 429 430 hd->scsi_sdgc = SDGC_XFER_ENAB; /* for interrupt */ 431 432 hd->scsi_tch = ((len & 0xff0000) >> 16); 433 hd->scsi_tcm = ((len & 0x00ff00) >> 8); 434 hd->scsi_tcl = (len & 0x0000ff); 435 hd->scsi_pctl = phase; 436 hd->scsi_scmd = SCMD_XFR | SCMD_PROG_XFR; 437 438 while ((hd->scsi_ssts & SSTS_BUSY) == 0) { 439 if (wait > SC_TIMEOUT) { 440 panic("ixfer_start: too long wait"); 441 } 442 wait++; 443 DELAY(1); 444 } 445 } 446 447 int 448 txfer_in(ctlr) 449 register int ctlr; 450 { 451 register struct scsi_softc *hs = &scsi_softc[ctlr]; 452 volatile register struct scsidevice *hd = (struct scsidevice *) hs->sc_hc->hp_addr; 453 register struct scsi_queue *dq = hs->sc_sq.dq_forw; 454 #ifdef QUADBYTES 455 register u_long *lp; 456 457 if (hd->scsi_ssts & SSTS_DREG_FULL) { 458 lp = (u_long *) dq->dq_xferp; 459 460 *lp++ = *((u_long *) &hd->scsi_dreg); 461 *lp++ = *((u_long *) &hd->scsi_dreg); 462 463 dq->dq_xferp = (u_char *) lp; 464 dq->dq_xfercnt -= 8; 465 466 goto xfer_done; 467 } 468 #endif 469 470 *dq->dq_xferp++ = hd->scsi_dreg; 471 dq->dq_xfercnt--; 472 473 xfer_done: 474 #ifdef DEBUGPRINT 475 if (dq->dq_xfercnt == 0) { 476 dbgprintf("txfer_in: "); 477 dbgprintf("dq->dq_bp->b_un.b_addr = 0x%s, ", hexstr(dq->dq_bp->b_un.b_addr, 8)); 478 dbgprintf("dq->dq_xferp = 0x%s :", hexstr(dq->dq_xferp, 8)); 479 dbgprintf("done\n"); 480 } 481 #endif 482 } 483 #endif 484 485 /* 486 * SCSI Job Handler 487 */ 488 489 int 490 scstart(ctlr) 491 int ctlr; 492 { 493 register struct scsi_softc *hs = &scsi_softc[ctlr]; 494 volatile register struct scsidevice *hd = 495 (struct scsidevice *) hs->sc_hc->hp_addr; 496 register struct scsi_queue *dq = hs->sc_sq.dq_forw; 497 498 dq->dq_imax = 0; 499 dq->dq_imin = -1; 500 dq->dq_omax = 0; 501 dq->dq_omin = -1; 502 503 hs->sc_flags = 0; 504 hs->sc_phase = ARB_SEL_PHASE; 505 506 hs->sc_stat = 0; 507 hs->sc_msg[0] = 0; 508 509 #ifdef DEBUGPRINT 510 dbgprintf("\n"); 511 dbgprintf("scstart: ID = %d\n", dq->dq_slave); 512 dbgprintf("scstart: cdb[0] = %s\n", scsi_command(dq->dq_cdb->cdb[0])); 513 dbgprintf("scstart: cdb[1] = 0x%s\n", hexstr(dq->dq_cdb->cdb[1], 2)); 514 dbgprintf("scstart: cdb[2] = 0x%s\n", hexstr(dq->dq_cdb->cdb[2], 2)); 515 dbgprintf("scstart: cdb[3] = 0x%s\n", hexstr(dq->dq_cdb->cdb[3], 2)); 516 dbgprintf("scstart: cdb[4] = 0x%s\n", hexstr(dq->dq_cdb->cdb[4], 2)); 517 dbgprintf("scstart: cdb[5] = 0x%s\n", hexstr(dq->dq_cdb->cdb[5], 2)); 518 if (dq->dq_cdb->cdb[0] & 0xE0) { 519 dbgprintf("scstart: cdb[6] = 0x%s\n", hexstr(dq->dq_cdb->cdb[6], 2)); 520 dbgprintf("scstart: cdb[7] = 0x%s\n", hexstr(dq->dq_cdb->cdb[7], 2)); 521 dbgprintf("scstart: cdb[8] = 0x%s\n", hexstr(dq->dq_cdb->cdb[8], 2)); 522 dbgprintf("scstart: cdb[9] = 0x%s\n", hexstr(dq->dq_cdb->cdb[9], 2)); 523 } 524 dbgprintf("scstart: bp->b_bcount = %d\n", dq->dq_bp->b_bcount); 525 dbgprintf("scstart: %s\n", phase_name(hs->sc_phase)); 526 #endif 527 528 issue_select(hd, dq->dq_slave, dq->dq_flags); 529 530 return(1); 531 } 532 533 int 534 _scintr() 535 { 536 register struct scsi_softc *hs; 537 volatile register struct scsidevice *hd; 538 register int ctlr; 539 540 for (ctlr = 0; ctlr < NSC; ctlr++) { 541 hs = &scsi_softc[ctlr]; 542 hd = (struct scsidevice *) hs->sc_hc->hp_addr; 543 544 #ifdef XFER_ENABLE 545 if (((hd->scsi_psns & PHASE) == DATA_IN_PHASE) && 546 (hd->scsi_serr & SERR_XFER_OUT)) 547 txfer_in(ctlr); 548 #endif 549 550 if (hd->scsi_ints != 0) 551 scintr(ctlr); 552 } 553 554 return; 555 } 556 557 int 558 scintr(ctlr) 559 register int ctlr; 560 { 561 register struct scsi_softc *hs = &scsi_softc[ctlr]; 562 volatile register struct scsidevice *hd = (struct scsidevice *) hs->sc_hc->hp_addr; 563 register struct scsi_queue *dq = hs->sc_sq.dq_forw; 564 register u_char ints, temp; 565 register int i, slave; 566 int wait, len; 567 u_char *buf; 568 569 ints = hd->scsi_ints; 570 571 #ifdef DEBUGPRINT 572 dbgprintf("scintr: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x", 573 ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 574 if (hs->sc_phase == CMD_PHASE) 575 dbgprintf(" [%s]", scsi_command(dq->dq_cdb->cdb[0])); 576 if (hs->sc_phase & PHASE_MSG) 577 dbgprintf(" [%s]", scsi_mesg(hs->sc_msg[0])); 578 dbgprintf("\n"); 579 #endif 580 581 if (ints & INTS_DISCON) { 582 if (hs->sc_msg[0] == MSG_CMD_COMPLETE) { 583 hd->scsi_ints = ints; 584 585 if (hs->sc_lock != NULL) { 586 *(hs->sc_lock) = SC_IO_COMPLETE; 587 } else { 588 (dq->dq_driver->d_intr)(dq->dq_unit, hs->sc_stat); 589 } 590 591 return; 592 #ifndef NODISCONNECT 593 } else if (hs->sc_msg[0] == MSG_DISCONNECT) { 594 #ifdef DEBUGPRINT 595 dbgprintf("scintr: DISCONNECT : ctlr = %d, slave = %d, cdb = %s\n", 596 dq->dq_ctlr, dq->dq_slave, scsi_command(dq->dq_cdb->cdb[0])); 597 #endif 598 599 hd->scsi_ints = ints; 600 601 scpend(dq); 602 603 dq = hs->sc_sq.dq_forw; 604 605 if (dq != &hs->sc_sq) 606 (dq->dq_driver->d_start)(dq->dq_unit); 607 608 return; 609 #endif 610 } else 611 goto abort; 612 613 #ifndef NODISCONNECT 614 } else if (ints & INTS_RESEL) { 615 temp = hd->scsi_temp & ~(1 << SCSI_ID); 616 for (slave = 0; temp != 1; slave++) { 617 temp >>= 1; 618 } 619 620 hd->scsi_ints = ints; 621 622 scrschdl(ctlr, slave); 623 624 dq = hs->sc_sq.dq_forw; 625 #ifdef DEBUGPRINT 626 dbgprintf("\n"); 627 dbgprintf("scintr: RESELECT : ctlr = %d, slave = %d, cdb = %s\n", 628 dq->dq_ctlr, dq->dq_slave, scsi_command(dq->dq_cdb->cdb[0])); 629 #endif 630 #endif 631 } else if (ints & INTS_CMD_DONE) { 632 if (hs->sc_phase == BUS_FREE_PHASE) 633 goto abort; 634 else if (hs->sc_phase == MESG_IN_PHASE) { 635 hd->scsi_scmd = SCMD_RST_ACK; 636 637 if ((hs->sc_msg[0] == MSG_CMD_COMPLETE) || 638 (hs->sc_msg[0] == MSG_DISCONNECT)) { 639 hd->scsi_ints = ints; 640 641 hs->sc_phase = BUS_FREE_PHASE; 642 643 return; 644 } 645 } 646 if (hs->sc_flags & SC_SEL_TIMEOUT) 647 hs->sc_flags &= ~SC_SEL_TIMEOUT; 648 } else if (ints & INTS_SRV_REQ) { 649 if (hs->sc_phase != MESG_IN_PHASE) 650 goto abort; 651 } else if (ints & INTS_TIMEOUT) { 652 if (hs->sc_phase == ARB_SEL_PHASE) { 653 if (hs->sc_flags & SC_SEL_TIMEOUT) { 654 hd->scsi_ints = ints; 655 hs->sc_flags &= ~SC_SEL_TIMEOUT; 656 /* Such SCSI Device is not conected. */ 657 658 if (hs->sc_lock != NULL) { 659 *(hs->sc_lock) = SC_DEV_NOT_FOUND; 660 } else { 661 (dq->dq_driver->d_intr)(dq->dq_unit, SC_DEV_NOT_FOUND); 662 } 663 664 return; 665 } else { 666 /* wait more 250 usec */ 667 hs->sc_flags |= SC_SEL_TIMEOUT; 668 hd->scsi_temp = 0; 669 hd->scsi_tch = 0; 670 hd->scsi_tcm = 0x06; 671 hd->scsi_tcl = 0x40; 672 hd->scsi_ints = ints; 673 return; 674 } 675 } else 676 goto abort; 677 } else 678 goto abort; 679 680 hd->scsi_ints = ints; 681 682 /* 683 * Next SCSI Transfer 684 */ 685 686 wait = SC_TIMEOUT; 687 while ((hd->scsi_psns & PSNS_REQ) == 0) { 688 if (wait < 0) { 689 /* hd->scsi_scmd = SCMD_SET_ATN; */ 690 hd->scsi_scmd = SCMD_RST; 691 DELAY(40); /* wait 25 micro sec */ 692 hd->scsi_scmd = 0; 693 694 wait = SC_TIMEOUT; 695 while (wait-- > 0) 696 DELAY(1); 697 698 if (hs->sc_lock != NULL) { 699 *(hs->sc_lock) = SC_IO_TIMEOUT; 700 } else { 701 (dq->dq_driver->d_intr)(dq->dq_unit, SC_IO_TIMEOUT); 702 } 703 704 return; 705 } 706 DELAY(1); 707 wait--; 708 } 709 710 hs->sc_phase = hd->scsi_psns & PHASE; 711 712 #ifdef DEBUGPRINT 713 dbgprintf("scintr: %s\n", phase_name(hs->sc_phase)); 714 #endif 715 716 if ((hs->sc_phase == DATA_OUT_PHASE) || (hs->sc_phase == DATA_IN_PHASE)) { 717 len = ( hs->sc_lock != NULL ? hs->sc_len : dq->dq_bp->b_bcount ); 718 buf = ( hs->sc_lock != NULL ? hs->sc_buf : (u_char *) dq->dq_bp->b_un.b_addr ); 719 } else if (hs->sc_phase == CMD_PHASE) { 720 len = ( hs->sc_lock != NULL ? hs->sc_cdblen : dq->dq_cdb->len ); 721 buf = ( hs->sc_lock != NULL ? hs->sc_cdb : dq->dq_cdb->cdb ); 722 } else if (hs->sc_phase == STATUS_PHASE) { 723 len = 1; 724 buf = &hs->sc_stat; 725 } else { 726 if (hs->sc_phase == MESG_OUT_PHASE) { 727 #ifndef NODISCONNECT 728 hs->sc_msg[0] = MSG_IDENTIFY_DR; 729 #else 730 hs->sc_msg[0] = MSG_IDENTIFY; 731 #endif 732 } 733 len = 1; 734 buf = hs->sc_msg; 735 } 736 737 #ifdef XFER_ENABLE 738 if ((hs->sc_lock == NULL) && (hs->sc_phase == DATA_IN_PHASE)) { 739 dq->dq_xferp = buf; 740 dq->dq_xfercnt = len; 741 txfer_start(hd, len, hs->sc_phase); 742 return; 743 } 744 #endif 745 746 ixfer_start(hd, len, hs->sc_phase); 747 if (hs->sc_phase & PHASE_IO) { 748 if ((wait = ixfer_in(hd, len, buf)) == -1) { 749 goto time_out; 750 } 751 if (dq->dq_imin == -1) 752 dq->dq_imin = wait; 753 else 754 dq->dq_imin = min(wait, dq->dq_imin); 755 dq->dq_imax = max(wait, dq->dq_imax); 756 } else { 757 if ((wait = ixfer_out(hd, len, buf)) == -1) { 758 goto time_out; 759 } 760 if (dq->dq_omin == -1) 761 dq->dq_omin = wait; 762 else 763 dq->dq_omin = min(wait, dq->dq_omin); 764 dq->dq_omax = max(wait, dq->dq_omax); 765 } 766 767 return; 768 769 time_out: 770 scabort(hs, hd); 771 printf("scintr: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x Current Status\n", 772 hd->scsi_ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 773 774 if (hs->sc_lock != NULL) { 775 *(hs->sc_lock) = SC_IO_TIMEOUT; 776 } else { 777 (dq->dq_driver->d_intr)(dq->dq_unit, SC_IO_TIMEOUT); 778 } 779 780 return; 781 782 /* 783 * SCSI Abort 784 */ 785 abort: 786 787 /* SCSI IO failed */ 788 scabort(hs, hd); 789 hd->scsi_ints = ints; 790 791 if (hs->sc_lock != NULL) { 792 *(hs->sc_lock) = SC_IO_FAILED; 793 } else { 794 (dq->dq_driver->d_intr)(dq->dq_unit, SC_IO_FAILED); 795 } 796 797 return; 798 } 799 800 int 801 scabort(hs, hd) 802 register struct scsi_softc *hs; 803 volatile register struct scsidevice *hd; 804 { 805 int len; 806 u_char junk; 807 808 #ifdef DEBUGPRINT 809 dbgprintall(); 810 printf("\n"); 811 #endif 812 813 printf("scabort: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x Current Status\n", 814 hd->scsi_ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 815 816 if (hd->scsi_ints != 0) 817 hd->scsi_ints = hd->scsi_ints; 818 printf("scabort: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x Reset INTS reg.\n", 819 hd->scsi_ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 820 821 if (hd->scsi_psns == 0 || (hd->scsi_ssts & SSTS_INITIATOR) == 0) 822 /* no longer connected to scsi target */ 823 return; 824 825 /* get the number of bytes remaining in current xfer + fudge */ 826 len = (hd->scsi_tch << 16) | (hd->scsi_tcm << 8) | hd->scsi_tcl; 827 printf("scabort: Current xfer count = %d\n", len); 828 829 /* for that many bus cycles, try to send an abort msg */ 830 for (len += 1024; (hd->scsi_ssts & SSTS_INITIATOR) && --len >= 0; ) { 831 /* 832 hd->scsi_scmd = SCMD_SET_ATN; 833 printf("scabort: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x Set ATN\n", 834 hd->scsi_ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 835 */ 836 while ((hd->scsi_psns & PSNS_REQ) == 0) { 837 printf("scabort: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x Wait for REQ\n", 838 hd->scsi_ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 839 if (! (hd->scsi_ssts & SSTS_INITIATOR)) 840 goto out; 841 DELAY(1); 842 } 843 /* 844 if ((hd->scsi_psns & PHASE) == MESG_OUT_PHASE) { 845 hd->scsi_scmd = SCMD_RST_ATN; 846 printf("scabort: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x Reset ATN\n", 847 hd->scsi_ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 848 } 849 */ 850 hd->scsi_pctl = hs->sc_phase = hd->scsi_psns & PHASE; 851 printf("scabort: Phase = %s\n", phase_name(hs->sc_phase)); 852 853 if (hd->scsi_psns & PHASE_IO) { 854 /* one of the input phases - read & discard a byte */ 855 hd->scsi_scmd = SCMD_SET_ACK; 856 printf("scabort: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x Set ACK\n", 857 hd->scsi_ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 858 859 while (hd->scsi_psns & PSNS_REQ) { 860 printf("scabort: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x Wait for REQ\n", 861 hd->scsi_ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 862 DELAY(1); 863 } 864 865 junk = hd->scsi_temp; 866 printf("scabort: TEMP = 0x%s\n", hexstr(junk, 2)); 867 } else { 868 /* one of the output phases - send an abort msg */ 869 hd->scsi_temp = MSG_ABORT; 870 hd->scsi_scmd = SCMD_SET_ACK; 871 printf("scabort: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x Set ACK\n", 872 hd->scsi_ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 873 874 while (hd->scsi_psns & PSNS_REQ) { 875 printf("scabort: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x Wait for REQ\n", 876 hd->scsi_ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 877 DELAY(1); 878 } 879 } 880 881 hd->scsi_scmd = SCMD_RST_ACK; 882 printf("scabort: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x Reset ACK\n", 883 hd->scsi_ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 884 } 885 out: 886 /* 887 * Either the abort was successful & the bus is disconnected or 888 * the device didn't listen. If the latter, announce the problem. 889 * Either way, reset the card & the SPC. 890 */ 891 if (len < 0 && hs) 892 printf("sc%d: abort failed. phase=0x%x, ssts=0x%x\n", 893 hs->sc_hc->hp_unit, hd->scsi_psns, hd->scsi_ssts); 894 895 while (hd->scsi_ints == 0) 896 DELAY(1); 897 898 hd->scsi_ints = hd->scsi_ints; 899 900 printf("scintr: INTS 0x%x, SSTS 0x%x, PCTL 0x%x, PSNS 0x%x Current Status\n", 901 hd->scsi_ints, hd->scsi_ssts, hd->scsi_pctl, hd->scsi_psns); 902 903 printf("scabort: SCSI abort operation is done\n"); 904 } 905 906 907 /* 908 * SPC device queue handling 909 */ 910 911 int 912 screq(dq) 913 register struct scsi_queue *dq; 914 { 915 register struct scsi_softc *hs = &scsi_softc[dq->dq_ctlr]; 916 register struct scsi_queue *hq = &hs->sc_sq; 917 918 insque(dq, hq->dq_back); 919 920 if (dq->dq_back == hq) { 921 #ifdef QUE_DEBUG 922 printf("screq: slave = %d, command = %s\n", 923 hq->dq_forw->dq_slave, 924 scsi_command(hq->dq_forw->dq_cdb->cdb[0])); 925 #endif 926 return(1); 927 } 928 929 return(0); 930 } 931 932 #ifndef NODISCONNECT 933 int 934 scpend(dq) 935 register struct scsi_queue *dq; 936 { 937 register struct scsi_softc *hs = &scsi_softc[dq->dq_ctlr]; 938 register struct scsi_queue *hq = &hs->sc_sq; 939 register struct scsi_queue *wq = &hs->sc_wq; 940 941 remque(dq); 942 943 insque(dq, wq->dq_back); 944 } 945 946 int 947 scrschdl(ctlr, slave) 948 register int ctlr; 949 register int slave; 950 { 951 register struct scsi_softc *hs = &scsi_softc[ctlr]; 952 register struct scsi_queue *wq = &hs->sc_wq; 953 register struct scsi_queue *hq = &hs->sc_sq; 954 register struct scsi_queue *dq; 955 956 for (dq = wq->dq_forw; dq != wq; dq = dq->dq_forw) { 957 if (dq->dq_slave == slave) 958 goto found; 959 } 960 961 return(0); 962 963 found: 964 remque(dq); 965 insque(dq, hq); 966 967 return(1); 968 } 969 #endif 970 971 int 972 scfree(dq) 973 register struct scsi_queue *dq; 974 { 975 register struct scsi_softc *hs = &scsi_softc[dq->dq_ctlr]; 976 register struct scsi_queue *hq = &hs->sc_sq; 977 int status = hs->sc_stat; 978 979 remque(dq); 980 981 hs->sc_flags = 0; 982 hs->sc_phase = BUS_FREE_PHASE; 983 984 hs->sc_stat = 0; 985 hs->sc_msg[0] = 0; 986 987 if ((dq = hq->dq_forw) != hq) { 988 #ifdef QUE_DEBUG 989 printf("scfree: slave = %d, command = %s\n", 990 dq->dq_slave, 991 scsi_command(dq->dq_cdb->cdb[0])); 992 #endif 993 (dq->dq_driver->d_start)(dq->dq_unit); 994 } 995 996 return(status); 997 } 998 999 /* 1000 * SCSI common interface 1001 */ 1002 1003 int scsi_lock[NSC]; 1004 1005 int 1006 scsi_result(unit, stat) 1007 int unit, stat; 1008 { 1009 #ifdef SCSI_DEBUG 1010 printf("scsi_result: stat = %s\n", scsi_status(stat)); 1011 #endif 1012 if (stat < 0) 1013 scsi_lock[unit] = stat; 1014 else 1015 scsi_lock[unit] = SC_IO_COMPLETE; 1016 } 1017 1018 struct driver scsi_driver = { 1019 (int (*)()) 0, "scsi", (int (*)()) 0, (int (*)()) 0, scsi_result, (int (*)()) 0 1020 }; 1021 1022 #define SCSI_BUF 8 1023 1024 struct buf scsi_buf[SCSI_BUF]; 1025 1026 int 1027 scsi_init_buf() 1028 { 1029 register struct buf *rbp = &scsi_buf[0]; 1030 register int i; 1031 1032 rbp->av_forw = rbp->av_back = rbp; 1033 1034 for(i = 0; i < SCSI_BUF; i++) 1035 scsi_free_buf(&scsi_buf[i]); 1036 } 1037 1038 int 1039 scsi_free_buf(bp) 1040 register struct buf *bp; 1041 { 1042 register struct buf *rbp = &scsi_buf[0]; 1043 1044 bp->av_forw = rbp; 1045 bp->av_back = rbp->av_back; 1046 1047 rbp->av_back->av_forw = bp; 1048 rbp->av_back = bp; 1049 } 1050 1051 struct buf * 1052 scsi_get_buf() 1053 { 1054 register struct buf *rbp = &scsi_buf[0]; 1055 register struct buf *bp = rbp->av_forw; 1056 1057 if (bp == rbp) 1058 return((struct buf *) 0); 1059 1060 bp->av_forw->av_back = rbp; 1061 rbp->av_forw = bp->av_forw; 1062 1063 return(bp); 1064 } 1065 1066 struct scsi_queue scsi_entry[NSC]; 1067 1068 int 1069 scsi_immed_command(ctlr, slave, lun, cdb, buf, len) 1070 int ctlr, slave, lun; 1071 struct scsi_fmt_cdb *cdb; 1072 u_char *buf; 1073 unsigned len; 1074 { 1075 register struct scsi_softc *hs = &scsi_softc[ctlr]; 1076 volatile register struct scsidevice *hd = 1077 (struct scsidevice *) hs->sc_hc->hp_addr; 1078 register struct scsi_queue *dq = &scsi_entry[ctlr]; 1079 register struct buf *bp; 1080 int s, status, wait = 30; 1081 1082 #ifdef SCSI_DEBUG 1083 printf("scsi_immed_command( %d, %d, %d, cdb(%d,%s), buf, %d): Start\n", 1084 ctlr, slave, lun, cdb->len, scsi_command(cdb->cdb[0]), len); 1085 #endif 1086 1087 if ((bp = scsi_get_buf()) == 0) { 1088 return(SC_BUSY); 1089 } 1090 1091 s = splbio(); 1092 1093 bp->b_flags = B_BUSY; 1094 bp->b_bcount = len; 1095 bp->b_un.b_addr = (caddr_t) buf; 1096 1097 dq->dq_unit = ctlr; 1098 dq->dq_ctlr = ctlr; 1099 dq->dq_slave = slave; 1100 dq->dq_driver = &scsi_driver; 1101 dq->dq_cdb = cdb; 1102 dq->dq_bp = bp; 1103 1104 scsi_lock[ctlr] = SC_IN_PROGRESS; 1105 if (screq(dq)) 1106 scstart(ctlr); 1107 1108 splx(s); 1109 1110 while (scsi_lock[ctlr] == SC_IN_PROGRESS) { 1111 if (wait < 0) { 1112 scabort(hs, hd); 1113 1114 s = splbio(); 1115 status = scfree(dq); 1116 splx(s); 1117 1118 bp->b_flags = 0; 1119 1120 return(SC_IO_FAILED); 1121 } 1122 1123 DELAY(100000); 1124 wait--; 1125 } 1126 1127 s = splbio(); 1128 status = scfree(dq); 1129 splx(s); 1130 1131 if (scsi_lock[ctlr] < 0) 1132 status = scsi_lock[ctlr]; 1133 1134 scsi_free_buf(bp); 1135 1136 #ifdef SCSI_DEBUG 1137 printf("scsi_immed_command: Status -- 0x%x\n", status); 1138 #endif 1139 return(status); 1140 } 1141 1142 int 1143 scsi_test_unit_rdy(ctlr, slave, lun) 1144 int ctlr, slave, lun; 1145 { 1146 static struct scsi_fmt_cdb cdb = { 6, CMD_TEST_UNIT_READY }; 1147 int stat; 1148 1149 while ((stat = scsi_immed_command(ctlr, slave, lun, 1150 &cdb, (u_char *) 0, 0)) == SC_BUSY) { 1151 DELAY(10000); 1152 } 1153 1154 return(stat); 1155 } 1156 1157 int 1158 scsi_request_sense(ctlr, slave, lun, buf, len) 1159 int ctlr, slave, lun; 1160 u_char *buf; 1161 unsigned len; 1162 { 1163 register struct scsi_softc *hs = &scsi_softc[ctlr]; 1164 volatile register struct scsidevice *hd = 1165 (struct scsidevice *) hs->sc_hc->hp_addr; 1166 static struct scsi_fmt_cdb req_cmd = { 6, CMD_REQUEST_SENSE }; 1167 int s, status, lock; 1168 1169 #ifdef REQ_DEBUG 1170 printf("scsi_request_sense( %d, %d, %d, buf, %d) -- Start\n", 1171 ctlr, slave, lun, len); 1172 #endif 1173 1174 req_cmd.cdb[1] = lun; 1175 req_cmd.cdb[4] = len; 1176 1177 if (hd->scsi_ssts & (SSTS_INITIATOR|SSTS_TARGET|SSTS_BUSY)) 1178 return(0); 1179 1180 s = splbio(); 1181 1182 hs->sc_flags = 0; 1183 hs->sc_phase = ARB_SEL_PHASE; 1184 1185 hs->sc_cdb = req_cmd.cdb; 1186 hs->sc_cdblen = req_cmd.len; 1187 hs->sc_buf = buf; 1188 hs->sc_len = len; 1189 1190 hs->sc_stat = 0; 1191 hs->sc_msg[0] = 0; 1192 1193 lock = SC_IN_PROGRESS; 1194 hs->sc_lock = &lock; 1195 1196 issue_select(hd, slave, 0); 1197 1198 spl0(); 1199 1200 while ((lock == SC_IN_PROGRESS) || (lock == SC_DISCONNECTED)) 1201 DELAY(10); 1202 1203 splbio(); 1204 1205 hs->sc_flags = 0; 1206 hs->sc_phase = BUS_FREE_PHASE; 1207 1208 hs->sc_cdb = NULL; 1209 hs->sc_cdblen = 0; 1210 hs->sc_buf = NULL; 1211 hs->sc_len = 0; 1212 hs->sc_lock = NULL; 1213 1214 status = hs->sc_stat; 1215 1216 hs->sc_stat = 0; 1217 hs->sc_msg[0] = 0; 1218 1219 splx(s); 1220 1221 if (lock == SC_IO_COMPLETE) { 1222 #ifdef REQ_DEBUG 1223 printf("scsi_request_sense: Status -- 0x%x\n", status); 1224 #endif 1225 return(status); 1226 } else { 1227 return(lock); 1228 } 1229 } 1230 #endif 1231