1 /* 2 * Copyright (c) 1988 University of Utah. 3 * Copyright (c) 1992 OMRON Corporation. 4 * Copyright (c) 1982, 1986, 1990, 1992 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department. 10 * 11 * %sccs.include.redist.c% 12 * 13 * from: Utah $Hdr: machparam.h 1.11 89/08/14$ 14 * OMRON: $Id: param.h,v 1.3 92/06/14 06:28:28 moti Exp $ 15 * 16 * from: hp300/include/param.h 7.12 (Berkeley) 7/8/92 17 * 18 * @(#)param.h 7.2 (Berkeley) 07/23/92 19 */ 20 21 /* 22 * Machine dependent constants for LUNA taken from: 23 * Param.h for HP9000 series 300. 24 */ 25 #define MACHINE "luna68k" 26 27 /* 28 * Round p (pointer or byte index) up to a correctly-aligned value 29 * for all data types (int, long, ...). The result is u_int and 30 * must be cast to any desired pointer type. 31 */ 32 #define ALIGNBYTES 3 33 #define ALIGN(p) (((u_int)(p) + ALIGNBYTES) &~ ALIGNBYTES) 34 35 #define NBPG 4096 /* bytes/page */ 36 #define PGOFSET (NBPG-1) /* byte offset into page */ 37 #define PGSHIFT 12 /* LOG2(NBPG) */ 38 #define NPTEPG (NBPG/(sizeof (struct pte))) 39 40 #define NBSEG 0x400000 /* bytes/segment */ 41 #define SEGOFSET (NBSEG-1) /* byte offset into segment */ 42 #define SEGSHIFT 22 /* LOG2(NBSEG) */ 43 44 #define KERNBASE 0x00000000 /* start of kernel virtual */ 45 #define BTOPKERNBASE ((u_long)KERNBASE >> PGSHIFT) 46 47 #define DEV_BSIZE 512 48 #define DEV_BSHIFT 9 /* log2(DEV_BSIZE) */ 49 #define BLKDEV_IOSIZE 2048 50 #define MAXPHYS (64 * 1024) /* max raw I/O transfer size */ 51 52 #define CLSIZE 1 53 #define CLSIZELOG2 0 54 55 /* NOTE: SSIZE, SINCR and UPAGES must be multiples of CLSIZE */ 56 #define SSIZE 1 /* initial stack size/NBPG */ 57 #define SINCR 1 /* increment of stack/NBPG */ 58 59 #define UPAGES 3 /* pages of u-area */ 60 61 /* 62 * Constants related to network buffer management. 63 * MCLBYTES must be no larger than CLBYTES (the software page size), and, 64 * on machines that exchange pages of input or output buffers with mbuf 65 * clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple 66 * of the hardware page size. 67 */ 68 #define MSIZE 128 /* size of an mbuf */ 69 #define MCLBYTES 1024 70 #define MCLSHIFT 10 71 #define MCLOFSET (MCLBYTES - 1) 72 #ifndef NMBCLUSTERS 73 #ifdef GATEWAY 74 #define NMBCLUSTERS 512 /* map size, max cluster allocation */ 75 #else 76 #define NMBCLUSTERS 256 /* map size, max cluster allocation */ 77 #endif 78 #endif 79 80 /* 81 * Size of kernel malloc arena in CLBYTES-sized logical pages 82 */ 83 #ifndef NKMEMCLUSTERS 84 #define NKMEMCLUSTERS (2048*1024/CLBYTES) 85 #endif 86 87 /* pages ("clicks") (4096 bytes) to disk blocks */ 88 #define ctod(x) ((x)<<(PGSHIFT-DEV_BSHIFT)) 89 #define dtoc(x) ((x)>>(PGSHIFT-DEV_BSHIFT)) 90 #define dtob(x) ((x)<<DEV_BSHIFT) 91 92 /* pages to bytes */ 93 #define ctob(x) ((x)<<PGSHIFT) 94 95 /* bytes to pages */ 96 #define btoc(x) (((unsigned)(x)+(NBPG-1))>>PGSHIFT) 97 98 #define btodb(bytes) /* calculates (bytes / DEV_BSIZE) */ \ 99 ((unsigned)(bytes) >> DEV_BSHIFT) 100 #define dbtob(db) /* calculates (db * DEV_BSIZE) */ \ 101 ((unsigned)(db) << DEV_BSHIFT) 102 103 /* 104 * Map a ``block device block'' to a file system block. 105 * This should be device dependent, and should use the bsize 106 * field from the disk label. 107 * For now though just use DEV_BSIZE. 108 */ 109 #define bdbtofsb(bn) ((bn) / (BLKDEV_IOSIZE/DEV_BSIZE)) 110 111 /* 112 * Mach derived conversion macros 113 */ 114 #define luna_round_page(x) ((((unsigned)(x)) + NBPG - 1) & ~(NBPG-1)) 115 #define luna_trunc_page(x) ((unsigned)(x) & ~(NBPG-1)) 116 #define luna_btop(x) ((unsigned)(x) >> PGSHIFT) 117 #define luna_ptob(x) ((unsigned)(x) << PGSHIFT) 118 119 /* 120 * spl functions; all but spl0 are done in-line 121 */ 122 #include <machine/psl.h> 123 124 #define _spl(s) \ 125 ({ \ 126 register int _spl_r; \ 127 \ 128 asm __volatile ("clrl %0; movew sr,%0; movew %1,sr" : \ 129 "&=d" (_spl_r) : "di" (s)); \ 130 _spl_r; \ 131 }) 132 133 /* spl0 requires checking for software interrupts */ 134 #define spl1() _spl(PSL_S|PSL_IPL1) 135 #define spl2() _spl(PSL_S|PSL_IPL2) 136 #define spl3() _spl(PSL_S|PSL_IPL3) 137 #define spl4() _spl(PSL_S|PSL_IPL4) 138 #define spl5() _spl(PSL_S|PSL_IPL5) 139 #define spl6() _spl(PSL_S|PSL_IPL6) 140 #define spl7() _spl(PSL_S|PSL_IPL7) 141 142 #define splsoftclock() spl1() 143 #define splnet() spl1() 144 #define splbio() spl5() 145 #define splimp() spl5() 146 #define spltty() spl6() 147 #define splclock() spl5() 148 #define splstatclock() spl5() 149 #define splvm() spl6() 150 #define splhigh() spl7() 151 #define splsched() spl7() 152 153 /* watch out for side effects */ 154 #define splx(s) (s & PSL_IPL ? _spl(s) : spl0()) 155 156 #ifdef KERNEL 157 #ifndef LOCORE 158 int cpuspeed; 159 #define DELAY(n) { register int N = cpuspeed * (n); while (--N > 0); } 160 #endif 161 162 #else 163 #define DELAY(n) { register int N = (n); while (--N > 0); } 164 #endif 165