xref: /original-bsd/sys/luna68k/include/param.h (revision 3705696b)
1 /*
2  * Copyright (c) 1988 University of Utah.
3  * Copyright (c) 1992 OMRON Corporation.
4  * Copyright (c) 1982, 1986, 1990, 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department.
10  *
11  * %sccs.include.redist.c%
12  *
13  * from: Utah $Hdr: machparam.h 1.11 89/08/14$
14  * from: hp300/include/param.h	7.13 (Berkeley) 12/27/92
15  *
16  *	@(#)param.h	8.1 (Berkeley) 06/10/93
17  */
18 
19 /*
20  * Machine dependent constants for LUNA taken from:
21  * Param.h for HP9000 series 300.
22  */
23 #define	MACHINE "luna68k"
24 
25 /*
26  * Round p (pointer or byte index) up to a correctly-aligned value
27  * for all data types (int, long, ...).   The result is u_int and
28  * must be cast to any desired pointer type.
29  */
30 #define	ALIGNBYTES	3
31 #define	ALIGN(p)	(((u_int)(p) + ALIGNBYTES) &~ ALIGNBYTES)
32 
33 #define	NBPG		4096		/* bytes/page */
34 #define	PGOFSET		(NBPG-1)	/* byte offset into page */
35 #define	PGSHIFT		12		/* LOG2(NBPG) */
36 #define	NPTEPG		(NBPG/(sizeof (struct pte)))
37 
38 #define NBSEG	       	0x400000	/* bytes/segment */
39 #define	SEGOFSET	(NBSEG-1)	/* byte offset into segment */
40 #define	SEGSHIFT	22		/* LOG2(NBSEG) */
41 
42 #define	KERNBASE	0x00000000	/* start of kernel virtual */
43 #define	BTOPKERNBASE	((u_long)KERNBASE >> PGSHIFT)
44 
45 #define	DEV_BSIZE	512
46 #define	DEV_BSHIFT	9		/* log2(DEV_BSIZE) */
47 #define BLKDEV_IOSIZE	2048
48 #define	MAXPHYS		(64 * 1024)	/* max raw I/O transfer size */
49 
50 #define	CLSIZE		1
51 #define	CLSIZELOG2	0
52 
53 /* NOTE: SSIZE, SINCR and UPAGES must be multiples of CLSIZE */
54 #define	SSIZE		1		/* initial stack size/NBPG */
55 #define	SINCR		1		/* increment of stack/NBPG */
56 
57 #define	UPAGES		2		/* pages of u-area */
58 
59 /*
60  * Constants related to network buffer management.
61  * MCLBYTES must be no larger than CLBYTES (the software page size), and,
62  * on machines that exchange pages of input or output buffers with mbuf
63  * clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple
64  * of the hardware page size.
65  */
66 #define	MSIZE		128		/* size of an mbuf */
67 #define	MCLBYTES	2048		/* large enough for ether MTU */
68 #define	MCLSHIFT	11
69 #define	MCLOFSET	(MCLBYTES - 1)
70 #ifndef NMBCLUSTERS
71 #ifdef GATEWAY
72 #define	NMBCLUSTERS	512		/* map size, max cluster allocation */
73 #else
74 #define	NMBCLUSTERS	256		/* map size, max cluster allocation */
75 #endif
76 #endif
77 
78 /*
79  * Size of kernel malloc arena in CLBYTES-sized logical pages
80  */
81 #ifndef NKMEMCLUSTERS
82 #define	NKMEMCLUSTERS	(2048*1024/CLBYTES)
83 #endif
84 
85 /* pages ("clicks") (4096 bytes) to disk blocks */
86 #define	ctod(x)	((x)<<(PGSHIFT-DEV_BSHIFT))
87 #define	dtoc(x)	((x)>>(PGSHIFT-DEV_BSHIFT))
88 #define	dtob(x)	((x)<<DEV_BSHIFT)
89 
90 /* pages to bytes */
91 #define	ctob(x)	((x)<<PGSHIFT)
92 
93 /* bytes to pages */
94 #define	btoc(x)	(((unsigned)(x)+(NBPG-1))>>PGSHIFT)
95 
96 #define	btodb(bytes)	 		/* calculates (bytes / DEV_BSIZE) */ \
97 	((unsigned)(bytes) >> DEV_BSHIFT)
98 #define	dbtob(db)			/* calculates (db * DEV_BSIZE) */ \
99 	((unsigned)(db) << DEV_BSHIFT)
100 
101 /*
102  * Map a ``block device block'' to a file system block.
103  * This should be device dependent, and should use the bsize
104  * field from the disk label.
105  * For now though just use DEV_BSIZE.
106  */
107 #define	bdbtofsb(bn)	((bn) / (BLKDEV_IOSIZE/DEV_BSIZE))
108 
109 /*
110  * Mach derived conversion macros
111  */
112 #define luna_round_page(x)	((((unsigned)(x)) + NBPG - 1) & ~(NBPG-1))
113 #define luna_trunc_page(x)	((unsigned)(x) & ~(NBPG-1))
114 #define luna_btop(x)		((unsigned)(x) >> PGSHIFT)
115 #define luna_ptob(x)		((unsigned)(x) << PGSHIFT)
116 
117 /*
118  * spl functions; all but spl0 are done in-line
119  */
120 #include <machine/psl.h>
121 
122 #define _spl(s) \
123 ({ \
124         register int _spl_r; \
125 \
126         asm __volatile ("clrl %0; movew sr,%0; movew %1,sr" : \
127                 "&=d" (_spl_r) : "di" (s)); \
128         _spl_r; \
129 })
130 
131 /* spl0 requires checking for software interrupts */
132 #define spl1()  _spl(PSL_S|PSL_IPL1)
133 #define spl2()  _spl(PSL_S|PSL_IPL2)
134 #define spl3()  _spl(PSL_S|PSL_IPL3)
135 #define spl4()  _spl(PSL_S|PSL_IPL4)
136 #define spl5()  _spl(PSL_S|PSL_IPL5)
137 #define spl6()  _spl(PSL_S|PSL_IPL6)
138 #define spl7()  _spl(PSL_S|PSL_IPL7)
139 
140 #define splsoftclock()	spl1()
141 #define splnet()	spl1()
142 #define splbio()	spl5()
143 #define splimp()	spl5()
144 #define spltty()	spl6()
145 #define splclock()	spl5()
146 #define splstatclock()	spl5()
147 #define splvm()		spl6()
148 #define splhigh()	spl7()
149 #define splsched()	spl7()
150 
151 /* watch out for side effects */
152 #define splx(s)         (s & PSL_IPL ? _spl(s) : spl0())
153 
154 #ifdef KERNEL
155 #ifndef LOCORE
156 int	cpuspeed;
157 #define	DELAY(n)	{ register int N = cpuspeed * (n); while (--N > 0); }
158 #endif
159 
160 #else
161 #define	DELAY(n)	{ register int N = (n); while (--N > 0); }
162 #endif
163