1 /* 2 * Copyright (c) 1992 OMRON Corporation. 3 * Copyright (c) 1991, 1993 4 * The Regents of the University of California. All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * the Systems Programming Group of the University of Utah Computer 8 * Science Department. 9 * 10 * %sccs.include.redist.c% 11 * 12 * from: hp300/hp300/pmap.c 7.16 (Berkeley) 5/20/93 13 * 14 * @(#)pmap.c 8.1 (Berkeley) 06/10/93 15 */ 16 17 /* 18 * LUNA physical map management code taken from: 19 * HP9000/300 series physical map management code. 20 * 21 * Supports: 22 * 68030 with on-chip MMU (LUNA-I) 23 * 68040 with on-chip MMU (LUNA-II) 24 * 25 * Notes: 26 * Don't even pay lip service to multiprocessor support. 27 * 28 * We assume TLB entries don't have process tags (except for the 29 * supervisor/user distinction) so we only invalidate TLB entries 30 * when changing mappings for the current (or kernel) pmap. This is 31 * technically not true for the 68551 but we flush the TLB on every 32 * context switch, so it effectively winds up that way. 33 * 34 * Bitwise and/or operations are significantly faster than bitfield 35 * references so we use them when accessing STE/PTEs in the pmap_pte_* 36 * macros. Note also that the two are not always equivalent; e.g.: 37 * (*(int *)pte & PG_PROT) [4] != pte->pg_prot [1] 38 * and a couple of routines that deal with protection and wiring take 39 * some shortcuts that assume the and/or definitions. 40 * 41 * This implementation will only work for PAGE_SIZE == NBPG 42 * (i.e. 4096 bytes). 43 */ 44 45 /* 46 * Manages physical address maps. 47 * 48 * In addition to hardware address maps, this 49 * module is called upon to provide software-use-only 50 * maps which may or may not be stored in the same 51 * form as hardware maps. These pseudo-maps are 52 * used to store intermediate results from copy 53 * operations to and from address spaces. 54 * 55 * Since the information managed by this module is 56 * also stored by the logical address mapping module, 57 * this module may throw away valid virtual-to-physical 58 * mappings at almost any time. However, invalidations 59 * of virtual-to-physical mappings must be done as 60 * requested. 61 * 62 * In order to cope with hardware architectures which 63 * make virtual-to-physical map invalidates expensive, 64 * this module may delay invalidate or reduced protection 65 * operations until such time as they are actually 66 * necessary. This module is given full information as 67 * to which processors are currently using which maps, 68 * and to when physical maps must be made correct. 69 */ 70 71 #include <sys/param.h> 72 #include <sys/systm.h> 73 #include <sys/proc.h> 74 #include <sys/malloc.h> 75 #include <sys/user.h> 76 77 #include <luna68k/luna68k/pte.h> 78 79 #include <vm/vm.h> 80 #include <vm/vm_kern.h> 81 #include <vm/vm_page.h> 82 83 #include <machine/cpu.h> 84 85 #ifdef PMAPSTATS 86 struct { 87 int collectscans; 88 int collectpages; 89 int kpttotal; 90 int kptinuse; 91 int kptmaxuse; 92 } kpt_stats; 93 struct { 94 int kernel; /* entering kernel mapping */ 95 int user; /* entering user mapping */ 96 int ptpneeded; /* needed to allocate a PT page */ 97 int nochange; /* no change at all */ 98 int pwchange; /* no mapping change, just wiring or protection */ 99 int wchange; /* no mapping change, just wiring */ 100 int pchange; /* no mapping change, just protection */ 101 int mchange; /* was mapped but mapping to different page */ 102 int managed; /* a managed page */ 103 int firstpv; /* first mapping for this PA */ 104 int secondpv; /* second mapping for this PA */ 105 int ci; /* cache inhibited */ 106 int unmanaged; /* not a managed page */ 107 int flushes; /* cache flushes */ 108 } enter_stats; 109 struct { 110 int calls; 111 int removes; 112 int pvfirst; 113 int pvsearch; 114 int ptinvalid; 115 int uflushes; 116 int sflushes; 117 } remove_stats; 118 struct { 119 int calls; 120 int changed; 121 int alreadyro; 122 int alreadyrw; 123 } protect_stats; 124 struct chgstats { 125 int setcalls; 126 int sethits; 127 int setmiss; 128 int clrcalls; 129 int clrhits; 130 int clrmiss; 131 } changebit_stats[16]; 132 #endif 133 134 #ifdef DEBUG 135 int debugmap = 0; 136 int pmapdebug = 0x2000; 137 #define PDB_FOLLOW 0x0001 138 #define PDB_INIT 0x0002 139 #define PDB_ENTER 0x0004 140 #define PDB_REMOVE 0x0008 141 #define PDB_CREATE 0x0010 142 #define PDB_PTPAGE 0x0020 143 #define PDB_CACHE 0x0040 144 #define PDB_BITS 0x0080 145 #define PDB_COLLECT 0x0100 146 #define PDB_PROTECT 0x0200 147 #define PDB_SEGTAB 0x0400 148 #define PDB_MULTIMAP 0x0800 149 #define PDB_PARANOIA 0x2000 150 #define PDB_WIRING 0x4000 151 #define PDB_PVDUMP 0x8000 152 153 #ifdef HAVEVAC 154 int pmapvacflush = 0; 155 #define PVF_ENTER 0x01 156 #define PVF_REMOVE 0x02 157 #define PVF_PROTECT 0x04 158 #define PVF_TOTAL 0x80 159 #endif 160 161 #if defined(LUNA2) 162 int dowriteback = 1; /* 68040: enable writeback caching */ 163 int dokwriteback = 1; /* 68040: enable writeback caching of kernel AS */ 164 #endif 165 166 extern vm_offset_t pager_sva, pager_eva; 167 #endif 168 169 /* 170 * Get STEs and PTEs for user/kernel address space 171 */ 172 #if defined(LUNA2) 173 #define pmap_ste1(m, v) \ 174 (&((m)->pm_stab[(vm_offset_t)(v) >> SG4_SHIFT1])) 175 /* XXX assumes physically contiguous ST pages (if more than one) */ 176 #define pmap_ste2(m, v) \ 177 (&((m)->pm_stab[(st_entry_t *)(*(u_int *)pmap_ste1(m, v) & SG4_ADDR1) \ 178 - (m)->pm_stpa + (((v) & SG4_MASK2) >> SG4_SHIFT2)])) 179 #define pmap_ste(m, v) \ 180 (&((m)->pm_stab[(vm_offset_t)(v) \ 181 >> (mmutype == MMU_68040 ? SG4_SHIFT1 : SG_ISHIFT)])) 182 #define pmap_ste_v(m, v) \ 183 (mmutype == MMU_68040 \ 184 ? ((*(int *)pmap_ste1(m, v) & SG_V) && \ 185 (*(int *)pmap_ste2(m, v) & SG_V)) \ 186 : (*(int *)pmap_ste(m, v) & SG_V)) 187 #else 188 #define pmap_ste(m, v) (&((m)->pm_stab[(vm_offset_t)(v) >> SG_ISHIFT])) 189 #define pmap_ste_v(m, v) (*(int *)pmap_ste(m, v) & SG_V) 190 #endif 191 192 #define pmap_pte(m, v) (&((m)->pm_ptab[(vm_offset_t)(v) >> PG_SHIFT])) 193 #define pmap_pte_pa(pte) (*(int *)(pte) & PG_FRAME) 194 #define pmap_pte_w(pte) (*(int *)(pte) & PG_W) 195 #define pmap_pte_ci(pte) (*(int *)(pte) & PG_CI) 196 #define pmap_pte_m(pte) (*(int *)(pte) & PG_M) 197 #define pmap_pte_u(pte) (*(int *)(pte) & PG_U) 198 #define pmap_pte_prot(pte) (*(int *)(pte) & PG_PROT) 199 #define pmap_pte_v(pte) (*(int *)(pte) & PG_V) 200 201 #define pmap_pte_set_w(pte, v) \ 202 if (v) *(int *)(pte) |= PG_W; else *(int *)(pte) &= ~PG_W 203 #define pmap_pte_set_prot(pte, v) \ 204 if (v) *(int *)(pte) |= PG_PROT; else *(int *)(pte) &= ~PG_PROT 205 #define pmap_pte_w_chg(pte, nw) ((nw) ^ pmap_pte_w(pte)) 206 #define pmap_pte_prot_chg(pte, np) ((np) ^ pmap_pte_prot(pte)) 207 208 /* 209 * Given a map and a machine independent protection code, 210 * convert to an luna protection code. 211 */ 212 #define pte_prot(m, p) (protection_codes[p]) 213 int protection_codes[8]; 214 215 /* 216 * Kernel page table page management. 217 */ 218 struct kpt_page { 219 struct kpt_page *kpt_next; /* link on either used or free list */ 220 vm_offset_t kpt_va; /* always valid kernel VA */ 221 vm_offset_t kpt_pa; /* PA of this page (for speed) */ 222 }; 223 struct kpt_page *kpt_free_list, *kpt_used_list; 224 struct kpt_page *kpt_pages; 225 226 /* 227 * Kernel segment/page table and page table map. 228 * The page table map gives us a level of indirection we need to dynamically 229 * expand the page table. It is essentially a copy of the segment table 230 * with PTEs instead of STEs. All are initialized in locore at boot time. 231 * Sysmap will initially contain VM_KERNEL_PT_PAGES pages of PTEs. 232 * Segtabzero is an empty segment table which all processes share til they 233 * reference something. 234 */ 235 st_entry_t *Sysseg; 236 pt_entry_t *Sysmap, *Sysptmap; 237 st_entry_t *Segtabzero, *Segtabzeropa; 238 vm_size_t Sysptsize = VM_KERNEL_PT_PAGES; 239 240 struct pmap kernel_pmap_store; 241 vm_map_t pt_map; 242 243 vm_offset_t avail_start; /* PA of first available physical page */ 244 vm_offset_t avail_end; /* PA of last available physical page */ 245 vm_size_t mem_size; /* memory size in bytes */ 246 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss)*/ 247 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 248 vm_offset_t vm_first_phys; /* PA of first managed page */ 249 vm_offset_t vm_last_phys; /* PA just past last managed page */ 250 boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 251 char *pmap_attributes; /* reference and modify bits */ 252 #ifdef HAVEVAC 253 int pmap_aliasmask; /* seperation at which VA aliasing ok */ 254 #endif 255 #if defined(LUNA2) 256 int protostfree; /* prototype (default) free ST map */ 257 #endif 258 259 /* 260 * Internal routines 261 */ 262 void pmap_remove_mapping __P((pmap_t, vm_offset_t, pt_entry_t *, int)); 263 boolean_t pmap_testbit __P((vm_offset_t, int)); 264 void pmap_changebit __P((vm_offset_t, int, boolean_t)); 265 void pmap_enter_ptpage __P((pmap_t, vm_offset_t)); 266 #ifdef DEBUG 267 void pmap_pvdump __P((vm_offset_t)); 268 void pmap_check_wiring __P((char *, vm_offset_t)); 269 #endif 270 271 /* pmap_remove_mapping flags */ 272 #define PRM_TFLUSH 1 273 #define PRM_CFLUSH 2 274 275 /* 276 * Bootstrap memory allocator. This function allows for early dynamic 277 * memory allocation until the virtual memory system has been bootstrapped. 278 * After that point, either kmem_alloc or malloc should be used. This 279 * function works by stealing pages from the (to be) managed page pool, 280 * stealing virtual address space, then mapping the pages and zeroing them. 281 * 282 * It should be used from pmap_bootstrap till vm_page_startup, afterwards 283 * it cannot be used, and will generate a panic if tried. Note that this 284 * memory will never be freed, and in essence it is wired down. 285 */ 286 void * 287 pmap_bootstrap_alloc(size) { 288 vm_offset_t val; 289 int i; 290 extern boolean_t vm_page_startup_initialized; 291 292 if (vm_page_startup_initialized) 293 panic("pmap_bootstrap_alloc: called after startup initialized"); 294 size = round_page(size); 295 val = virtual_avail; 296 297 virtual_avail = pmap_map(virtual_avail, avail_start, 298 avail_start + size, VM_PROT_READ|VM_PROT_WRITE); 299 avail_start += size; 300 301 blkclr ((caddr_t) val, size); 302 return ((void *) val); 303 } 304 305 /* 306 * Initialize the pmap module. 307 * Called by vm_init, to initialize any structures that the pmap 308 * system needs to map virtual memory. 309 */ 310 void 311 pmap_init(phys_start, phys_end) 312 vm_offset_t phys_start, phys_end; 313 { 314 vm_offset_t addr, addr2; 315 vm_size_t npg, s; 316 int rv; 317 extern char kstack[]; 318 319 #ifdef DEBUG 320 if (pmapdebug & PDB_FOLLOW) 321 printf("pmap_init(%x, %x)\n", phys_start, phys_end); 322 #endif 323 /* 324 * Now that kernel map has been allocated, we can mark as 325 * unavailable regions which we have mapped in locore. 326 */ 327 addr = (vm_offset_t) Sysmap; 328 vm_object_reference(kernel_object); 329 (void) vm_map_find(kernel_map, kernel_object, addr, 330 &addr, LUNA_MAX_PTSIZE, FALSE); 331 /* 332 * If this fails it is probably because the static portion of 333 * the kernel page table isn't big enough and we overran the 334 * page table map. Need to adjust pmap_size() in luna_init.c. 335 */ 336 if (addr != (vm_offset_t)Sysmap) 337 goto bogons; 338 339 addr = (vm_offset_t) kstack; 340 vm_object_reference(kernel_object); 341 (void) vm_map_find(kernel_map, kernel_object, addr, 342 &addr, luna_ptob(UPAGES), FALSE); 343 if (addr != (vm_offset_t)kstack) 344 bogons: 345 panic("pmap_init: bogons in the VM system!\n"); 346 347 #ifdef DEBUG 348 if (pmapdebug & PDB_INIT) { 349 printf("pmap_init: Sysseg %x, Sysmap %x, Sysptmap %x\n", 350 Sysseg, Sysmap, Sysptmap); 351 printf(" pstart %x, pend %x, vstart %x, vend %x\n", 352 avail_start, avail_end, virtual_avail, virtual_end); 353 } 354 #endif 355 356 /* 357 * Allocate memory for random pmap data structures. Includes the 358 * initial segment table, pv_head_table and pmap_attributes. 359 */ 360 npg = atop(phys_end - phys_start); 361 s = (vm_size_t) (LUNA_STSIZE + sizeof(struct pv_entry) * npg + npg); 362 s = round_page(s); 363 addr = (vm_offset_t) kmem_alloc(kernel_map, s); 364 Segtabzero = (st_entry_t *) addr; 365 Segtabzeropa = (st_entry_t *) pmap_extract(kernel_pmap, addr); 366 addr += LUNA_STSIZE; 367 pv_table = (pv_entry_t) addr; 368 addr += sizeof(struct pv_entry) * npg; 369 pmap_attributes = (char *) addr; 370 #ifdef DEBUG 371 if (pmapdebug & PDB_INIT) 372 printf("pmap_init: %x bytes: npg %x s0 %x(%x) tbl %x atr %x\n", 373 s, npg, Segtabzero, Segtabzeropa, 374 pv_table, pmap_attributes); 375 #endif 376 377 /* 378 * Allocate physical memory for kernel PT pages and their management. 379 * We need 1 PT page per possible task plus some slop. 380 */ 381 npg = min(atop(LUNA_MAX_KPTSIZE), maxproc+16); 382 s = ptoa(npg) + round_page(npg * sizeof(struct kpt_page)); 383 384 /* 385 * Verify that space will be allocated in region for which 386 * we already have kernel PT pages. 387 */ 388 addr = 0; 389 rv = vm_map_find(kernel_map, NULL, 0, &addr, s, TRUE); 390 if (rv != KERN_SUCCESS || addr + s >= (vm_offset_t)Sysmap) 391 panic("pmap_init: kernel PT too small"); 392 vm_map_remove(kernel_map, addr, addr + s); 393 394 /* 395 * Now allocate the space and link the pages together to 396 * form the KPT free list. 397 */ 398 addr = (vm_offset_t) kmem_alloc(kernel_map, s); 399 s = ptoa(npg); 400 addr2 = addr + s; 401 kpt_pages = &((struct kpt_page *)addr2)[npg]; 402 kpt_free_list = (struct kpt_page *) 0; 403 do { 404 addr2 -= LUNA_PAGE_SIZE; 405 (--kpt_pages)->kpt_next = kpt_free_list; 406 kpt_free_list = kpt_pages; 407 kpt_pages->kpt_va = addr2; 408 kpt_pages->kpt_pa = pmap_extract(kernel_pmap, addr2); 409 } while (addr != addr2); 410 #ifdef PMAPSTATS 411 kpt_stats.kpttotal = atop(s); 412 #endif 413 #ifdef DEBUG 414 if (pmapdebug & PDB_INIT) 415 printf("pmap_init: KPT: %d pages from %x to %x\n", 416 atop(s), addr, addr + s); 417 #endif 418 419 /* 420 * Slightly modified version of kmem_suballoc() to get page table 421 * map where we want it. 422 */ 423 addr = LUNA_PTBASE; 424 s = min(LUNA_PTMAXSIZE, maxproc*LUNA_MAX_PTSIZE); 425 addr2 = addr + s; 426 rv = vm_map_find(kernel_map, NULL, 0, &addr, s, TRUE); 427 if (rv != KERN_SUCCESS) 428 panic("pmap_init: cannot allocate space for PT map"); 429 pmap_reference(vm_map_pmap(kernel_map)); 430 pt_map = vm_map_create(vm_map_pmap(kernel_map), addr, addr2, TRUE); 431 if (pt_map == NULL) 432 panic("pmap_init: cannot create pt_map"); 433 rv = vm_map_submap(kernel_map, addr, addr2, pt_map); 434 if (rv != KERN_SUCCESS) 435 panic("pmap_init: cannot map range to pt_map"); 436 #ifdef DEBUG 437 if (pmapdebug & PDB_INIT) 438 printf("pmap_init: pt_map [%x - %x)\n", addr, addr2); 439 #endif 440 441 #if defined(LUNA2) 442 if (mmutype == MMU_68040) { 443 protostfree = ~l2tobm(0); 444 for (rv = MAXUL2SIZE; rv < sizeof(protostfree)*NBBY; rv++) 445 protostfree &= ~l2tobm(rv); 446 } 447 #endif 448 449 /* 450 * Now it is safe to enable pv_table recording. 451 */ 452 vm_first_phys = phys_start; 453 vm_last_phys = phys_end; 454 pmap_initialized = TRUE; 455 } 456 457 /* 458 * Used to map a range of physical addresses into kernel 459 * virtual address space. 460 * 461 * For now, VM is already on, we only need to map the 462 * specified memory. 463 */ 464 vm_offset_t 465 pmap_map(virt, start, end, prot) 466 vm_offset_t virt; 467 vm_offset_t start; 468 vm_offset_t end; 469 int prot; 470 { 471 #ifdef DEBUG 472 if (pmapdebug & PDB_FOLLOW) 473 printf("pmap_map(%x, %x, %x, %x)\n", virt, start, end, prot); 474 #endif 475 while (start < end) { 476 pmap_enter(kernel_pmap, virt, start, prot, FALSE); 477 virt += PAGE_SIZE; 478 start += PAGE_SIZE; 479 } 480 return(virt); 481 } 482 483 /* 484 * Create and return a physical map. 485 * 486 * If the size specified for the map 487 * is zero, the map is an actual physical 488 * map, and may be referenced by the 489 * hardware. 490 * 491 * If the size specified is non-zero, 492 * the map will be used in software only, and 493 * is bounded by that size. 494 */ 495 pmap_t 496 pmap_create(size) 497 vm_size_t size; 498 { 499 register pmap_t pmap; 500 501 #ifdef DEBUG 502 if (pmapdebug & (PDB_FOLLOW|PDB_CREATE)) 503 printf("pmap_create(%x)\n", size); 504 #endif 505 /* 506 * Software use map does not need a pmap 507 */ 508 if (size) 509 return(NULL); 510 511 /* XXX: is it ok to wait here? */ 512 pmap = (pmap_t) malloc(sizeof *pmap, M_VMPMAP, M_WAITOK); 513 #ifdef notifwewait 514 if (pmap == NULL) 515 panic("pmap_create: cannot allocate a pmap"); 516 #endif 517 bzero(pmap, sizeof(*pmap)); 518 pmap_pinit(pmap); 519 return (pmap); 520 } 521 522 /* 523 * Initialize a preallocated and zeroed pmap structure, 524 * such as one in a vmspace structure. 525 */ 526 void 527 pmap_pinit(pmap) 528 register struct pmap *pmap; 529 { 530 531 #ifdef DEBUG 532 if (pmapdebug & (PDB_FOLLOW|PDB_CREATE)) 533 printf("pmap_pinit(%x)\n", pmap); 534 #endif 535 /* 536 * No need to allocate page table space yet but we do need a 537 * valid segment table. Initially, we point everyone at the 538 * "null" segment table. On the first pmap_enter, a real 539 * segment table will be allocated. 540 */ 541 pmap->pm_stab = Segtabzero; 542 pmap->pm_stpa = Segtabzeropa; 543 #if defined(LUNA2) 544 if (mmutype == MMU_68040) 545 pmap->pm_stfree = protostfree; 546 #endif 547 pmap->pm_stchanged = TRUE; 548 pmap->pm_count = 1; 549 simple_lock_init(&pmap->pm_lock); 550 } 551 552 /* 553 * Retire the given physical map from service. 554 * Should only be called if the map contains 555 * no valid mappings. 556 */ 557 void 558 pmap_destroy(pmap) 559 register pmap_t pmap; 560 { 561 int count; 562 563 #ifdef DEBUG 564 if (pmapdebug & PDB_FOLLOW) 565 printf("pmap_destroy(%x)\n", pmap); 566 #endif 567 if (pmap == NULL) 568 return; 569 570 simple_lock(&pmap->pm_lock); 571 count = --pmap->pm_count; 572 simple_unlock(&pmap->pm_lock); 573 if (count == 0) { 574 pmap_release(pmap); 575 free((caddr_t)pmap, M_VMPMAP); 576 } 577 } 578 579 /* 580 * Release any resources held by the given physical map. 581 * Called when a pmap initialized by pmap_pinit is being released. 582 * Should only be called if the map contains no valid mappings. 583 */ 584 void 585 pmap_release(pmap) 586 register struct pmap *pmap; 587 { 588 589 #ifdef DEBUG 590 if (pmapdebug & PDB_FOLLOW) 591 printf("pmap_release(%x)\n", pmap); 592 #endif 593 #ifdef notdef /* DIAGNOSTIC */ 594 /* count would be 0 from pmap_destroy... */ 595 simple_lock(&pmap->pm_lock); 596 if (pmap->pm_count != 1) 597 panic("pmap_release count"); 598 #endif 599 if (pmap->pm_ptab) 600 kmem_free_wakeup(pt_map, (vm_offset_t)pmap->pm_ptab, 601 LUNA_MAX_PTSIZE); 602 if (pmap->pm_stab != Segtabzero) 603 kmem_free(kernel_map, (vm_offset_t)pmap->pm_stab, LUNA_STSIZE); 604 } 605 606 /* 607 * Add a reference to the specified pmap. 608 */ 609 void 610 pmap_reference(pmap) 611 pmap_t pmap; 612 { 613 #ifdef DEBUG 614 if (pmapdebug & PDB_FOLLOW) 615 printf("pmap_reference(%x)\n", pmap); 616 #endif 617 if (pmap != NULL) { 618 simple_lock(&pmap->pm_lock); 619 pmap->pm_count++; 620 simple_unlock(&pmap->pm_lock); 621 } 622 } 623 624 /* 625 * Remove the given range of addresses from the specified map. 626 * 627 * It is assumed that the start and end are properly 628 * rounded to the page size. 629 */ 630 void 631 pmap_remove(pmap, sva, eva) 632 register pmap_t pmap; 633 register vm_offset_t sva, eva; 634 { 635 register vm_offset_t nssva; 636 register pt_entry_t *pte; 637 boolean_t firstpage, needcflush; 638 int flags; 639 640 #ifdef DEBUG 641 if (pmapdebug & (PDB_FOLLOW|PDB_REMOVE|PDB_PROTECT)) 642 printf("pmap_remove(%x, %x, %x)\n", pmap, sva, eva); 643 #endif 644 645 if (pmap == NULL) 646 return; 647 648 #ifdef PMAPSTATS 649 remove_stats.calls++; 650 #endif 651 firstpage = TRUE; 652 needcflush = FALSE; 653 flags = active_pmap(pmap) ? PRM_TFLUSH : 0; 654 while (sva < eva) { 655 nssva = luna_trunc_seg(sva) + LUNA_SEG_SIZE; 656 if (nssva == 0 || nssva > eva) 657 nssva = eva; 658 /* 659 * If VA belongs to an unallocated segment, 660 * skip to the next segment boundary. 661 */ 662 if (!pmap_ste_v(pmap, sva)) { 663 sva = nssva; 664 continue; 665 } 666 /* 667 * Invalidate every valid mapping within this segment. 668 */ 669 pte = pmap_pte(pmap, sva); 670 while (sva < nssva) { 671 if (pmap_pte_v(pte)) { 672 #ifdef HAVEVAC 673 if (pmap_aliasmask) { 674 /* 675 * Purge kernel side of VAC to ensure 676 * we get the correct state of any 677 * hardware maintained bits. 678 */ 679 if (firstpage) { 680 DCIS(); 681 #ifdef PMAPSTATS 682 remove_stats.sflushes++; 683 #endif 684 } 685 /* 686 * Remember if we may need to 687 * flush the VAC due to a non-CI 688 * mapping. 689 */ 690 if (!needcflush && !pmap_pte_ci(pte)) 691 needcflush = TRUE; 692 693 } 694 #endif 695 pmap_remove_mapping(pmap, sva, pte, flags); 696 firstpage = FALSE; 697 } 698 pte++; 699 sva += PAGE_SIZE; 700 } 701 } 702 /* 703 * Didn't do anything, no need for cache flushes 704 */ 705 if (firstpage) 706 return; 707 #ifdef HAVEVAC 708 /* 709 * In a couple of cases, we don't need to worry about flushing 710 * the VAC: 711 * 1. if this is a kernel mapping, 712 * we have already done it 713 * 2. if it is a user mapping not for the current process, 714 * it won't be there 715 */ 716 if (pmap_aliasmask && 717 (pmap == kernel_pmap || pmap != curproc->p_vmspace->vm_map.pmap)) 718 needcflush = FALSE; 719 #ifdef DEBUG 720 if (pmap_aliasmask && (pmapvacflush & PVF_REMOVE)) { 721 if (pmapvacflush & PVF_TOTAL) 722 DCIA(); 723 else if (pmap == kernel_pmap) 724 DCIS(); 725 else 726 DCIU(); 727 } else 728 #endif 729 if (needcflush) { 730 if (pmap == kernel_pmap) { 731 DCIS(); 732 #ifdef PMAPSTATS 733 remove_stats.sflushes++; 734 #endif 735 } else { 736 DCIU(); 737 #ifdef PMAPSTATS 738 remove_stats.uflushes++; 739 #endif 740 } 741 } 742 #endif 743 } 744 745 /* 746 * pmap_page_protect: 747 * 748 * Lower the permission for all mappings to a given page. 749 */ 750 void 751 pmap_page_protect(pa, prot) 752 vm_offset_t pa; 753 vm_prot_t prot; 754 { 755 register pv_entry_t pv; 756 int s; 757 758 #ifdef DEBUG 759 if ((pmapdebug & (PDB_FOLLOW|PDB_PROTECT)) || 760 prot == VM_PROT_NONE && (pmapdebug & PDB_REMOVE)) 761 printf("pmap_page_protect(%x, %x)\n", pa, prot); 762 #endif 763 if (pa < vm_first_phys || pa >= vm_last_phys) 764 return; 765 766 switch (prot) { 767 case VM_PROT_READ|VM_PROT_WRITE: 768 case VM_PROT_ALL: 769 break; 770 /* copy_on_write */ 771 case VM_PROT_READ: 772 case VM_PROT_READ|VM_PROT_EXECUTE: 773 pmap_changebit(pa, PG_RO, TRUE); 774 break; 775 /* remove_all */ 776 default: 777 pv = pa_to_pvh(pa); 778 s = splimp(); 779 while (pv->pv_pmap != NULL) { 780 #ifdef DEBUG 781 if (!pmap_ste_v(pv->pv_pmap, pv->pv_va) || 782 pmap_pte_pa(pmap_pte(pv->pv_pmap,pv->pv_va)) != pa) 783 panic("pmap_page_protect: bad mapping"); 784 #endif 785 pmap_remove_mapping(pv->pv_pmap, pv->pv_va, 786 PT_ENTRY_NULL, 787 PRM_TFLUSH|PRM_CFLUSH); 788 } 789 splx(s); 790 break; 791 } 792 } 793 794 /* 795 * Set the physical protection on the 796 * specified range of this map as requested. 797 */ 798 void 799 pmap_protect(pmap, sva, eva, prot) 800 register pmap_t pmap; 801 register vm_offset_t sva, eva; 802 vm_prot_t prot; 803 { 804 register vm_offset_t nssva; 805 register pt_entry_t *pte; 806 boolean_t firstpage, needtflush; 807 int isro; 808 809 #ifdef DEBUG 810 if (pmapdebug & (PDB_FOLLOW|PDB_PROTECT)) 811 printf("pmap_protect(%x, %x, %x, %x)\n", pmap, sva, eva, prot); 812 #endif 813 814 if (pmap == NULL) 815 return; 816 817 #ifdef PMAPSTATS 818 protect_stats.calls++; 819 #endif 820 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 821 pmap_remove(pmap, sva, eva); 822 return; 823 } 824 if (prot & VM_PROT_WRITE) 825 return; 826 827 isro = pte_prot(pmap, prot); 828 needtflush = active_pmap(pmap); 829 firstpage = TRUE; 830 while (sva < eva) { 831 nssva = luna_trunc_seg(sva) + LUNA_SEG_SIZE; 832 if (nssva == 0 || nssva > eva) 833 nssva = eva; 834 /* 835 * If VA belongs to an unallocated segment, 836 * skip to the next segment boundary. 837 */ 838 if (!pmap_ste_v(pmap, sva)) { 839 sva = nssva; 840 continue; 841 } 842 /* 843 * Change protection on mapping if it is valid and doesn't 844 * already have the correct protection. 845 */ 846 pte = pmap_pte(pmap, sva); 847 while (sva < nssva) { 848 if (pmap_pte_v(pte) && pmap_pte_prot_chg(pte, isro)) { 849 #ifdef HAVEVAC 850 /* 851 * Purge kernel side of VAC to ensure we 852 * get the correct state of any hardware 853 * maintained bits. 854 * 855 * XXX do we need to clear the VAC in 856 * general to reflect the new protection? 857 */ 858 if (firstpage && pmap_aliasmask) 859 DCIS(); 860 #endif 861 #if defined(LUNA2) 862 /* 863 * Clear caches if making RO (see section 864 * "7.3 Cache Coherency" in the manual). 865 */ 866 if (isro && mmutype == MMU_68040) { 867 vm_offset_t pa = pmap_pte_pa(pte); 868 869 DCFP(pa); 870 ICPP(pa); 871 } 872 #endif 873 pmap_pte_set_prot(pte, isro); 874 if (needtflush) 875 TBIS(sva); 876 #ifdef PMAPSTATS 877 protect_stats.changed++; 878 #endif 879 firstpage = FALSE; 880 } 881 #ifdef PMAPSTATS 882 else if (pmap_pte_v(pte)) { 883 if (isro) 884 protect_stats.alreadyro++; 885 else 886 protect_stats.alreadyrw++; 887 } 888 #endif 889 pte++; 890 sva += PAGE_SIZE; 891 } 892 } 893 #if defined(HAVEVAC) && defined(DEBUG) 894 if (pmap_aliasmask && (pmapvacflush & PVF_PROTECT)) { 895 if (pmapvacflush & PVF_TOTAL) 896 DCIA(); 897 else if (pmap == kernel_pmap) 898 DCIS(); 899 else 900 DCIU(); 901 } 902 #endif 903 } 904 905 /* 906 * Insert the given physical page (p) at 907 * the specified virtual address (v) in the 908 * target physical map with the protection requested. 909 * 910 * If specified, the page will be wired down, meaning 911 * that the related pte can not be reclaimed. 912 * 913 * NB: This is the only routine which MAY NOT lazy-evaluate 914 * or lose information. That is, this routine must actually 915 * insert this page into the given map NOW. 916 */ 917 void 918 pmap_enter(pmap, va, pa, prot, wired) 919 register pmap_t pmap; 920 vm_offset_t va; 921 register vm_offset_t pa; 922 vm_prot_t prot; 923 boolean_t wired; 924 { 925 register pt_entry_t *pte; 926 register int npte; 927 vm_offset_t opa; 928 boolean_t cacheable = TRUE; 929 boolean_t checkpv = TRUE; 930 931 #ifdef DEBUG 932 if (pmapdebug & (PDB_FOLLOW|PDB_ENTER)) 933 printf("pmap_enter(%x, %x, %x, %x, %x)\n", 934 pmap, va, pa, prot, wired); 935 #endif 936 if (pmap == NULL) 937 return; 938 939 #ifdef PMAPSTATS 940 if (pmap == kernel_pmap) 941 enter_stats.kernel++; 942 else 943 enter_stats.user++; 944 #endif 945 /* 946 * For user mapping, allocate kernel VM resources if necessary. 947 */ 948 if (pmap->pm_ptab == NULL) 949 pmap->pm_ptab = (pt_entry_t *) 950 kmem_alloc_wait(pt_map, LUNA_MAX_PTSIZE); 951 952 /* 953 * Segment table entry not valid, we need a new PT page 954 */ 955 if (!pmap_ste_v(pmap, va)) 956 pmap_enter_ptpage(pmap, va); 957 958 pa = luna_trunc_page(pa); 959 pte = pmap_pte(pmap, va); 960 opa = pmap_pte_pa(pte); 961 #ifdef DEBUG 962 if (pmapdebug & PDB_ENTER) 963 printf("enter: pte %x, *pte %x\n", pte, *(int *)pte); 964 #endif 965 966 /* 967 * Mapping has not changed, must be protection or wiring change. 968 */ 969 if (opa == pa) { 970 #ifdef PMAPSTATS 971 enter_stats.pwchange++; 972 #endif 973 /* 974 * Wiring change, just update stats. 975 * We don't worry about wiring PT pages as they remain 976 * resident as long as there are valid mappings in them. 977 * Hence, if a user page is wired, the PT page will be also. 978 */ 979 if (pmap_pte_w_chg(pte, wired ? PG_W : 0)) { 980 #ifdef DEBUG 981 if (pmapdebug & PDB_ENTER) 982 printf("enter: wiring change -> %x\n", wired); 983 #endif 984 if (wired) 985 pmap->pm_stats.wired_count++; 986 else 987 pmap->pm_stats.wired_count--; 988 #ifdef PMAPSTATS 989 if (pmap_pte_prot(pte) == pte_prot(pmap, prot)) 990 enter_stats.wchange++; 991 #endif 992 } 993 #ifdef PMAPSTATS 994 else if (pmap_pte_prot(pte) != pte_prot(pmap, prot)) 995 enter_stats.pchange++; 996 else 997 enter_stats.nochange++; 998 #endif 999 /* 1000 * Retain cache inhibition status 1001 */ 1002 checkpv = FALSE; 1003 if (pmap_pte_ci(pte)) 1004 cacheable = FALSE; 1005 goto validate; 1006 } 1007 1008 /* 1009 * Mapping has changed, invalidate old range and fall through to 1010 * handle validating new mapping. 1011 */ 1012 if (opa) { 1013 #ifdef DEBUG 1014 if (pmapdebug & PDB_ENTER) 1015 printf("enter: removing old mapping %x\n", va); 1016 #endif 1017 pmap_remove_mapping(pmap, va, pte, PRM_TFLUSH|PRM_CFLUSH); 1018 #ifdef PMAPSTATS 1019 enter_stats.mchange++; 1020 #endif 1021 } 1022 1023 /* 1024 * If this is a new user mapping, increment the wiring count 1025 * on this PT page. PT pages are wired down as long as there 1026 * is a valid mapping in the page. 1027 */ 1028 if (pmap != kernel_pmap) 1029 (void) vm_map_pageable(pt_map, trunc_page(pte), 1030 round_page(pte+1), FALSE); 1031 1032 /* 1033 * Enter on the PV list if part of our managed memory 1034 * Note that we raise IPL while manipulating pv_table 1035 * since pmap_enter can be called at interrupt time. 1036 */ 1037 if (pa >= vm_first_phys && pa < vm_last_phys) { 1038 register pv_entry_t pv, npv; 1039 int s; 1040 1041 #ifdef PMAPSTATS 1042 enter_stats.managed++; 1043 #endif 1044 pv = pa_to_pvh(pa); 1045 s = splimp(); 1046 #ifdef DEBUG 1047 if (pmapdebug & PDB_ENTER) 1048 printf("enter: pv at %x: %x/%x/%x\n", 1049 pv, pv->pv_va, pv->pv_pmap, pv->pv_next); 1050 #endif 1051 /* 1052 * No entries yet, use header as the first entry 1053 */ 1054 if (pv->pv_pmap == NULL) { 1055 #ifdef PMAPSTATS 1056 enter_stats.firstpv++; 1057 #endif 1058 pv->pv_va = va; 1059 pv->pv_pmap = pmap; 1060 pv->pv_next = NULL; 1061 pv->pv_ptste = NULL; 1062 pv->pv_ptpmap = NULL; 1063 pv->pv_flags = 0; 1064 } 1065 /* 1066 * There is at least one other VA mapping this page. 1067 * Place this entry after the header. 1068 */ 1069 else { 1070 #ifdef DEBUG 1071 for (npv = pv; npv; npv = npv->pv_next) 1072 if (pmap == npv->pv_pmap && va == npv->pv_va) 1073 panic("pmap_enter: already in pv_tab"); 1074 #endif 1075 npv = (pv_entry_t) 1076 malloc(sizeof *npv, M_VMPVENT, M_NOWAIT); 1077 npv->pv_va = va; 1078 npv->pv_pmap = pmap; 1079 npv->pv_next = pv->pv_next; 1080 npv->pv_ptste = NULL; 1081 npv->pv_ptpmap = NULL; 1082 npv->pv_flags = 0; 1083 pv->pv_next = npv; 1084 #ifdef PMAPSTATS 1085 if (!npv->pv_next) 1086 enter_stats.secondpv++; 1087 #endif 1088 #ifdef HAVEVAC 1089 /* 1090 * Since there is another logical mapping for the 1091 * same page we may need to cache-inhibit the 1092 * descriptors on those CPUs with external VACs. 1093 * We don't need to CI if: 1094 * 1095 * - No two mappings belong to the same user pmaps. 1096 * Since the cache is flushed on context switches 1097 * there is no problem between user processes. 1098 * 1099 * - Mappings within a single pmap are a certain 1100 * magic distance apart. VAs at these appropriate 1101 * boundaries map to the same cache entries or 1102 * otherwise don't conflict. 1103 * 1104 * To keep it simple, we only check for these special 1105 * cases if there are only two mappings, otherwise we 1106 * punt and always CI. 1107 * 1108 * Note that there are no aliasing problems with the 1109 * on-chip data-cache when the WA bit is set. 1110 */ 1111 if (pmap_aliasmask) { 1112 if (pv->pv_flags & PV_CI) { 1113 #ifdef DEBUG 1114 if (pmapdebug & PDB_CACHE) 1115 printf("enter: pa %x already CI'ed\n", 1116 pa); 1117 #endif 1118 checkpv = cacheable = FALSE; 1119 } else if (npv->pv_next || 1120 ((pmap == pv->pv_pmap || 1121 pmap == kernel_pmap || 1122 pv->pv_pmap == kernel_pmap) && 1123 ((pv->pv_va & pmap_aliasmask) != 1124 (va & pmap_aliasmask)))) { 1125 #ifdef DEBUG 1126 if (pmapdebug & PDB_CACHE) 1127 printf("enter: pa %x CI'ing all\n", 1128 pa); 1129 #endif 1130 cacheable = FALSE; 1131 pv->pv_flags |= PV_CI; 1132 #ifdef PMAPSTATS 1133 enter_stats.ci++; 1134 #endif 1135 } 1136 } 1137 #endif 1138 } 1139 splx(s); 1140 } 1141 /* 1142 * Assumption: if it is not part of our managed memory 1143 * then it must be device memory which may be volitile. 1144 */ 1145 else if (pmap_initialized) { 1146 checkpv = cacheable = FALSE; 1147 #ifdef PMAPSTATS 1148 enter_stats.unmanaged++; 1149 #endif 1150 } 1151 1152 /* 1153 * Increment counters 1154 */ 1155 pmap->pm_stats.resident_count++; 1156 if (wired) 1157 pmap->pm_stats.wired_count++; 1158 1159 validate: 1160 #ifdef HAVEVAC 1161 /* 1162 * Purge kernel side of VAC to ensure we get correct state 1163 * of HW bits so we don't clobber them. 1164 */ 1165 if (pmap_aliasmask) 1166 DCIS(); 1167 #endif 1168 /* 1169 * Build the new PTE. 1170 */ 1171 npte = pa | pte_prot(pmap, prot) | (*(int *)pte & (PG_M|PG_U)) | PG_V; 1172 if (wired) 1173 npte |= PG_W; 1174 if (!checkpv && !cacheable) 1175 npte |= PG_CI; 1176 #if defined(LUNA2) 1177 if (mmutype == MMU_68040 && (npte & (PG_PROT|PG_CI)) == PG_RW) 1178 #ifdef DEBUG 1179 if (dowriteback && (dokwriteback || pmap != kernel_pmap)) 1180 #endif 1181 npte |= PG_CCB; 1182 #endif 1183 #ifdef DEBUG 1184 if (pmapdebug & PDB_ENTER) 1185 printf("enter: new pte value %x\n", npte); 1186 #endif 1187 /* 1188 * Remember if this was a wiring-only change. 1189 * If so, we need not flush the TLB and caches. 1190 */ 1191 wired = ((*(int *)pte ^ npte) == PG_W); 1192 #if defined(LUNA2) 1193 if (mmutype == MMU_68040 && !wired) { 1194 DCFP(pa); 1195 ICPP(pa); 1196 } 1197 #endif 1198 *(int *)pte = npte; 1199 if (!wired && active_pmap(pmap)) 1200 TBIS(va); 1201 #ifdef HAVEVAC 1202 /* 1203 * The following is executed if we are entering a second 1204 * (or greater) mapping for a physical page and the mappings 1205 * may create an aliasing problem. In this case we must 1206 * cache inhibit the descriptors involved and flush any 1207 * external VAC. 1208 */ 1209 if (checkpv && !cacheable) { 1210 pmap_changebit(pa, PG_CI, TRUE); 1211 DCIA(); 1212 #ifdef PMAPSTATS 1213 enter_stats.flushes++; 1214 #endif 1215 #ifdef DEBUG 1216 if ((pmapdebug & (PDB_CACHE|PDB_PVDUMP)) == 1217 (PDB_CACHE|PDB_PVDUMP)) 1218 pmap_pvdump(pa); 1219 #endif 1220 } 1221 #ifdef DEBUG 1222 else if (pmapvacflush & PVF_ENTER) { 1223 if (pmapvacflush & PVF_TOTAL) 1224 DCIA(); 1225 else if (pmap == kernel_pmap) 1226 DCIS(); 1227 else 1228 DCIU(); 1229 } 1230 #endif 1231 #endif 1232 #ifdef DEBUG 1233 if ((pmapdebug & PDB_WIRING) && pmap != kernel_pmap) 1234 pmap_check_wiring("enter", trunc_page(pmap_pte(pmap, va))); 1235 #endif 1236 } 1237 1238 /* 1239 * Routine: pmap_change_wiring 1240 * Function: Change the wiring attribute for a map/virtual-address 1241 * pair. 1242 * In/out conditions: 1243 * The mapping must already exist in the pmap. 1244 */ 1245 void 1246 pmap_change_wiring(pmap, va, wired) 1247 register pmap_t pmap; 1248 vm_offset_t va; 1249 boolean_t wired; 1250 { 1251 register pt_entry_t *pte; 1252 1253 #ifdef DEBUG 1254 if (pmapdebug & PDB_FOLLOW) 1255 printf("pmap_change_wiring(%x, %x, %x)\n", pmap, va, wired); 1256 #endif 1257 if (pmap == NULL) 1258 return; 1259 1260 pte = pmap_pte(pmap, va); 1261 #ifdef DEBUG 1262 /* 1263 * Page table page is not allocated. 1264 * Should this ever happen? Ignore it for now, 1265 * we don't want to force allocation of unnecessary PTE pages. 1266 */ 1267 if (!pmap_ste_v(pmap, va)) { 1268 if (pmapdebug & PDB_PARANOIA) 1269 printf("pmap_change_wiring: invalid STE for %x\n", va); 1270 return; 1271 } 1272 /* 1273 * Page not valid. Should this ever happen? 1274 * Just continue and change wiring anyway. 1275 */ 1276 if (!pmap_pte_v(pte)) { 1277 if (pmapdebug & PDB_PARANOIA) 1278 printf("pmap_change_wiring: invalid PTE for %x\n", va); 1279 } 1280 #endif 1281 /* 1282 * If wiring actually changed (always?) set the wire bit and 1283 * update the wire count. Note that wiring is not a hardware 1284 * characteristic so there is no need to invalidate the TLB. 1285 */ 1286 if (pmap_pte_w_chg(pte, wired ? PG_W : 0)) { 1287 pmap_pte_set_w(pte, wired); 1288 if (wired) 1289 pmap->pm_stats.wired_count++; 1290 else 1291 pmap->pm_stats.wired_count--; 1292 } 1293 } 1294 1295 /* 1296 * Routine: pmap_extract 1297 * Function: 1298 * Extract the physical page address associated 1299 * with the given map/virtual_address pair. 1300 */ 1301 1302 vm_offset_t 1303 pmap_extract(pmap, va) 1304 register pmap_t pmap; 1305 vm_offset_t va; 1306 { 1307 register vm_offset_t pa; 1308 1309 #ifdef DEBUG 1310 if (pmapdebug & PDB_FOLLOW) 1311 printf("pmap_extract(%x, %x) -> ", pmap, va); 1312 #endif 1313 pa = 0; 1314 if (pmap && pmap_ste_v(pmap, va)) 1315 pa = *(int *)pmap_pte(pmap, va); 1316 if (pa) 1317 pa = (pa & PG_FRAME) | (va & ~PG_FRAME); 1318 #ifdef DEBUG 1319 if (pmapdebug & PDB_FOLLOW) 1320 printf("%x\n", pa); 1321 #endif 1322 return(pa); 1323 } 1324 1325 /* 1326 * Copy the range specified by src_addr/len 1327 * from the source map to the range dst_addr/len 1328 * in the destination map. 1329 * 1330 * This routine is only advisory and need not do anything. 1331 */ 1332 void pmap_copy(dst_pmap, src_pmap, dst_addr, len, src_addr) 1333 pmap_t dst_pmap; 1334 pmap_t src_pmap; 1335 vm_offset_t dst_addr; 1336 vm_size_t len; 1337 vm_offset_t src_addr; 1338 { 1339 #ifdef DEBUG 1340 if (pmapdebug & PDB_FOLLOW) 1341 printf("pmap_copy(%x, %x, %x, %x, %x)\n", 1342 dst_pmap, src_pmap, dst_addr, len, src_addr); 1343 #endif 1344 } 1345 1346 /* 1347 * Require that all active physical maps contain no 1348 * incorrect entries NOW. [This update includes 1349 * forcing updates of any address map caching.] 1350 * 1351 * Generally used to insure that a thread about 1352 * to run will see a semantically correct world. 1353 */ 1354 void pmap_update() 1355 { 1356 #ifdef DEBUG 1357 if (pmapdebug & PDB_FOLLOW) 1358 printf("pmap_update()\n"); 1359 #endif 1360 TBIA(); 1361 } 1362 1363 /* 1364 * Routine: pmap_collect 1365 * Function: 1366 * Garbage collects the physical map system for 1367 * pages which are no longer used. 1368 * Success need not be guaranteed -- that is, there 1369 * may well be pages which are not referenced, but 1370 * others may be collected. 1371 * Usage: 1372 * Called by the pageout daemon when pages are scarce. 1373 */ 1374 void 1375 pmap_collect(pmap) 1376 pmap_t pmap; 1377 { 1378 register vm_offset_t pa; 1379 register pv_entry_t pv; 1380 register int *pte; 1381 vm_offset_t kpa; 1382 int s; 1383 1384 #ifdef DEBUG 1385 int *ste; 1386 int opmapdebug; 1387 #endif 1388 if (pmap != kernel_pmap) 1389 return; 1390 1391 #ifdef DEBUG 1392 if (pmapdebug & PDB_FOLLOW) 1393 printf("pmap_collect(%x)\n", pmap); 1394 #endif 1395 #ifdef PMAPSTATS 1396 kpt_stats.collectscans++; 1397 #endif 1398 s = splimp(); 1399 for (pa = vm_first_phys; pa < vm_last_phys; pa += PAGE_SIZE) { 1400 register struct kpt_page *kpt, **pkpt; 1401 1402 /* 1403 * Locate physical pages which are being used as kernel 1404 * page table pages. 1405 */ 1406 pv = pa_to_pvh(pa); 1407 if (pv->pv_pmap != kernel_pmap || !(pv->pv_flags & PV_PTPAGE)) 1408 continue; 1409 do { 1410 if (pv->pv_ptste && pv->pv_ptpmap == kernel_pmap) 1411 break; 1412 } while (pv = pv->pv_next); 1413 if (pv == NULL) 1414 continue; 1415 #ifdef DEBUG 1416 if (pv->pv_va < (vm_offset_t)Sysmap || 1417 pv->pv_va >= (vm_offset_t)Sysmap + LUNA_MAX_PTSIZE) 1418 printf("collect: kernel PT VA out of range\n"); 1419 else 1420 goto ok; 1421 pmap_pvdump(pa); 1422 continue; 1423 ok: 1424 #endif 1425 pte = (int *)(pv->pv_va + LUNA_PAGE_SIZE); 1426 while (--pte >= (int *)pv->pv_va && *pte == PG_NV) 1427 ; 1428 if (pte >= (int *)pv->pv_va) 1429 continue; 1430 1431 #ifdef DEBUG 1432 if (pmapdebug & (PDB_PTPAGE|PDB_COLLECT)) { 1433 printf("collect: freeing KPT page at %x (ste %x@%x)\n", 1434 pv->pv_va, *(int *)pv->pv_ptste, pv->pv_ptste); 1435 opmapdebug = pmapdebug; 1436 pmapdebug |= PDB_PTPAGE; 1437 } 1438 1439 ste = (int *)pv->pv_ptste; 1440 #endif 1441 /* 1442 * If all entries were invalid we can remove the page. 1443 * We call pmap_remove_entry to take care of invalidating 1444 * ST and Sysptmap entries. 1445 */ 1446 kpa = pmap_extract(pmap, pv->pv_va); 1447 pmap_remove_mapping(pmap, pv->pv_va, PT_ENTRY_NULL, 1448 PRM_TFLUSH|PRM_CFLUSH); 1449 /* 1450 * Use the physical address to locate the original 1451 * (kmem_alloc assigned) address for the page and put 1452 * that page back on the free list. 1453 */ 1454 for (pkpt = &kpt_used_list, kpt = *pkpt; 1455 kpt != (struct kpt_page *)0; 1456 pkpt = &kpt->kpt_next, kpt = *pkpt) 1457 if (kpt->kpt_pa == kpa) 1458 break; 1459 #ifdef DEBUG 1460 if (kpt == (struct kpt_page *)0) 1461 panic("pmap_collect: lost a KPT page"); 1462 if (pmapdebug & (PDB_PTPAGE|PDB_COLLECT)) 1463 printf("collect: %x (%x) to free list\n", 1464 kpt->kpt_va, kpa); 1465 #endif 1466 *pkpt = kpt->kpt_next; 1467 kpt->kpt_next = kpt_free_list; 1468 kpt_free_list = kpt; 1469 #ifdef PMAPSTATS 1470 kpt_stats.kptinuse--; 1471 kpt_stats.collectpages++; 1472 #endif 1473 #ifdef DEBUG 1474 if (pmapdebug & (PDB_PTPAGE|PDB_COLLECT)) 1475 pmapdebug = opmapdebug; 1476 1477 if (*ste) 1478 printf("collect: kernel STE at %x still valid (%x)\n", 1479 ste, *ste); 1480 ste = (int *)&Sysptmap[(st_entry_t *)ste-pmap_ste(kernel_pmap, 0)]; 1481 if (*ste) 1482 printf("collect: kernel PTmap at %x still valid (%x)\n", 1483 ste, *ste); 1484 #endif 1485 } 1486 splx(s); 1487 } 1488 1489 void 1490 pmap_activate(pmap, pcbp) 1491 register pmap_t pmap; 1492 struct pcb *pcbp; 1493 { 1494 #ifdef DEBUG 1495 if (pmapdebug & (PDB_FOLLOW|PDB_SEGTAB)) 1496 printf("pmap_activate(%x, %x)\n", pmap, pcbp); 1497 #endif 1498 PMAP_ACTIVATE(pmap, pcbp, pmap == curproc->p_vmspace->vm_map.pmap); 1499 } 1500 1501 /* 1502 * pmap_zero_page zeros the specified (machine independent) 1503 * page by mapping the page into virtual memory and using 1504 * bzero to clear its contents, one machine dependent page 1505 * at a time. 1506 * 1507 * XXX this is a bad implementation for virtual cache machines 1508 * (320/350) because pmap_enter doesn't cache-inhibit the temporary 1509 * kernel mapping and we wind up with data cached for that KVA. 1510 * It is probably a win for physical cache machines (370/380) 1511 * as the cache loading is not wasted. 1512 */ 1513 void 1514 pmap_zero_page(phys) 1515 vm_offset_t phys; 1516 { 1517 register vm_offset_t kva; 1518 extern caddr_t CADDR1; 1519 1520 #ifdef DEBUG 1521 if (pmapdebug & PDB_FOLLOW) 1522 printf("pmap_zero_page(%x)\n", phys); 1523 #endif 1524 kva = (vm_offset_t) CADDR1; 1525 pmap_enter(kernel_pmap, kva, phys, VM_PROT_READ|VM_PROT_WRITE, TRUE); 1526 bzero((caddr_t)kva, LUNA_PAGE_SIZE); 1527 pmap_remove_mapping(kernel_pmap, kva, PT_ENTRY_NULL, 1528 PRM_TFLUSH|PRM_CFLUSH); 1529 } 1530 1531 /* 1532 * pmap_copy_page copies the specified (machine independent) 1533 * page by mapping the page into virtual memory and using 1534 * bcopy to copy the page, one machine dependent page at a 1535 * time. 1536 * 1537 * 1538 * XXX this is a bad implementation for virtual cache machines 1539 * (320/350) because pmap_enter doesn't cache-inhibit the temporary 1540 * kernel mapping and we wind up with data cached for that KVA. 1541 * It is probably a win for physical cache machines (370/380) 1542 * as the cache loading is not wasted. 1543 */ 1544 void 1545 pmap_copy_page(src, dst) 1546 vm_offset_t src, dst; 1547 { 1548 register vm_offset_t skva, dkva; 1549 extern caddr_t CADDR1, CADDR2; 1550 1551 #ifdef DEBUG 1552 if (pmapdebug & PDB_FOLLOW) 1553 printf("pmap_copy_page(%x, %x)\n", src, dst); 1554 #endif 1555 skva = (vm_offset_t) CADDR1; 1556 dkva = (vm_offset_t) CADDR2; 1557 pmap_enter(kernel_pmap, skva, src, VM_PROT_READ, TRUE); 1558 pmap_enter(kernel_pmap, dkva, dst, VM_PROT_READ|VM_PROT_WRITE, TRUE); 1559 bcopy((caddr_t)skva, (caddr_t)dkva, PAGE_SIZE); 1560 /* CADDR1 and CADDR2 are virtually contiguous */ 1561 pmap_remove(kernel_pmap, skva, skva+2*PAGE_SIZE); 1562 } 1563 1564 /* 1565 * Routine: pmap_pageable 1566 * Function: 1567 * Make the specified pages (by pmap, offset) 1568 * pageable (or not) as requested. 1569 * 1570 * A page which is not pageable may not take 1571 * a fault; therefore, its page table entry 1572 * must remain valid for the duration. 1573 * 1574 * This routine is merely advisory; pmap_enter 1575 * will specify that these pages are to be wired 1576 * down (or not) as appropriate. 1577 */ 1578 void 1579 pmap_pageable(pmap, sva, eva, pageable) 1580 pmap_t pmap; 1581 vm_offset_t sva, eva; 1582 boolean_t pageable; 1583 { 1584 #ifdef DEBUG 1585 if (pmapdebug & PDB_FOLLOW) 1586 printf("pmap_pageable(%x, %x, %x, %x)\n", 1587 pmap, sva, eva, pageable); 1588 #endif 1589 /* 1590 * If we are making a PT page pageable then all valid 1591 * mappings must be gone from that page. Hence it should 1592 * be all zeros and there is no need to clean it. 1593 * Assumptions: 1594 * - we are called with only one page at a time 1595 * - PT pages have only one pv_table entry 1596 */ 1597 if (pmap == kernel_pmap && pageable && sva + PAGE_SIZE == eva) { 1598 register pv_entry_t pv; 1599 register vm_offset_t pa; 1600 1601 #ifdef DEBUG 1602 if ((pmapdebug & (PDB_FOLLOW|PDB_PTPAGE)) == PDB_PTPAGE) 1603 printf("pmap_pageable(%x, %x, %x, %x)\n", 1604 pmap, sva, eva, pageable); 1605 #endif 1606 if (!pmap_ste_v(pmap, sva)) 1607 return; 1608 pa = pmap_pte_pa(pmap_pte(pmap, sva)); 1609 if (pa < vm_first_phys || pa >= vm_last_phys) 1610 return; 1611 pv = pa_to_pvh(pa); 1612 if (pv->pv_ptste == NULL) 1613 return; 1614 #ifdef DEBUG 1615 if (pv->pv_va != sva || pv->pv_next) { 1616 printf("pmap_pageable: bad PT page va %x next %x\n", 1617 pv->pv_va, pv->pv_next); 1618 return; 1619 } 1620 #endif 1621 /* 1622 * Mark it unmodified to avoid pageout 1623 */ 1624 pmap_changebit(pa, PG_M, FALSE); 1625 #ifdef DEBUG 1626 if (pmapdebug & PDB_PTPAGE) 1627 printf("pmap_pageable: PT page %x(%x) unmodified\n", 1628 sva, *(int *)pmap_pte(pmap, sva)); 1629 if (pmapdebug & PDB_WIRING) 1630 pmap_check_wiring("pageable", sva); 1631 #endif 1632 } 1633 } 1634 1635 /* 1636 * Clear the modify bits on the specified physical page. 1637 */ 1638 1639 void 1640 pmap_clear_modify(pa) 1641 vm_offset_t pa; 1642 { 1643 #ifdef DEBUG 1644 if (pmapdebug & PDB_FOLLOW) 1645 printf("pmap_clear_modify(%x)\n", pa); 1646 #endif 1647 pmap_changebit(pa, PG_M, FALSE); 1648 } 1649 1650 /* 1651 * pmap_clear_reference: 1652 * 1653 * Clear the reference bit on the specified physical page. 1654 */ 1655 1656 void pmap_clear_reference(pa) 1657 vm_offset_t pa; 1658 { 1659 #ifdef DEBUG 1660 if (pmapdebug & PDB_FOLLOW) 1661 printf("pmap_clear_reference(%x)\n", pa); 1662 #endif 1663 pmap_changebit(pa, PG_U, FALSE); 1664 } 1665 1666 /* 1667 * pmap_is_referenced: 1668 * 1669 * Return whether or not the specified physical page is referenced 1670 * by any physical maps. 1671 */ 1672 1673 boolean_t 1674 pmap_is_referenced(pa) 1675 vm_offset_t pa; 1676 { 1677 #ifdef DEBUG 1678 if (pmapdebug & PDB_FOLLOW) { 1679 boolean_t rv = pmap_testbit(pa, PG_U); 1680 printf("pmap_is_referenced(%x) -> %c\n", pa, "FT"[rv]); 1681 return(rv); 1682 } 1683 #endif 1684 return(pmap_testbit(pa, PG_U)); 1685 } 1686 1687 /* 1688 * pmap_is_modified: 1689 * 1690 * Return whether or not the specified physical page is modified 1691 * by any physical maps. 1692 */ 1693 1694 boolean_t 1695 pmap_is_modified(pa) 1696 vm_offset_t pa; 1697 { 1698 #ifdef DEBUG 1699 if (pmapdebug & PDB_FOLLOW) { 1700 boolean_t rv = pmap_testbit(pa, PG_M); 1701 printf("pmap_is_modified(%x) -> %c\n", pa, "FT"[rv]); 1702 return(rv); 1703 } 1704 #endif 1705 return(pmap_testbit(pa, PG_M)); 1706 } 1707 1708 vm_offset_t 1709 pmap_phys_address(ppn) 1710 int ppn; 1711 { 1712 return(luna_ptob(ppn)); 1713 } 1714 1715 /* 1716 * Miscellaneous support routines follow 1717 */ 1718 1719 /* 1720 * Invalidate a single page denoted by pmap/va. 1721 * If (pte != NULL), it is the already computed PTE for the page. 1722 * If (flags & PRM_TFLUSH), we must invalidate any TLB information. 1723 * If (flags & PRM_CFLUSH), we must flush/invalidate any cache information. 1724 */ 1725 /* static */ 1726 void 1727 pmap_remove_mapping(pmap, va, pte, flags) 1728 register pmap_t pmap; 1729 register vm_offset_t va; 1730 register pt_entry_t *pte; 1731 int flags; 1732 { 1733 register vm_offset_t pa; 1734 register pv_entry_t pv, npv; 1735 pmap_t ptpmap; 1736 int *ste, s, bits; 1737 #ifdef DEBUG 1738 pt_entry_t opte; 1739 1740 if (pmapdebug & (PDB_FOLLOW|PDB_REMOVE|PDB_PROTECT)) 1741 printf("pmap_remove_mapping(%x, %x, %x, %x)\n", 1742 pmap, va, pte, flags); 1743 #endif 1744 1745 /* 1746 * PTE not provided, compute it from pmap and va. 1747 */ 1748 if (pte == PT_ENTRY_NULL) { 1749 pte = pmap_pte(pmap, va); 1750 if (*(int *)pte == PG_NV) 1751 return; 1752 } 1753 #ifdef HAVEVAC 1754 if (pmap_aliasmask && (flags & PRM_CFLUSH)) { 1755 /* 1756 * Purge kernel side of VAC to ensure we get the correct 1757 * state of any hardware maintained bits. 1758 */ 1759 DCIS(); 1760 #ifdef PMAPSTATS 1761 remove_stats.sflushes++; 1762 #endif 1763 /* 1764 * If this is a non-CI user mapping for the current process, 1765 * flush the VAC. Note that the kernel side was flushed 1766 * above so we don't worry about non-CI kernel mappings. 1767 */ 1768 if (pmap == curproc->p_vmspace->vm_map.pmap && 1769 !pmap_pte_ci(pte)) { 1770 DCIU(); 1771 #ifdef PMAPSTATS 1772 remove_stats.uflushes++; 1773 #endif 1774 } 1775 } 1776 #endif 1777 pa = pmap_pte_pa(pte); 1778 #ifdef DEBUG 1779 opte = *pte; 1780 #endif 1781 #ifdef PMAPSTATS 1782 remove_stats.removes++; 1783 #endif 1784 /* 1785 * Update statistics 1786 */ 1787 if (pmap_pte_w(pte)) 1788 pmap->pm_stats.wired_count--; 1789 pmap->pm_stats.resident_count--; 1790 1791 /* 1792 * Invalidate the PTE after saving the reference modify info. 1793 */ 1794 #ifdef DEBUG 1795 if (pmapdebug & PDB_REMOVE) 1796 printf("remove: invalidating pte at %x\n", pte); 1797 #endif 1798 bits = *(int *)pte & (PG_U|PG_M); 1799 *(int *)pte = PG_NV; 1800 if ((flags & PRM_TFLUSH) && active_pmap(pmap)) 1801 TBIS(va); 1802 /* 1803 * For user mappings decrement the wiring count on 1804 * the PT page. We do this after the PTE has been 1805 * invalidated because vm_map_pageable winds up in 1806 * pmap_pageable which clears the modify bit for the 1807 * PT page. 1808 */ 1809 if (pmap != kernel_pmap) { 1810 (void) vm_map_pageable(pt_map, trunc_page(pte), 1811 round_page(pte+1), TRUE); 1812 #ifdef DEBUG 1813 if (pmapdebug & PDB_WIRING) 1814 pmap_check_wiring("remove", trunc_page(pte)); 1815 #endif 1816 } 1817 /* 1818 * If this isn't a managed page, we are all done. 1819 */ 1820 if (pa < vm_first_phys || pa >= vm_last_phys) 1821 return; 1822 /* 1823 * Otherwise remove it from the PV table 1824 * (raise IPL since we may be called at interrupt time). 1825 */ 1826 pv = pa_to_pvh(pa); 1827 ste = (int *)0; 1828 s = splimp(); 1829 /* 1830 * If it is the first entry on the list, it is actually 1831 * in the header and we must copy the following entry up 1832 * to the header. Otherwise we must search the list for 1833 * the entry. In either case we free the now unused entry. 1834 */ 1835 if (pmap == pv->pv_pmap && va == pv->pv_va) { 1836 ste = (int *)pv->pv_ptste; 1837 ptpmap = pv->pv_ptpmap; 1838 npv = pv->pv_next; 1839 if (npv) { 1840 npv->pv_flags = pv->pv_flags; 1841 *pv = *npv; 1842 free((caddr_t)npv, M_VMPVENT); 1843 } else 1844 pv->pv_pmap = NULL; 1845 #ifdef PMAPSTATS 1846 remove_stats.pvfirst++; 1847 #endif 1848 } else { 1849 for (npv = pv->pv_next; npv; npv = npv->pv_next) { 1850 #ifdef PMAPSTATS 1851 remove_stats.pvsearch++; 1852 #endif 1853 if (pmap == npv->pv_pmap && va == npv->pv_va) 1854 break; 1855 pv = npv; 1856 } 1857 #ifdef DEBUG 1858 if (npv == NULL) 1859 panic("pmap_remove: PA not in pv_tab"); 1860 #endif 1861 ste = (int *)npv->pv_ptste; 1862 ptpmap = npv->pv_ptpmap; 1863 pv->pv_next = npv->pv_next; 1864 free((caddr_t)npv, M_VMPVENT); 1865 pv = pa_to_pvh(pa); 1866 } 1867 #ifdef HAVEVAC 1868 /* 1869 * If only one mapping left we no longer need to cache inhibit 1870 */ 1871 if (pmap_aliasmask && 1872 pv->pv_pmap && pv->pv_next == NULL && (pv->pv_flags & PV_CI)) { 1873 #ifdef DEBUG 1874 if (pmapdebug & PDB_CACHE) 1875 printf("remove: clearing CI for pa %x\n", pa); 1876 #endif 1877 pv->pv_flags &= ~PV_CI; 1878 pmap_changebit(pa, PG_CI, FALSE); 1879 #ifdef DEBUG 1880 if ((pmapdebug & (PDB_CACHE|PDB_PVDUMP)) == 1881 (PDB_CACHE|PDB_PVDUMP)) 1882 pmap_pvdump(pa); 1883 #endif 1884 } 1885 #endif 1886 /* 1887 * If this was a PT page we must also remove the 1888 * mapping from the associated segment table. 1889 */ 1890 if (ste) { 1891 #ifdef PMAPSTATS 1892 remove_stats.ptinvalid++; 1893 #endif 1894 #ifdef DEBUG 1895 if (pmapdebug & (PDB_REMOVE|PDB_PTPAGE)) 1896 printf("remove: ste was %x@%x pte was %x@%x\n", 1897 *ste, ste, *(int *)&opte, pmap_pte(pmap, va)); 1898 #endif 1899 #if defined(LUNA2) 1900 if (mmutype == MMU_68040) { 1901 int *este = &ste[NPTEPG/SG4_LEV3SIZE]; 1902 1903 while (ste < este) 1904 *ste++ = SG_NV; 1905 #ifdef DEBUG 1906 ste -= NPTEPG/SG4_LEV3SIZE; 1907 #endif 1908 } else 1909 #endif 1910 *ste = SG_NV; 1911 /* 1912 * If it was a user PT page, we decrement the 1913 * reference count on the segment table as well, 1914 * freeing it if it is now empty. 1915 */ 1916 if (ptpmap != kernel_pmap) { 1917 #ifdef DEBUG 1918 if (pmapdebug & (PDB_REMOVE|PDB_SEGTAB)) 1919 printf("remove: stab %x, refcnt %d\n", 1920 ptpmap->pm_stab, ptpmap->pm_sref - 1); 1921 if ((pmapdebug & PDB_PARANOIA) && 1922 ptpmap->pm_stab != (st_entry_t *)trunc_page(ste)) 1923 panic("remove: bogus ste"); 1924 #endif 1925 if (--(ptpmap->pm_sref) == 0) { 1926 #ifdef DEBUG 1927 if (pmapdebug&(PDB_REMOVE|PDB_SEGTAB)) 1928 printf("remove: free stab %x\n", 1929 ptpmap->pm_stab); 1930 #endif 1931 kmem_free(kernel_map, 1932 (vm_offset_t)ptpmap->pm_stab, 1933 LUNA_STSIZE); 1934 ptpmap->pm_stab = Segtabzero; 1935 ptpmap->pm_stpa = Segtabzeropa; 1936 #if defined(LUNA2) 1937 if (mmutype == MMU_68040) 1938 ptpmap->pm_stfree = protostfree; 1939 #endif 1940 ptpmap->pm_stchanged = TRUE; 1941 /* 1942 * XXX may have changed segment table 1943 * pointer for current process so 1944 * update now to reload hardware. 1945 */ 1946 if (ptpmap == curproc->p_vmspace->vm_map.pmap) 1947 PMAP_ACTIVATE(ptpmap, 1948 (struct pcb *)curproc->p_addr, 1); 1949 } 1950 } 1951 #if 0 1952 /* 1953 * XXX this should be unnecessary as we have been 1954 * flushing individual mappings as we go. 1955 */ 1956 if (ptpmap == kernel_pmap) 1957 TBIAS(); 1958 else 1959 TBIAU(); 1960 #endif 1961 pv->pv_flags &= ~PV_PTPAGE; 1962 ptpmap->pm_ptpages--; 1963 } 1964 /* 1965 * Update saved attributes for managed page 1966 */ 1967 pmap_attributes[pa_index(pa)] |= bits; 1968 splx(s); 1969 } 1970 1971 /* static */ 1972 boolean_t 1973 pmap_testbit(pa, bit) 1974 register vm_offset_t pa; 1975 int bit; 1976 { 1977 register pv_entry_t pv; 1978 register int *pte; 1979 int s; 1980 1981 if (pa < vm_first_phys || pa >= vm_last_phys) 1982 return(FALSE); 1983 1984 pv = pa_to_pvh(pa); 1985 s = splimp(); 1986 /* 1987 * Check saved info first 1988 */ 1989 if (pmap_attributes[pa_index(pa)] & bit) { 1990 splx(s); 1991 return(TRUE); 1992 } 1993 #ifdef HAVEVAC 1994 /* 1995 * Flush VAC to get correct state of any hardware maintained bits. 1996 */ 1997 if (pmap_aliasmask && (bit & (PG_U|PG_M))) 1998 DCIS(); 1999 #endif 2000 /* 2001 * Not found, check current mappings returning 2002 * immediately if found. 2003 */ 2004 if (pv->pv_pmap != NULL) { 2005 for (; pv; pv = pv->pv_next) { 2006 pte = (int *) pmap_pte(pv->pv_pmap, pv->pv_va); 2007 if (*pte & bit) { 2008 splx(s); 2009 return(TRUE); 2010 } 2011 } 2012 } 2013 splx(s); 2014 return(FALSE); 2015 } 2016 2017 /* static */ 2018 void 2019 pmap_changebit(pa, bit, setem) 2020 register vm_offset_t pa; 2021 int bit; 2022 boolean_t setem; 2023 { 2024 register pv_entry_t pv; 2025 register int *pte, npte; 2026 vm_offset_t va; 2027 int s; 2028 boolean_t firstpage = TRUE; 2029 #ifdef PMAPSTATS 2030 struct chgstats *chgp; 2031 #endif 2032 2033 #ifdef DEBUG 2034 if (pmapdebug & PDB_BITS) 2035 printf("pmap_changebit(%x, %x, %s)\n", 2036 pa, bit, setem ? "set" : "clear"); 2037 #endif 2038 if (pa < vm_first_phys || pa >= vm_last_phys) 2039 return; 2040 2041 #ifdef PMAPSTATS 2042 chgp = &changebit_stats[(bit>>2)-1]; 2043 if (setem) 2044 chgp->setcalls++; 2045 else 2046 chgp->clrcalls++; 2047 #endif 2048 pv = pa_to_pvh(pa); 2049 s = splimp(); 2050 /* 2051 * Clear saved attributes (modify, reference) 2052 */ 2053 if (!setem) 2054 pmap_attributes[pa_index(pa)] &= ~bit; 2055 /* 2056 * Loop over all current mappings setting/clearing as appropos 2057 * If setting RO do we need to clear the VAC? 2058 */ 2059 if (pv->pv_pmap != NULL) { 2060 #ifdef DEBUG 2061 int toflush = 0; 2062 #endif 2063 for (; pv; pv = pv->pv_next) { 2064 #ifdef DEBUG 2065 toflush |= (pv->pv_pmap == kernel_pmap) ? 2 : 1; 2066 #endif 2067 va = pv->pv_va; 2068 2069 /* 2070 * XXX don't write protect pager mappings 2071 */ 2072 if (bit == PG_RO) { 2073 extern vm_offset_t pager_sva, pager_eva; 2074 2075 if (va >= pager_sva && va < pager_eva) 2076 continue; 2077 } 2078 2079 pte = (int *) pmap_pte(pv->pv_pmap, va); 2080 #ifdef HAVEVAC 2081 /* 2082 * Flush VAC to ensure we get correct state of HW bits 2083 * so we don't clobber them. 2084 */ 2085 if (firstpage && pmap_aliasmask) { 2086 firstpage = FALSE; 2087 DCIS(); 2088 } 2089 #endif 2090 if (setem) 2091 npte = *pte | bit; 2092 else 2093 npte = *pte & ~bit; 2094 if (*pte != npte) { 2095 #if defined(LUNA2) 2096 /* 2097 * If we are changing caching status or 2098 * protection make sure the caches are 2099 * flushed (but only once). 2100 */ 2101 if (firstpage && mmutype == MMU_68040 && 2102 (bit == PG_RO && setem || 2103 (bit & PG_CMASK))) { 2104 firstpage = FALSE; 2105 DCFP(pa); 2106 ICPP(pa); 2107 } 2108 #endif 2109 *pte = npte; 2110 if (active_pmap(pv->pv_pmap)) 2111 TBIS(va); 2112 #ifdef PMAPSTATS 2113 if (setem) 2114 chgp->sethits++; 2115 else 2116 chgp->clrhits++; 2117 #endif 2118 } 2119 #ifdef PMAPSTATS 2120 else { 2121 if (setem) 2122 chgp->setmiss++; 2123 else 2124 chgp->clrmiss++; 2125 } 2126 #endif 2127 } 2128 #if defined(HAVEVAC) && defined(DEBUG) 2129 if (setem && bit == PG_RO && (pmapvacflush & PVF_PROTECT)) { 2130 if ((pmapvacflush & PVF_TOTAL) || toflush == 3) 2131 DCIA(); 2132 else if (toflush == 2) 2133 DCIS(); 2134 else 2135 DCIU(); 2136 } 2137 #endif 2138 } 2139 splx(s); 2140 } 2141 2142 /* static */ 2143 void 2144 pmap_enter_ptpage(pmap, va) 2145 register pmap_t pmap; 2146 register vm_offset_t va; 2147 { 2148 register vm_offset_t ptpa; 2149 register pv_entry_t pv; 2150 st_entry_t *ste; 2151 int s; 2152 2153 #ifdef DEBUG 2154 if (pmapdebug & (PDB_FOLLOW|PDB_ENTER|PDB_PTPAGE)) 2155 printf("pmap_enter_ptpage: pmap %x, va %x\n", pmap, va); 2156 #endif 2157 #ifdef PMAPSTATS 2158 enter_stats.ptpneeded++; 2159 #endif 2160 /* 2161 * Allocate a segment table if necessary. Note that it is allocated 2162 * from kernel_map and not pt_map. This keeps user page tables 2163 * aligned on segment boundaries in the kernel address space. 2164 * The segment table is wired down. It will be freed whenever the 2165 * reference count drops to zero. 2166 */ 2167 if (pmap->pm_stab == Segtabzero) { 2168 pmap->pm_stab = (st_entry_t *) 2169 kmem_alloc(kernel_map, LUNA_STSIZE); 2170 pmap->pm_stpa = (st_entry_t *) 2171 pmap_extract(kernel_pmap, (vm_offset_t)pmap->pm_stab); 2172 #if defined(LUNA2) 2173 if (mmutype == MMU_68040) { 2174 #ifdef DEBUG 2175 if (dowriteback && dokwriteback) 2176 #endif 2177 pmap_changebit((vm_offset_t)pmap->pm_stab, PG_CCB, 0); 2178 pmap->pm_stfree = protostfree; 2179 } 2180 #endif 2181 pmap->pm_stchanged = TRUE; 2182 /* 2183 * XXX may have changed segment table pointer for current 2184 * process so update now to reload hardware. 2185 */ 2186 if (pmap == curproc->p_vmspace->vm_map.pmap) 2187 PMAP_ACTIVATE(pmap, (struct pcb *)curproc->p_addr, 1); 2188 #ifdef DEBUG 2189 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB)) 2190 printf("enter: pmap %x stab %x(%x)\n", 2191 pmap, pmap->pm_stab, pmap->pm_stpa); 2192 #endif 2193 } 2194 2195 ste = pmap_ste(pmap, va); 2196 #if defined(LUNA2) 2197 /* 2198 * Allocate level 2 descriptor block if necessary 2199 */ 2200 if (mmutype == MMU_68040) { 2201 if (!ste->sg_v) { 2202 int ix; 2203 caddr_t addr; 2204 2205 ix = bmtol2(pmap->pm_stfree); 2206 if (ix == -1) 2207 panic("enter: out of address space"); /* XXX */ 2208 pmap->pm_stfree &= ~l2tobm(ix); 2209 addr = (caddr_t)&pmap->pm_stab[ix*SG4_LEV2SIZE]; 2210 bzero(addr, SG4_LEV2SIZE*sizeof(st_entry_t)); 2211 addr = (caddr_t)&pmap->pm_stpa[ix*SG4_LEV2SIZE]; 2212 *(int *)ste = (u_int)addr | SG_RW | SG_U | SG_V; 2213 #ifdef DEBUG 2214 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB)) 2215 printf("enter: alloc ste2 %d(%x)\n", ix, addr); 2216 #endif 2217 } 2218 ste = pmap_ste2(pmap, va); 2219 /* 2220 * Since a level 2 descriptor maps a block of SG4_LEV3SIZE 2221 * level 3 descriptors, we need a chunk of NPTEPG/SG4_LEV3SIZE 2222 * (16) such descriptors (NBPG/SG4_LEV3SIZE bytes) to map a 2223 * PT page--the unit of allocation. We set `ste' to point 2224 * to the first entry of that chunk which is validated in its 2225 * entirety below. 2226 */ 2227 ste = (st_entry_t *)((int)ste & ~(NBPG/SG4_LEV3SIZE-1)); 2228 #ifdef DEBUG 2229 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB)) 2230 printf("enter: ste2 %x (%x)\n", 2231 pmap_ste2(pmap, va), ste); 2232 #endif 2233 } 2234 #endif 2235 va = trunc_page((vm_offset_t)pmap_pte(pmap, va)); 2236 2237 /* 2238 * In the kernel we allocate a page from the kernel PT page 2239 * free list and map it into the kernel page table map (via 2240 * pmap_enter). 2241 */ 2242 if (pmap == kernel_pmap) { 2243 register struct kpt_page *kpt; 2244 2245 s = splimp(); 2246 if ((kpt = kpt_free_list) == (struct kpt_page *)0) { 2247 /* 2248 * No PT pages available. 2249 * Try once to free up unused ones. 2250 */ 2251 #ifdef DEBUG 2252 if (pmapdebug & PDB_COLLECT) 2253 printf("enter: no KPT pages, collecting...\n"); 2254 #endif 2255 pmap_collect(kernel_pmap); 2256 if ((kpt = kpt_free_list) == (struct kpt_page *)0) 2257 panic("pmap_enter_ptpage: can't get KPT page"); 2258 } 2259 #ifdef PMAPSTATS 2260 if (++kpt_stats.kptinuse > kpt_stats.kptmaxuse) 2261 kpt_stats.kptmaxuse = kpt_stats.kptinuse; 2262 #endif 2263 kpt_free_list = kpt->kpt_next; 2264 kpt->kpt_next = kpt_used_list; 2265 kpt_used_list = kpt; 2266 ptpa = kpt->kpt_pa; 2267 bzero((caddr_t)kpt->kpt_va, LUNA_PAGE_SIZE); 2268 pmap_enter(pmap, va, ptpa, VM_PROT_DEFAULT, TRUE); 2269 #ifdef DEBUG 2270 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE)) { 2271 int ix = pmap_ste(pmap, va) - pmap_ste(pmap, 0); 2272 2273 printf("enter: add &Sysptmap[%d]: %x (KPT page %x)\n", 2274 ix, *(int *)&Sysptmap[ix], kpt->kpt_va); 2275 } 2276 #endif 2277 splx(s); 2278 } 2279 /* 2280 * For user processes we just simulate a fault on that location 2281 * letting the VM system allocate a zero-filled page. 2282 */ 2283 else { 2284 #ifdef DEBUG 2285 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE)) 2286 printf("enter: about to fault UPT pg at %x\n", va); 2287 #endif 2288 s = vm_fault(pt_map, va, VM_PROT_READ|VM_PROT_WRITE, FALSE); 2289 if (s != KERN_SUCCESS) { 2290 printf("vm_fault(pt_map, %x, RW, 0) -> %d\n", va, s); 2291 panic("pmap_enter: vm_fault failed"); 2292 } 2293 ptpa = pmap_extract(kernel_pmap, va); 2294 /* 2295 * Mark the page clean now to avoid its pageout (and 2296 * hence creation of a pager) between now and when it 2297 * is wired; i.e. while it is on a paging queue. 2298 */ 2299 PHYS_TO_VM_PAGE(ptpa)->flags |= PG_CLEAN; 2300 #ifdef DEBUG 2301 PHYS_TO_VM_PAGE(ptpa)->flags |= PG_PTPAGE; 2302 #endif 2303 } 2304 #if defined(LUNA2) 2305 /* 2306 * Turn off copyback caching of page table pages, 2307 * could get ugly otherwise. 2308 */ 2309 #ifdef DEBUG 2310 if (dowriteback && dokwriteback) 2311 #endif 2312 if (mmutype == MMU_68040) { 2313 int *pte = (int *)pmap_pte(kernel_pmap, va); 2314 #ifdef DEBUG 2315 if ((pmapdebug & PDB_PARANOIA) && (*pte & PG_CCB) == 0) 2316 printf("%s PT no CCB: kva=%x ptpa=%x pte@%x=%x\n", 2317 pmap == kernel_pmap ? "Kernel" : "User", 2318 va, ptpa, pte, *pte); 2319 #endif 2320 pmap_changebit(ptpa, PG_CCB, 0); 2321 } 2322 #endif 2323 /* 2324 * Locate the PV entry in the kernel for this PT page and 2325 * record the STE address. This is so that we can invalidate 2326 * the STE when we remove the mapping for the page. 2327 */ 2328 pv = pa_to_pvh(ptpa); 2329 s = splimp(); 2330 if (pv) { 2331 pv->pv_flags |= PV_PTPAGE; 2332 do { 2333 if (pv->pv_pmap == kernel_pmap && pv->pv_va == va) 2334 break; 2335 } while (pv = pv->pv_next); 2336 } 2337 #ifdef DEBUG 2338 if (pv == NULL) 2339 panic("pmap_enter_ptpage: PT page not entered"); 2340 #endif 2341 pv->pv_ptste = ste; 2342 pv->pv_ptpmap = pmap; 2343 #ifdef DEBUG 2344 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE)) 2345 printf("enter: new PT page at PA %x, ste at %x\n", ptpa, ste); 2346 #endif 2347 2348 /* 2349 * Map the new PT page into the segment table. 2350 * Also increment the reference count on the segment table if this 2351 * was a user page table page. Note that we don't use vm_map_pageable 2352 * to keep the count like we do for PT pages, this is mostly because 2353 * it would be difficult to identify ST pages in pmap_pageable to 2354 * release them. We also avoid the overhead of vm_map_pageable. 2355 */ 2356 #if defined(LUNA2) 2357 if (mmutype == MMU_68040) { 2358 st_entry_t *este; 2359 2360 for (este = &ste[NPTEPG/SG4_LEV3SIZE]; ste < este; ste++) { 2361 *(int *)ste = ptpa | SG_U | SG_RW | SG_V; 2362 ptpa += SG4_LEV3SIZE * sizeof(st_entry_t); 2363 } 2364 } else 2365 #endif 2366 *(int *)ste = (ptpa & SG_FRAME) | SG_RW | SG_V; 2367 if (pmap != kernel_pmap) { 2368 pmap->pm_sref++; 2369 #ifdef DEBUG 2370 if (pmapdebug & (PDB_ENTER|PDB_PTPAGE|PDB_SEGTAB)) 2371 printf("enter: stab %x refcnt %d\n", 2372 pmap->pm_stab, pmap->pm_sref); 2373 #endif 2374 } 2375 #if 0 2376 /* 2377 * Flush stale TLB info. 2378 */ 2379 if (pmap == kernel_pmap) 2380 TBIAS(); 2381 else 2382 TBIAU(); 2383 #endif 2384 pmap->pm_ptpages++; 2385 splx(s); 2386 } 2387 2388 #ifdef DEBUG 2389 /* static */ 2390 void 2391 pmap_pvdump(pa) 2392 vm_offset_t pa; 2393 { 2394 register pv_entry_t pv; 2395 2396 printf("pa %x", pa); 2397 for (pv = pa_to_pvh(pa); pv; pv = pv->pv_next) 2398 printf(" -> pmap %x, va %x, ptste %x, ptpmap %x, flags %x", 2399 pv->pv_pmap, pv->pv_va, pv->pv_ptste, pv->pv_ptpmap, 2400 pv->pv_flags); 2401 printf("\n"); 2402 } 2403 2404 /* static */ 2405 void 2406 pmap_check_wiring(str, va) 2407 char *str; 2408 vm_offset_t va; 2409 { 2410 vm_map_entry_t entry; 2411 register int count, *pte; 2412 2413 va = trunc_page(va); 2414 if (!pmap_ste_v(kernel_pmap, va) || 2415 !pmap_pte_v(pmap_pte(kernel_pmap, va))) 2416 return; 2417 2418 if (!vm_map_lookup_entry(pt_map, va, &entry)) { 2419 printf("wired_check: entry for %x not found\n", va); 2420 return; 2421 } 2422 count = 0; 2423 for (pte = (int *)va; pte < (int *)(va+PAGE_SIZE); pte++) 2424 if (*pte) 2425 count++; 2426 if (entry->wired_count != count) 2427 printf("*%s*: %x: w%d/a%d\n", 2428 str, va, entry->wired_count, count); 2429 } 2430 #endif 2431