1 /* 2 * Copyright (c) 1992 Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * Ralph Campbell. 7 * 8 * %sccs.include.redist.c% 9 * 10 * @(#)dc7085cons.h 7.2 (Berkeley) 02/29/92 11 * 12 * dc7085.h -- 13 * 14 * Definitions for the dc7085 chip. 15 * 16 * Copyright (C) 1989 Digital Equipment Corporation. 17 * Permission to use, copy, modify, and distribute this software and 18 * its documentation for any purpose and without fee is hereby granted, 19 * provided that the above copyright notice appears in all copies. 20 * Digital Equipment Corporation makes no representations about the 21 * suitability of this software for any purpose. It is provided "as is" 22 * without express or implied warranty. 23 * 24 * from: $Header: /sprite/src/kernel/dev/ds3100.md/RCS/dc7085.h, 25 * v 1.4 89/08/15 19:52:46 rab Exp $ SPRITE (DECWRL) 26 */ 27 28 #ifndef _DC7085 29 #define _DC7085 30 31 typedef volatile struct dc7085regs { 32 u_short dc_csr; /* control and status (R/W) */ 33 u_short pad0[3]; 34 short dc_rbuf_lpr; /* receiver data (R), line params (W) */ 35 u_short pad1[3]; 36 u_short dc_tcr; /* transmitter control (R/W) */ 37 u_short pad2[3]; 38 u_short dc_msr_tdr; /* modem status (R), transmit data (W) */ 39 } dcregs; 40 #define dc_rbuf dc_rbuf_lpr 41 #define dc_lpr dc_rbuf_lpr 42 #define dc_msr dc_msr_tdr 43 #define dc_tdr dc_msr_tdr 44 45 /* 46 * Control status register bits. 47 */ 48 #define CSR_TRDY 0x8000 49 #define CSR_TIE 0x4000 50 #define CSR_TX_LINE_NUM 0x0300 51 #define CSR_RDONE 0x0080 52 #define CSR_RIE 0x0040 53 #define CSR_MSE 0x0020 54 #define CSR_CLR 0x0010 55 #define CSR_MAINT 0x0008 56 57 /* 58 * Receiver buffer register bits. 59 */ 60 #define RBUF_DVAL 0x8000 61 #define RBUF_OERR 0x4000 62 #define RBUF_FERR 0x2000 63 #define RBUF_PERR 0x1000 64 #define RBUF_LINE_NUM 0x0300 65 #define RBUF_LINE_NUM_SHIFT 8 66 #define RBUF_CHAR 0x00FF 67 68 /* 69 * Transmit control register values. 70 */ 71 #define TCR_DTR2 0x400 72 #define TCR_EN3 0x008 73 #define TCR_EN2 0x004 74 #define TCR_EN1 0x002 75 #define TCR_EN0 0x001 76 77 #ifdef DS5000 78 #define TCR_RTS2 0x800 79 #define TCR_RTS3 0x200 80 #define TCR_DTR3 0x100 81 #endif 82 83 /* 84 * Line parameter register bits. 85 */ 86 #define LPR_RXENAB 0x1000 87 #define LPR_B50 0x0000 88 #define LPR_B75 0x0100 89 #define LPR_B110 0x0200 90 #define LPR_B134 0x0300 91 #define LPR_B150 0x0400 92 #define LPR_B300 0x0500 93 #define LPR_B600 0x0600 94 #define LPR_B1200 0x0700 95 #define LPR_B1800 0x0800 96 #define LPR_B2000 0x0900 97 #define LPR_B2400 0x0A00 98 #define LPR_B3600 0x0B00 99 #define LPR_B4800 0x0C00 100 #define LPR_B7200 0x0D00 101 #define LPR_B9600 0x0E00 102 #ifdef DS3100 103 #define LPR_B19800 0x0F00 104 #endif 105 #ifdef DS5000 106 #define LPR_B19200 0x0F00 107 #define LPR_B38400 0x0F00 108 #endif 109 #define LPR_OPAR 0x0080 110 #define LPR_PARENB 0x0040 111 #define LPR_2_STOP 0x0020 112 #define LPR_8_BIT_CHAR 0x0018 113 #define LPR_7_BIT_CHAR 0x0010 114 #define LPR_6_BIT_CHAR 0x0008 115 #define LPR_5_BIT_CHAR 0x0000 116 117 /* 118 * Modem status register bits. 119 */ 120 #define MSR_DSR2 0x0200 121 122 #ifdef DS5000 123 #define MSR_RI2 0x0800 124 #define MSR_CD2 0x0400 125 #define MSR_CTS2 0x0100 126 #define MSR_RI3 0x0008 127 #define MSR_CD3 0x0004 128 #define MSR_DSR3 0x0002 129 #define MSR_CTS3 0x0001 130 #endif 131 132 /* 133 * The four serial ports. 134 */ 135 #define KBD_PORT 0 136 #define MOUSE_PORT 1 137 #define MODEM_PORT 2 138 #define PRINTER_PORT 3 139 140 /* 141 * Special key values. 142 */ 143 #define KEY_SHIFT 0xae 144 #define KEY_CONTROL 0xaf 145 #define KEY_UP 0xb3 146 #define KEY_REPEAT 0xb4 147 #define KEY_F1 0x56 148 #define KEY_COMMAND KEY_F1 149 150 /* 151 * Lk201/301 keyboard 152 */ 153 #define LK_UPDOWN 0x86 /* bits for setting lk201 modes */ 154 #define LK_AUTODOWN 0x82 155 #define LK_DOWN 0x80 156 #define LK_DEFAULTS 0xd3 /* reset mode settings */ 157 #define LK_AR_ENABLE 0xe3 /* global auto repeat enable */ 158 #define LK_CL_ENABLE 0x1b /* keyclick enable */ 159 #define LK_KBD_ENABLE 0x8b /* keyboard enable */ 160 #define LK_BELL_ENABLE 0x23 /* the bell */ 161 #define LK_LED_ENABLE 0x13 /* light led */ 162 #define LK_LED_DISABLE 0x11 /* turn off led */ 163 #define LK_RING_BELL 0xa7 /* ring keyboard bell */ 164 #define LED_1 0x81 /* led bits */ 165 #define LED_2 0x82 166 #define LED_3 0x84 167 #define LED_4 0x88 168 #define LED_ALL 0x8f 169 #define LK_HELP 0x7c /* help key */ 170 #define LK_DO 0x7d /* do key */ 171 #define LK_KDOWN_ERROR 0x3d /* key down on powerup error */ 172 #define LK_POWER_ERROR 0x3e /* keyboard failure on pwrup tst*/ 173 #define LK_OUTPUT_ERROR 0xb5 /* keystrokes lost during inhbt */ 174 #define LK_INPUT_ERROR 0xb6 /* garbage command to keyboard */ 175 #define LK_LOWEST 0x56 /* lowest significant keycode */ 176 177 /* max volume is 0, lowest is 0x7 */ 178 #define LK_PARAM_VOLUME(v) (0x80|((v)&0x7)) 179 180 /* mode command details */ 181 #define LK_CMD_MODE(m,div) ((m)|((div)<<3)) 182 183 /* 184 * Command characters for the mouse. 185 */ 186 #define MOUSE_SELF_TEST 'T' 187 #define MOUSE_INCREMENTAL 'R' 188 189 /* 190 * Mouse output bits. 191 * 192 * MOUSE_START_FRAME Start of report frame bit. 193 * MOUSE_X_SIGN Sign bit for X. 194 * MOUSE_Y_SIGN Sign bit for Y. 195 * MOUSE_X_OFFSET X offset to start cursor at. 196 * MOUSE_Y_OFFSET Y offset to start cursor at. 197 */ 198 #define MOUSE_START_FRAME 0x80 199 #define MOUSE_X_SIGN 0x10 200 #define MOUSE_Y_SIGN 0x08 201 202 /* 203 * Definitions for mouse buttons 204 */ 205 #define EVENT_LEFT_BUTTON 0x01 206 #define EVENT_MIDDLE_BUTTON 0x02 207 #define EVENT_RIGHT_BUTTON 0x03 208 #define RIGHT_BUTTON 0x01 209 #define MIDDLE_BUTTON 0x02 210 #define LEFT_BUTTON 0x04 211 212 /* 213 * Mouse report structure definition 214 */ 215 typedef struct { 216 char state; /* buttons and sign bits */ 217 short dx; /* delta X since last change */ 218 short dy; /* delta Y since last change */ 219 char byteCount; /* mouse report byte count */ 220 } MouseReport; 221 222 /* bits in dm lsr, copied from dmreg.h */ 223 #define DML_DSR 0000400 /* data set ready, not a real DM bit */ 224 #define DML_RNG 0000200 /* ring */ 225 #define DML_CAR 0000100 /* carrier detect */ 226 #define DML_CTS 0000040 /* clear to send */ 227 #define DML_SR 0000020 /* secondary receive */ 228 #define DML_ST 0000010 /* secondary transmit */ 229 #define DML_RTS 0000004 /* request to send */ 230 #define DML_DTR 0000002 /* data terminal ready */ 231 #define DML_LE 0000001 /* line enable */ 232 233 #endif /* _DC7085 */ 234