xref: /original-bsd/sys/sparc/fpu/fpu_arith.h (revision 3705696b)
1 /*
2  * Copyright (c) 1992, 1993
3  *	The Regents of the University of California.  All rights reserved.
4  *
5  * This software was developed by the Computer Systems Engineering group
6  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
7  * contributed to Berkeley.
8  *
9  * All advertising materials mentioning features or use of this software
10  * must display the following acknowledgement:
11  *	This product includes software developed by the University of
12  *	California, Lawrence Berkeley Laboratory.
13  *
14  * %sccs.include.redist.c%
15  *
16  *	@(#)fpu_arith.h	8.1 (Berkeley) 06/11/93
17  *
18  * from: $Header: fpu_arith.h,v 1.3 92/11/26 01:30:50 torek Exp $
19  */
20 
21 /*
22  * Extended-precision arithmetic.
23  *
24  * We hold the notion of a `carry register', which may or may not be a
25  * machine carry bit or register.  On the SPARC, it is just the machine's
26  * carry bit.
27  *
28  * In the worst case, you can compute the carry from x+y as
29  *	(unsigned)(x + y) < (unsigned)x
30  * and from x+y+c as
31  *	((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0)
32  * for example.
33  */
34 
35 /* set up for extended-precision arithemtic */
36 #define	FPU_DECL_CARRY
37 
38 /*
39  * We have three kinds of add:
40  *	add with carry:					  r = x + y + c
41  *	add (ignoring current carry) and set carry:	c'r = x + y + 0
42  *	add with carry and set carry:			c'r = x + y + c
43  * The macros use `C' for `use carry' and `S' for `set carry'.
44  * Note that the state of the carry is undefined after ADDC and SUBC,
45  * so if all you have for these is `add with carry and set carry',
46  * that is OK.
47  *
48  * The same goes for subtract, except that we compute x - y - c.
49  *
50  * Finally, we have a way to get the carry into a `regular' variable,
51  * or set it from a value.  SET_CARRY turns 0 into no-carry, nonzero
52  * into carry; GET_CARRY sets its argument to 0 or 1.
53  */
54 #define	FPU_ADDC(r, x, y) \
55 	asm volatile("addx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
56 #define	FPU_ADDS(r, x, y) \
57 	asm volatile("addcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
58 #define	FPU_ADDCS(r, x, y) \
59 	asm volatile("addxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
60 #define	FPU_SUBC(r, x, y) \
61 	asm volatile("subx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
62 #define	FPU_SUBS(r, x, y) \
63 	asm volatile("subcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
64 #define	FPU_SUBCS(r, x, y) \
65 	asm volatile("subxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
66 
67 #define	FPU_GET_CARRY(r) asm volatile("addx %%g0,%%g0,%0" : "=r"(r))
68 #define	FPU_SET_CARRY(v) asm volatile("addcc %0,-1,%%g0" : : "r"(v))
69 
70 #define	FPU_SHL1_BY_ADD	/* shift left 1 faster by ADDC than (a<<1)|(b>>31) */
71