16b225d15Storek /* 2*d63d5158Sbostic * Copyright (c) 1992, 1993 3*d63d5158Sbostic * The Regents of the University of California. All rights reserved. 46b225d15Storek * 56b225d15Storek * This software was developed by the Computer Systems Engineering group 66b225d15Storek * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 76b225d15Storek * contributed to Berkeley. 86b225d15Storek * 9f91bc336Sbostic * All advertising materials mentioning features or use of this software 10f91bc336Sbostic * must display the following acknowledgement: 11f91bc336Sbostic * This product includes software developed by the University of 12f3e01519Storek * California, Lawrence Berkeley Laboratory. 13f91bc336Sbostic * 146b225d15Storek * %sccs.include.redist.c% 156b225d15Storek * 16*d63d5158Sbostic * @(#)fpu_emu.h 8.1 (Berkeley) 06/11/93 176b225d15Storek * 18f3e01519Storek * from: $Header: fpu_emu.h,v 1.3 92/11/26 01:30:54 torek Exp $ 196b225d15Storek */ 206b225d15Storek 216b225d15Storek /* 226b225d15Storek * Floating point emulator (tailored for SPARC, but structurally 236b225d15Storek * machine-independent). 246b225d15Storek * 256b225d15Storek * Floating point numbers are carried around internally in an `expanded' 266b225d15Storek * or `unpacked' form consisting of: 276b225d15Storek * - sign 286b225d15Storek * - unbiased exponent 296b225d15Storek * - mantissa (`1.' + 112-bit fraction + guard + round) 306b225d15Storek * - sticky bit 316b225d15Storek * Any implied `1' bit is inserted, giving a 113-bit mantissa that is 326b225d15Storek * always nonzero. Additional low-order `guard' and `round' bits are 336b225d15Storek * scrunched in, making the entire mantissa 115 bits long. This is divided 346b225d15Storek * into four 32-bit words, with `spare' bits left over in the upper part 356b225d15Storek * of the top word (the high bits of fp_mant[0]). An internal `exploded' 366b225d15Storek * number is thus kept within the half-open interval [1.0,2.0) (but see 376b225d15Storek * the `number classes' below). This holds even for denormalized numbers: 386b225d15Storek * when we explode an external denorm, we normalize it, introducing low-order 396b225d15Storek * zero bits, so that the rest of the code always sees normalized values. 406b225d15Storek * 416b225d15Storek * Note that a number of our algorithms use the `spare' bits at the top. 426b225d15Storek * The most demanding algorithm---the one for sqrt---depends on two such 436b225d15Storek * bits, so that it can represent values up to (but not including) 8.0, 446b225d15Storek * and then it needs a carry on top of that, so that we need three `spares'. 456b225d15Storek * 466b225d15Storek * The sticky-word is 32 bits so that we can use `OR' operators to goosh 476b225d15Storek * whole words from the mantissa into it. 486b225d15Storek * 496b225d15Storek * All operations are done in this internal extended precision. According 506b225d15Storek * to Hennesey & Patterson, Appendix A, rounding can be repeated---that is, 516b225d15Storek * it is OK to do a+b in extended precision and then round the result to 526b225d15Storek * single precision---provided single, double, and extended precisions are 536b225d15Storek * `far enough apart' (they always are), but we will try to avoid any such 546b225d15Storek * extra work where possible. 556b225d15Storek */ 566b225d15Storek struct fpn { 576b225d15Storek int fp_class; /* see below */ 586b225d15Storek int fp_sign; /* 0 => positive, 1 => negative */ 596b225d15Storek int fp_exp; /* exponent (unbiased) */ 606b225d15Storek int fp_sticky; /* nonzero bits lost at right end */ 616b225d15Storek u_int fp_mant[4]; /* 115-bit mantissa */ 626b225d15Storek }; 636b225d15Storek 646b225d15Storek #define FP_NMANT 115 /* total bits in mantissa (incl g,r) */ 656b225d15Storek #define FP_NG 2 /* number of low-order guard bits */ 666b225d15Storek #define FP_LG ((FP_NMANT - 1) & 31) /* log2(1.0) for fp_mant[0] */ 676b225d15Storek #define FP_QUIETBIT (1 << (FP_LG - 1)) /* Quiet bit in NaNs (0.5) */ 686b225d15Storek #define FP_1 (1 << FP_LG) /* 1.0 in fp_mant[0] */ 696b225d15Storek #define FP_2 (1 << (FP_LG + 1)) /* 2.0 in fp_mant[0] */ 706b225d15Storek 716b225d15Storek /* 726b225d15Storek * Number classes. Since zero, Inf, and NaN cannot be represented using 736b225d15Storek * the above layout, we distinguish these from other numbers via a class. 746b225d15Storek * In addition, to make computation easier and to follow Appendix N of 756b225d15Storek * the SPARC Version 8 standard, we give each kind of NaN a separate class. 766b225d15Storek */ 776b225d15Storek #define FPC_SNAN -2 /* signalling NaN (sign irrelevant) */ 786b225d15Storek #define FPC_QNAN -1 /* quiet NaN (sign irrelevant) */ 796b225d15Storek #define FPC_ZERO 0 /* zero (sign matters) */ 806b225d15Storek #define FPC_NUM 1 /* number (sign matters) */ 816b225d15Storek #define FPC_INF 2 /* infinity (sign matters) */ 826b225d15Storek 836b225d15Storek #define ISNAN(fp) ((fp)->fp_class < 0) 846b225d15Storek #define ISZERO(fp) ((fp)->fp_class == 0) 856b225d15Storek #define ISINF(fp) ((fp)->fp_class == FPC_INF) 866b225d15Storek 876b225d15Storek /* 886b225d15Storek * ORDER(x,y) `sorts' a pair of `fpn *'s so that the right operand (y) points 896b225d15Storek * to the `more significant' operand for our purposes. Appendix N says that 906b225d15Storek * the result of a computation involving two numbers are: 916b225d15Storek * 926b225d15Storek * If both are SNaN: operand 2, converted to Quiet 936b225d15Storek * If only one is SNaN: the SNaN operand, converted to Quiet 946b225d15Storek * If both are QNaN: operand 2 956b225d15Storek * If only one is QNaN: the QNaN operand 966b225d15Storek * 976b225d15Storek * In addition, in operations with an Inf operand, the result is usually 986b225d15Storek * Inf. The class numbers are carefully arranged so that if 996b225d15Storek * (unsigned)class(op1) > (unsigned)class(op2) 1006b225d15Storek * then op1 is the one we want; otherwise op2 is the one we want. 1016b225d15Storek */ 1026b225d15Storek #define ORDER(x, y) { \ 1036b225d15Storek if ((u_int)(x)->fp_class > (u_int)(y)->fp_class) \ 1046b225d15Storek SWAP(x, y); \ 1056b225d15Storek } 1066b225d15Storek #define SWAP(x, y) { \ 1076b225d15Storek register struct fpn *swap; \ 1086b225d15Storek swap = (x), (x) = (y), (y) = swap; \ 1096b225d15Storek } 1106b225d15Storek 1116b225d15Storek /* 1126b225d15Storek * Emulator state. 1136b225d15Storek */ 1146b225d15Storek struct fpemu { 1156b225d15Storek struct fpstate *fe_fpstate; /* registers, etc */ 1166b225d15Storek int fe_fsr; /* fsr copy (modified during op) */ 1176b225d15Storek int fe_cx; /* exceptions */ 1186b225d15Storek struct fpn fe_f1; /* operand 1 */ 1196b225d15Storek struct fpn fe_f2; /* operand 2, if required */ 1206b225d15Storek struct fpn fe_f3; /* available storage for result */ 1216b225d15Storek }; 1226b225d15Storek 1236b225d15Storek /* 1246b225d15Storek * Arithmetic functions. 1256b225d15Storek * Each of these may modify its inputs (f1,f2) and/or the temporary. 1266b225d15Storek * Each returns a pointer to the result and/or sets exceptions. 1276b225d15Storek */ 1286b225d15Storek struct fpn *fpu_add(struct fpemu *); 1296b225d15Storek #define fpu_sub(fe) ((fe)->fe_f2.fp_sign ^= 1, fpu_add(fe)) 1306b225d15Storek struct fpn *fpu_mul(struct fpemu *); 1316b225d15Storek struct fpn *fpu_div(struct fpemu *); 1326b225d15Storek struct fpn *fpu_sqrt(struct fpemu *); 1336b225d15Storek 1346b225d15Storek /* 1356b225d15Storek * Other functions. 1366b225d15Storek */ 1376b225d15Storek 1386b225d15Storek /* Perform a compare instruction (with or without unordered exception). */ 1396b225d15Storek void fpu_compare(struct fpemu *, int); 1406b225d15Storek 1416b225d15Storek /* Build a new Quiet NaN (sign=0, frac=all 1's). */ 1426b225d15Storek struct fpn *fpu_newnan(struct fpemu *); 1436b225d15Storek 1446b225d15Storek /* 1456b225d15Storek * Shift a number right some number of bits, taking care of round/sticky. 1466b225d15Storek * Note that the result is probably not a well-formed number (it will lack 1476b225d15Storek * the normal 1-bit mant[0]&FP_1). 1486b225d15Storek */ 1496b225d15Storek int fpu_shr(struct fpn *, int); 1506b225d15Storek 1516b225d15Storek /* Conversion to and from internal format -- note asymmetry. */ 1526b225d15Storek int fpu_itofpn(struct fpn *, u_int); 1536b225d15Storek int fpu_stofpn(struct fpn *, u_int); 1546b225d15Storek int fpu_dtofpn(struct fpn *, u_int, u_int); 1556b225d15Storek int fpu_xtofpn(struct fpn *, u_int, u_int, u_int, u_int); 1566b225d15Storek 1576b225d15Storek u_int fpu_fpntoi(struct fpemu *, struct fpn *); 1586b225d15Storek u_int fpu_fpntos(struct fpemu *, struct fpn *); 1596b225d15Storek u_int fpu_fpntod(struct fpemu *, struct fpn *); 1606b225d15Storek u_int fpu_fpntox(struct fpemu *, struct fpn *); 1616b225d15Storek 1626b225d15Storek void fpu_explode(struct fpemu *, struct fpn *, int, int); 1636b225d15Storek void fpu_implode(struct fpemu *, struct fpn *, int, u_int *); 164