1 /* 2 * Copyright (c) 1992, 1993 3 * The Regents of the University of California. All rights reserved. 4 * 5 * This software was developed by the Computer Systems Engineering group 6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 7 * contributed to Berkeley. 8 * 9 * All advertising materials mentioning features or use of this software 10 * must display the following acknowledgement: 11 * This product includes software developed by the University of 12 * California, Lawrence Berkeley Laboratory. 13 * 14 * %sccs.include.redist.c% 15 * 16 * @(#)fpu_subr.c 8.1 (Berkeley) 06/11/93 17 * 18 * from: $Header: fpu_subr.c,v 1.4 92/12/01 08:46:52 torek Exp $ 19 */ 20 21 /* 22 * FPU subroutines. 23 */ 24 25 #include <sys/types.h> 26 27 #include <machine/reg.h> 28 29 #include <sparc/fpu/fpu_arith.h> 30 #include <sparc/fpu/fpu_emu.h> 31 32 /* 33 * Shift the given number right rsh bits. Any bits that `fall off' will get 34 * shoved into the sticky field; we return the resulting sticky. Note that 35 * shifting NaNs is legal (this will never shift all bits out); a NaN's 36 * sticky field is ignored anyway. 37 */ 38 int 39 fpu_shr(register struct fpn *fp, register int rsh) 40 { 41 register u_int m0, m1, m2, m3, s; 42 register int lsh; 43 44 #ifdef DIAGNOSTIC 45 if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp))) 46 panic("fpu_rightshift 1"); 47 #endif 48 49 m0 = fp->fp_mant[0]; 50 m1 = fp->fp_mant[1]; 51 m2 = fp->fp_mant[2]; 52 m3 = fp->fp_mant[3]; 53 54 /* If shifting all the bits out, take a shortcut. */ 55 if (rsh >= FP_NMANT) { 56 #ifdef DIAGNOSTIC 57 if ((m0 | m1 | m2 | m3) == 0) 58 panic("fpu_rightshift 2"); 59 #endif 60 fp->fp_mant[0] = 0; 61 fp->fp_mant[1] = 0; 62 fp->fp_mant[2] = 0; 63 fp->fp_mant[3] = 0; 64 #ifdef notdef 65 if ((m0 | m1 | m2 | m3) == 0) 66 fp->fp_class = FPC_ZERO; 67 else 68 #endif 69 fp->fp_sticky = 1; 70 return (1); 71 } 72 73 /* Squish out full words. */ 74 s = fp->fp_sticky; 75 if (rsh >= 32 * 3) { 76 s |= m3 | m2 | m1; 77 m3 = m0, m2 = 0, m1 = 0, m0 = 0; 78 } else if (rsh >= 32 * 2) { 79 s |= m3 | m2; 80 m3 = m1, m2 = m0, m1 = 0, m0 = 0; 81 } else if (rsh >= 32) { 82 s |= m3; 83 m3 = m2, m2 = m1, m1 = m0, m0 = 0; 84 } 85 86 /* Handle any remaining partial word. */ 87 if ((rsh &= 31) != 0) { 88 lsh = 32 - rsh; 89 s |= m3 << lsh; 90 m3 = (m3 >> rsh) | (m2 << lsh); 91 m2 = (m2 >> rsh) | (m1 << lsh); 92 m1 = (m1 >> rsh) | (m0 << lsh); 93 m0 >>= rsh; 94 } 95 fp->fp_mant[0] = m0; 96 fp->fp_mant[1] = m1; 97 fp->fp_mant[2] = m2; 98 fp->fp_mant[3] = m3; 99 fp->fp_sticky = s; 100 return (s); 101 } 102 103 /* 104 * Force a number to be normal, i.e., make its fraction have all zero 105 * bits before FP_1, then FP_1, then all 1 bits. This is used for denorms 106 * and (sometimes) for intermediate results. 107 * 108 * Internally, this may use a `supernormal' -- a number whose fp_mant 109 * is greater than or equal to 2.0 -- so as a side effect you can hand it 110 * a supernormal and it will fix it (provided fp->fp_mant[3] == 0). 111 */ 112 void 113 fpu_norm(register struct fpn *fp) 114 { 115 register u_int m0, m1, m2, m3, top, sup, nrm; 116 register int lsh, rsh, exp; 117 118 exp = fp->fp_exp; 119 m0 = fp->fp_mant[0]; 120 m1 = fp->fp_mant[1]; 121 m2 = fp->fp_mant[2]; 122 m3 = fp->fp_mant[3]; 123 124 /* Handle severe subnormals with 32-bit moves. */ 125 if (m0 == 0) { 126 if (m1) 127 m0 = m1, m1 = m2, m2 = m3, m3 = 0, exp -= 32; 128 else if (m2) 129 m0 = m2, m1 = m3, m2 = 0, m3 = 0, exp -= 2 * 32; 130 else if (m3) 131 m0 = m3, m1 = 0, m2 = 0, m3 = 0, exp -= 3 * 32; 132 else { 133 fp->fp_class = FPC_ZERO; 134 return; 135 } 136 } 137 138 /* Now fix any supernormal or remaining subnormal. */ 139 nrm = FP_1; 140 sup = nrm << 1; 141 if (m0 >= sup) { 142 /* 143 * We have a supernormal number. We need to shift it right. 144 * We may assume m3==0. 145 */ 146 for (rsh = 1, top = m0 >> 1; top >= sup; rsh++) /* XXX slow */ 147 top >>= 1; 148 exp += rsh; 149 lsh = 32 - rsh; 150 m3 = m2 << lsh; 151 m2 = (m2 >> rsh) | (m1 << lsh); 152 m1 = (m1 >> rsh) | (m0 << lsh); 153 m0 = top; 154 } else if (m0 < nrm) { 155 /* 156 * We have a regular denorm (a subnormal number), and need 157 * to shift it left. 158 */ 159 for (lsh = 1, top = m0 << 1; top < nrm; lsh++) /* XXX slow */ 160 top <<= 1; 161 exp -= lsh; 162 rsh = 32 - lsh; 163 m0 = top | (m1 >> rsh); 164 m1 = (m1 << lsh) | (m2 >> rsh); 165 m2 = (m2 << lsh) | (m3 >> rsh); 166 m3 <<= lsh; 167 } 168 169 fp->fp_exp = exp; 170 fp->fp_mant[0] = m0; 171 fp->fp_mant[1] = m1; 172 fp->fp_mant[2] = m2; 173 fp->fp_mant[3] = m3; 174 } 175 176 /* 177 * Concoct a `fresh' Quiet NaN per Appendix N. 178 * As a side effect, we set NV (invalid) for the current exceptions. 179 */ 180 struct fpn * 181 fpu_newnan(register struct fpemu *fe) 182 { 183 register struct fpn *fp; 184 185 fe->fe_cx = FSR_NV; 186 fp = &fe->fe_f3; 187 fp->fp_class = FPC_QNAN; 188 fp->fp_sign = 0; 189 fp->fp_mant[0] = FP_1 - 1; 190 fp->fp_mant[1] = fp->fp_mant[2] = fp->fp_mant[3] = ~0; 191 return (fp); 192 } 193