1 /* 2 * Copyright (c) 1992 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This software was developed by the Computer Systems Engineering group 6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 7 * contributed to Berkeley. 8 * 9 * All advertising materials mentioning features or use of this software 10 * must display the following acknowledgement: 11 * This product includes software developed by the University of 12 * California, Lawrence Berkeley Laboratories. 13 * 14 * %sccs.include.redist.c% 15 * 16 * @(#)cpu.c 7.3 (Berkeley) 10/11/92 17 * 18 * from: $Header: cpu.c,v 1.8 92/06/17 05:22:01 torek Exp $ (LBL) 19 */ 20 21 #include <sys/param.h> 22 #include <sys/device.h> 23 24 #include <machine/autoconf.h> 25 #include <machine/cpu.h> 26 #include <machine/reg.h> 27 28 static char *psrtoname(); 29 static char *fsrtoname(); 30 31 /* 32 * Attach the CPU. Right now we just print stuff like "Sun 4/65 (25 MHz)". 33 * Eventually we will need more.... 34 */ 35 static void 36 cpu_attach(parent, dev, aux) 37 struct device *parent; 38 struct device *dev; 39 void *aux; 40 { 41 register int node = ((struct romaux *)aux)->ra_node; 42 register u_int psr, fver; 43 struct fpstate fpstate; 44 45 psr = getpsr(); 46 printf(": %s (%s @ %s MHz), ", getpropstring(node, "name"), 47 psrtoname(psr), clockfreq(getpropint(node, "clock-frequency", 0))); 48 /* 49 * Get the FSR and clear any exceptions. If we do not unload 50 * the queue here and it is left over from a previous crash, we 51 * will panic in the first loadfpstate(), due to a sequence error. 52 * 53 * If there is no FPU, trap.c will advance over all the stores. 54 */ 55 fpstate.fs_fsr = 7 << FSR_VER_SHIFT; 56 savefpstate(&fpstate); 57 fver = (fpstate.fs_fsr >> FSR_VER_SHIFT) & (FSR_VER >> FSR_VER_SHIFT); 58 if (fver == 7) 59 printf("no FPU\n"); 60 else { 61 foundfpu = 1; 62 printf("fpu = %s\n", fsrtoname(psr, fver)); 63 } 64 } 65 66 struct cfdriver cpucd = 67 { NULL, "cpu", matchbyname, cpu_attach, DV_CPU, sizeof(struct device) }; 68 69 static char * 70 psrtoname(psr) 71 register u_int psr; 72 { 73 int impl = psr >> 28, vers = (psr >> 24) & 15; 74 75 switch (impl) { 76 77 case 0: 78 if (vers == 0) 79 return ("MB86900/1A or L64801"); 80 break; 81 82 case 1: 83 if (vers < 2) 84 return ("CY7C601 or L64811"); 85 if (vers == 3) 86 return ("CY7C611"); 87 break; 88 89 case 2: 90 if (vers == 0) 91 return ("B5010"); 92 break; 93 94 case 5: 95 if (vers == 0) 96 return ("MN10501"); 97 break; 98 } 99 return ("mystery cpu type"); 100 } 101 102 static char * 103 fsrtoname(psr, fver) 104 register u_int psr, fver; 105 { 106 107 switch (psr >> 28) { 108 109 case 0: 110 switch (fver) { 111 case 0: 112 return ("MB86910 or WTL1164/5"); 113 case 1: 114 return ("MB86911 or WTL1164/5"); 115 case 2: 116 return ("L64802 or ACT8847"); 117 case 3: 118 return ("WTL3170/2"); 119 case 4: 120 return ("L64804"); 121 } 122 break; 123 124 case 1: 125 switch (fver) { 126 case 0: 127 return ("L64812 or ACT8847"); 128 case 1: 129 return ("L64814"); 130 case 2: 131 return ("TMS390C602A"); 132 case 3: 133 return ("WTL3171"); 134 } 135 break; 136 137 case 2: 138 if (fver == 0) 139 return ("B5010 or B5110/20 or B5210"); 140 break; 141 142 case 5: 143 if (fver == 0) 144 return ("MN10501"); 145 } 146 return ("mystery fpu type"); 147 } 148