1 /* 2 * Copyright (c) 1992, 1993 3 * The Regents of the University of California. All rights reserved. 4 * 5 * This software was developed by the Computer Systems Engineering group 6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 7 * contributed to Berkeley. 8 * 9 * All advertising materials mentioning features or use of this software 10 * must display the following acknowledgement: 11 * This product includes software developed by the University of 12 * California, Lawrence Berkeley Laboratory. 13 * 14 * %sccs.include.redist.c% 15 * 16 * @(#)intreg.h 8.1 (Berkeley) 06/11/93 17 * 18 * from: $Header: intreg.h,v 1.7 92/11/26 03:04:53 torek Exp $ (LBL) 19 */ 20 21 /* 22 * sun4c interrupt enable register. 23 * 24 * The register is a single byte. C code must use the ienab_bis and 25 * ienab_bic functions found in locore.s. 26 * 27 * The register's physical address is defined here as the register 28 * must be mapped early in the boot process (otherwise NMI handling 29 * will fail). 30 */ 31 #define INT_ENABLE_REG_PHYSADR 0xf5000000 /* phys addr in IOspace */ 32 33 /* 34 * Bits in interrupt enable register. Software interrupt requests must 35 * be cleared in software. This is done in locore.s. The ALLIE bit must 36 * be cleared to clear asynchronous memory error (level 15) interrupts. 37 */ 38 #define IE_L14 0x80 /* enable level 14 (counter 1) interrupts */ 39 #define IE_L10 0x20 /* enable level 10 (counter 0) interrupts */ 40 #define IE_L8 0x10 /* enable level 8 interrupts */ 41 #define IE_L6 0x08 /* request software level 6 interrupt */ 42 #define IE_L4 0x04 /* request software level 4 interrupt */ 43 #define IE_L1 0x02 /* request software level 1 interrupt */ 44 #define IE_ALLIE 0x01 /* enable interrupts */ 45 46 #ifndef LOCORE 47 void ienab_bis __P((int bis)); /* set given bits */ 48 void ienab_bic __P((int bic)); /* clear given bits */ 49 #endif 50