1 /* 2 * Copyright (c) 1992, 1993 3 * The Regents of the University of California. All rights reserved. 4 * 5 * This software was developed by the Computer Systems Engineering group 6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 7 * contributed to Berkeley. 8 * 9 * All advertising materials mentioning features or use of this software 10 * must display the following acknowledgement: 11 * This product includes software developed by the University of 12 * California, Lawrence Berkeley Laboratory. 13 * 14 * %sccs.include.redist.c% 15 * 16 * @(#)memreg.h 8.1 (Berkeley) 06/11/93 17 * 18 * from: $Header: memreg.h,v 1.6 92/11/26 03:05:05 torek Exp $ (LBL) 19 */ 20 21 /* 22 * Sun-4c memory error register. 23 * The register is a single word. 24 */ 25 volatile int *par_err_reg; /* virtual address; NULL if not yet mapped */ 26 27 /* 28 * Bits in parity error register. 29 * The register is cleared when read, except for the test and enable bits. 30 */ 31 #define PER_ERR 0x80 /* a parity error occurred */ 32 #define PER_MULTI 0x40 /* more than one occurred */ 33 #define PER_TEST 0x20 /* test (invert parity) */ 34 #define PER_ENABLE 0x10 /* enable parity error reports */ 35 #define PER_BYTE0 0x08 /* error occurred in byte 0 (bits 31..24) */ 36 #define PER_BYTE1 0x04 /* error occurred in byte 1 (bits 23..16) */ 37 #define PER_BYTE2 0x02 /* error occurred in byte 2 (bits 15..8) */ 38 #define PER_BYTE3 0x01 /* error occurred in byte 3 (bits 7..0) */ 39 40 #define PER_BITS "\20\10ERR\7MULTI\6TEST\5ENABLE\4BYTE0\3BYTE1\2BYTE2\1BYTE3" 41