1 /* 2 * Copyright (c) 1992 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This software was developed by the Computer Systems Engineering group 6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 7 * contributed to Berkeley. 8 * 9 * %sccs.include.redist.c% 10 * 11 * @(#)memreg.h 7.1 (Berkeley) 07/13/92 12 * 13 * from: $Header: memreg.h,v 1.5 92/06/17 05:22:18 torek Exp $ (LBL) 14 */ 15 16 /* 17 * Sun-4c memory error register. 18 * The register is a single word. 19 */ 20 volatile int *par_err_reg; /* virtual address; NULL if not yet mapped */ 21 22 /* 23 * Bits in parity error register. 24 * The register is cleared when read, except for the test and enable bits. 25 */ 26 #define PER_ERR 0x80 /* a parity error occurred */ 27 #define PER_MULTI 0x40 /* more than one occurred */ 28 #define PER_TEST 0x20 /* test (invert parity) */ 29 #define PER_ENABLE 0x10 /* enable parity error reports */ 30 #define PER_BYTE0 0x08 /* error occurred in byte 0 (bits 31..24) */ 31 #define PER_BYTE1 0x04 /* error occurred in byte 1 (bits 23..16) */ 32 #define PER_BYTE2 0x02 /* error occurred in byte 2 (bits 15..8) */ 33 #define PER_BYTE3 0x01 /* error occurred in byte 3 (bits 7..0) */ 34 35 #define PER_BITS "\20\10ERR\7MULTI\6TEST\5ENABLE\4BYTE0\3BYTE1\2BYTE2\1BYTE3" 36