xref: /original-bsd/sys/sparc/sparc/timerreg.h (revision 3705696b)
1 /*
2  * Copyright (c) 1992, 1993
3  *	The Regents of the University of California.  All rights reserved.
4  *
5  * This software was developed by the Computer Systems Engineering group
6  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
7  * contributed to Berkeley.
8  *
9  * All advertising materials mentioning features or use of this software
10  * must display the following acknowledgement:
11  *	This product includes software developed by the University of
12  *	California, Lawrence Berkeley Laboratory.
13  *
14  * %sccs.include.redist.c%
15  *
16  *	@(#)timerreg.h	8.1 (Berkeley) 06/11/93
17  *
18  * from: $Header: timerreg.h,v 1.7 92/11/26 03:05:09 leres Exp $ (LBL)
19  */
20 
21 /*
22  * Sun-4c counter/timer registers.  The timers are implemented within
23  * the cache chip (!).  The counter and limit fields below could be
24  * defined as:
25  *
26  *	struct {
27  *		u_int	t_limit:1,	// limit reached
28  *			t_usec:21,	// counter value in microseconds
29  *			t_mbz:10;	// always zero
30  *	};
31  *
32  * but this is more trouble than it is worth.
33  *
34  * These timers work in a rather peculiar fashion.  Most clock counters
35  * run to 0 (as, e.g., on the VAX, where the ICR counts up to 0 from a
36  * large unsigned number).  On the Sun-4c, it counts up to a limit.  But
37  * for some reason, when it reaches the limit, it resets to 1, not 0.
38  * Thus, if the limit is set to 4, the counter counts like this:
39  *
40  *	1, 2, 3, 1, 2, 3, ...
41  *
42  * and if we want to divide by N we must set the limit register to N+1.
43  */
44 #ifndef LOCORE
45 struct timer {
46 	int	t_counter;		/* counter reg */
47 	int	t_limit;		/* limit reg */
48 };
49 
50 struct timerreg {
51 	struct	timer t_c10;		/* counter that interrupts at ipl 10 */
52 	struct	timer t_c14;		/* counter that interrupts at ipl 14 */
53 };
54 #endif
55 
56 #define	TMR_LIMIT	0x80000000	/* counter reached its limit */
57 #define	TMR_SHIFT	10		/* shift to obtain microseconds */
58 #define	TMR_MASK	0x1fffff	/* 21 bits */
59 
60 /* Compute a limit that causes the timer to fire every n microseconds. */
61 #define	tmr_ustolim(n)	(((n) + 1) << TMR_SHIFT)
62 
63 #include <sparc/sparc/vaddrs.h>
64 #define	TIMERREG	((volatile struct timerreg *)TIMERREG_VA)
65