xref: /original-bsd/sys/tahoe/align/align.h (revision 542201aa)
1 /*	align.h	1.1	86/07/20	*/
2 
3 #ifndef	LOCORE
4 /*
5  * Some special registers definitions.
6  */
7 
8 #ifndef	SLR
9 #define	SLR	1
10 #define	P0LR	3
11 #define	P1LR	5
12 #define	P2LR	7
13 #endif
14 
15 #include	"../tahoealign/defs.h"
16 /*
17  * Definitions about the stack frame as seen by the routine
18  * 'alignment' in the kernel. If you ever wondered what's the
19  * meaning of 'machine dependent code', look here :-)
20  * This structure is partly set up by locore.s, for 'alignment',
21  * and partly by the allocation of local variables in 'alignment.c'
22  * itself.
23  *    All these things are passed between procedures on the
24  * (current process' kernel) stack. The alternative (static
25  * variables) is a little bit more elegant but it works fine
26  * for one process only. Will not work for multiple processes
27  * with alignment processing or for MP models of HW.
28  *
29  * WARNING : due to the intimate relationships involved, don't
30  *	change the process_info structure unless you also
31  *	change the alignment trap code in locore.s AND the
32  *	allocation of local variables in 'alignment.c' !!
33  */
34 typedef	struct {
35 	long		Saved_sp;		/* For exceptions */
36 	long		Saved_pc;
37 	long		Last_operand;		/* Last operand # processed */
38 	long		Opcode;			/* 'offending' opcode */
39 	struct	oprnd	Decoded[4];
40 	long		REG0;
41 	long		REG1;
42 	long		REG2;
43 	long		REG3;
44 	long		REG4;
45 	long		REG5;
46 	long		REG6;
47 	long		REG7;
48 	long		REG8;
49 	long		REG9;
50 	long		REG10;
51 	long		REG11;
52 	long		REG12;
53 	long		return_pc;	/* Points into locore.s */
54 	long		mask_restored;
55 	long		REG13;		/* Original, from the process */
56 	long		Sp;		/* Alias R14 */
57 	long		ret_code;
58 	long		ret_addr;
59 	long		ret_exception;	/* To tell locore.s about problems */
60 	long		Ach;
61 	long		Acl;
62 	unsigned	unused:30;
63 	unsigned	pcb_acc_pnt:1;
64 	unsigned	acc_dbl:1;
65 	long		Pc;		/* Alias R15 */
66 	long		Psl;
67 } process_info;
68 
69 #define	saved_pc	(infop->Saved_pc)
70 #define	saved_sp	(infop->Saved_sp)
71 #define last_operand	(infop->Last_operand)
72 #define	opCODE		(infop->Opcode)
73 #define	decoded		(infop->Decoded)
74 #define	r0		(infop->REG0)
75 #define	r1		(infop->REG1)
76 #define	r2		(infop->REG2)
77 #define	r3		(infop->REG3)
78 #define	r4		(infop->REG4)
79 #define	r5		(infop->REG5)
80 #define	r6		(infop->REG6)
81 #define	r7		(infop->REG7)
82 #define	r8		(infop->REG8)
83 #define	r9		(infop->REG9)
84 #define	r10		(infop->REG10)
85 #define	r11		(infop->REG11)
86 #define	r12		(infop->REG12)
87 #define	r13		(infop->REG13)
88 #define	fp		(infop->REG13)
89 #define	sp		(infop->Sp)
90 #define	acc_high	(infop->Ach)
91 #define	acc_low		(infop->Acl)
92 #define	pc		(infop->Pc)
93 #define	psl		(infop->Psl)
94 
95 #define	PCOUNTER		15
96 #define	SPOINTER		14
97 
98 
99 /*
100  * Setting new condition codes for the process.
101 #define Set_psl(z)	asm("	movl	z,r6"); \
102 			asm("	andl2	$15,r6"); \
103 			asm("	mnegl	$1,r7"); \
104 			asm("	xorl2	r6,r7"); \
105 			asm("	andl2	$15,r7"); \
106 			asm("	bicpsw	r7"); \
107 			asm("	bispsw	r6")
108  */
109 #define Set_psl(z)	asm("	andl2	$15,z"); \
110 			asm("	mnegl	$1,r6"); \
111 			asm("	xorl2	z,r6"); \
112 			asm("	andl2	$15,r6"); \
113 			asm("	bicpsw	r6"); \
114 			asm("	bispsw	z")
115 #define	New_cc(x)	(x) &= PSL_ALLCC; psl = psl & ~PSL_ALLCC | (x)
116 
117 #endif
118 
119 /*
120  * Definitions for ret_code. NOTE : DON"T USE 0 !! locore.s knows that
121  *	0 means OK, no problems !
122  */
123 
124 #define	ILL_ADDRMOD	1
125 #define	ILL_ACCESS	2
126 #define	ILL_OPRND	3
127 #define	ARITHMETIC	4
128 #define	ALIGNMENT	5
129 
130 /*
131  * For use in u.u_eosys as a flag.
132  */
133 #define	EMULATEALIGN	0x80
134