1 /* 2 * Copyright (c) 1989 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * Excelan Inc. 7 * 8 * %sccs.include.redist.c% 9 * 10 * @(#)if_exreg.h 7.3 (Berkeley) 06/28/90 11 */ 12 13 struct exdevice { 14 ushort ex_porta; /* write on porta resets EXOS */ 15 ushort ex_portb; /* write on portb interrupts EXOS */ 16 }; 17 18 /* EXOS I/O PORT A write definitions */ 19 #define EX_RESET 0 /* value doesn't really matter... */ 20 21 /* EXOS I/O PORT B write definitions */ 22 #define EX_NTRUPT 0 23 24 /* EXOS I/O PORT B read definitions */ 25 #define EX_TESTOK 1 /* set when self-diagnostics passed */ 26 #define EX_UNREADY (1<<3) /* set until EXOS ready to read from B */ 27 28 /* message buffer status field definitions */ 29 #define MH_OWNER 1 /* mask for status bit for owner */ 30 #define MH_HOST 0 /* if 0, the host owns the buffer */ 31 #define MH_EXOS 1 /* if 1, the EXOS owns the buffer */ 32 33 /* EXOS Link Level request codes */ 34 #define LLTRANSMIT 0xC /* send a packet */ 35 #define LLRTRANSMIT 0xE /* send a packet, and self-receive */ 36 #define LLRECEIVE 0xD /* receive a packet */ 37 #define LLNET_MODE 0x8 /* read/write mode control objects */ 38 #define LLNET_ADDRS 0x9 /* read/write receive address slots */ 39 #define LLNET_RECV 0xA /* read/alter receive slot enable bit */ 40 #define LLNET_STSTCS 0xB /* read/reset network statistics objects */ 41 42 /* Link Level return codes common to all requests */ 43 #define LL_OK 0 /* successful completion */ 44 #define LLX_MODE 0xA1 /* EXOS not in link level mode (impossible) */ 45 46 /* LLTRANSMIT unique return codes */ 47 #define LLXM_1RTRY 0x1 /* successful xmission, 1 retry */ 48 #define LLXM_RTRYS 0x2 /* successful xmission, more than 1 retry */ 49 #define LLXM_NSQE 0x8 /* successful xmission, no SQE TEST signal */ 50 #define LLXM_CLSN 0x10 /* xmission failed, excess retries */ 51 #define LLXM_NCS 0x20 /* xmission failed, no carrier sense */ 52 #define LLXM_LNGTH 0x40 /* xmission failed, bad packet length */ 53 #define XMIT_BITS "\7\7LENGTH\6CARRIER\5XCLSNS\4SQETST" 54 /*#define LLXM_ERROR (LLXM_NSQE|LLXM_CLSN|LLXM_NCS|LLXM_LNGTH)*/ 55 #define LLXM_ERROR (LLXM_CLSN|LLXM_NCS|LLXM_LNGTH) 56 57 /* LLRECEIVE unique return codes */ 58 #define LLRC_TRUNC 0x4 /* pkt received, but truncated to fit buffer */ 59 #define LLRC_ALIGN 0x10 /* pkt received, but with alignment error */ 60 #define LLRC_CRC 0x20 /* pkt received, but with CRC error */ 61 #define LLRC_BUFLEN 0x40 /* no pkt received, buffer less than 64 bytes */ 62 /* this should never happen here */ 63 #define RECV_BITS "\7\7BUFLEN\6CRC\5ALIGN\3TRUNC" 64 65 /* LLNET_ADDRS unique return codes */ 66 #define LLNA_BADSLOT 0xD1 /* slot doesn't exist or can't be accessed */ 67 #define LLNA_BADADDR 0xD3 /* invalid address for designated slot */ 68 69 /* LLNET_RECV unique return codes */ 70 #define LLNR_BADSLOT 0xD1 /* slot doesn't exist or can't be accessed */ 71 #define LLNR_BADADDR 0xD2 /* designated slot was empty */ 72 73 /* address slot object indices */ 74 #define NULLSLOT 0 /* the null slot */ 75 #define MINMCSLOT 1 /* minimum multicast slot index */ 76 #define MAXMCSLOT 8 /* default maximum multicast slot index */ 77 #define PHYSSLOT 253 /* physical slot index */ 78 #define UNVRSSLOT 254 /* universal slot index */ 79 #define BROADSLOT 255 /* broadcast slot index */ 80 81 /* request mask bit definitions */ 82 #define WRITE_OBJ 1 /* write the object */ 83 #define READ_OBJ 2 /* read the object */ 84 #define ENABLE_RCV 4 /* enable reception on designated slot */ 85 86 /* NET_MODE options mask bit definitions */ 87 #define OPT_ALIGN 0x10 /* receive packets with alignment errors */ 88 #define OPT_CRC 0x20 /* receive packets with CRC errors */ 89 #define OPT_DSABLE 0x80 /* disconnect controller hardware */ 90 91 /* NET_MODE mode field value definitions */ 92 #define MODE_OFF 0 /* stop transmission and reception */ 93 #define MODE_PERF 1 /* perfect multicast address filtering */ 94 #define MODE_HW 2 /* hardware-only multicast address filtering */ 95 #define MODE_PROM 3 /* promiscuous reception */ 96 97 #define NFRAGMENTS 8 /* number fragments that the EXOS will scatter/gather */ 98 #define EXMAXRBUF 1518 /* per EXOS 202 manual 5.3.7 (maybe 1518 would do) */ 99 100 /* 101 * N.B. Structures below are carefully constructed so that 102 * they correspond to the message formats that NX firmware 103 * defines. None of them should contain any compiler-instigated 104 * padding. Be especially careful about VAX C longword alignment! 105 */ 106 107 struct ex_stat { 108 u_long sa_fsent; /* frames sent without errors */ 109 u_long sa_xsclsn; /* frames aborted excess collisions */ 110 u_long sa_nsqe; /* frames subject to heartbeat failure */ 111 u_long sa_undef; /* undefined (TDR on EXOS 101) */ 112 u_long sa_frcvd; /* frames received no errors */ 113 u_long sa_align; /* frames received alignment error */ 114 u_long sa_crc; /* frames received crc error */ 115 u_long sa_flost; /* frames lost */ 116 }; 117 118 struct buf_blk { /* packet/buffer block descriptor */ 119 u_short bb_len; /* length of block, in bytes */ 120 struct i86_long { 121 u_short realaddr[2]; /* address of block */ 122 } bb_addr; 123 /* 124 * Array above is really a single u_long field. 125 * We kludge its definition to defeat word-alignment. 126 */ 127 }; 128 129 struct net_mode { /* read/write mode control objects */ 130 /*12*/ u_char nm_rqst; /* request code */ 131 /*13*/ u_char nm_rply; /* reply code */ 132 /*14*/ u_char nm_mask; /* bit-wise switches for read, write */ 133 /*15*/ u_char nm_optn; /* acceptable packet reception errors */ 134 /*16*/ u_char nm_mode; /* EXOS filtering mode */ 135 /*17*/ 136 }; 137 138 struct net_addrs { /* read/write receive address slots */ 139 /*12*/ u_char na_rqst; /* request code */ 140 /*13*/ u_char na_rply; /* reply code */ 141 /*14*/ u_char na_mask; /* bit-wise switches for read, write */ 142 /*15*/ u_char na_slot; /* index of address slot */ 143 /*16*/ u_char na_addrs[6]; /* address read and/or written */ 144 /*22*/ 145 }; 146 147 struct net_recv { /* read/alter receive slot enable bit */ 148 /*12*/ u_char nr_rqst; /* request code */ 149 /*13*/ u_char nr_rply; /* reply code */ 150 /*14*/ u_char nr_mask; /* bit-wise switches for read, write */ 151 /*15*/ u_char nr_slot; /* index of address slot */ 152 /*16*/ 153 }; 154 155 struct net_ststcs { /* read/reset network statistics objects */ 156 /*12*/ u_char ns_rqst; /* request code */ 157 /*13*/ u_char ns_rply; /* reply code */ 158 /*14*/ u_char ns_mask; /* bit-wise switches for read, write */ 159 /*15*/ u_char ns_rsrv; /* reserved for EXOS */ 160 /*16*/ u_short ns_nobj; /* number of objects to work on */ 161 /*18*/ u_short ns_xobj; /* index of first object to work on */ 162 /*20*/ u_long ns_bufp; /* pointer to statistics buffer */ 163 /*24*/ 164 }; 165 166 struct enet_xmit { /* send a packet on the Ethernet */ 167 /*12*/ u_char et_rqst; /* request code */ 168 /*13*/ u_char et_rply; /* reply code */ 169 /*14*/ u_char et_slot; /* address slot matching dest address */ 170 /*15*/ u_char et_nblock; /* number of blocks composing packet */ 171 /*16*/ struct buf_blk et_blks[NFRAGMENTS]; /* array of block descriptors */ 172 /*22-64*/ 173 }; 174 175 struct enet_recv { /* receive a packet on the Ethernet */ 176 /*12*/ u_char er_rqst; /* request code */ 177 /*13*/ u_char er_rply; /* reply code */ 178 /*14*/ u_char er_slot; /* address slot matching dest address */ 179 /*15*/ u_char er_nblock; /* number of blocks composing buffer */ 180 /*16*/ struct buf_blk er_blks[NFRAGMENTS]; /* array of block descriptors */ 181 /*22-64*/ 182 }; 183 184 /* we send requests and receive replys with the EXOS using this structure */ 185 struct ex_msg { 186 /*00*/ u_short mb_link; /* address of next message buffer */ 187 /*02*/ u_char mb_rsrv; /* reserved for use by EXOS */ 188 /*03*/ u_char mb_status; /* used bit-wise for message protocol */ 189 /*04*/ u_short mb_length; /* length, in bytes, of the rest */ 190 /*06*/ short mb_1rsrv; /* reserved for used by EXOS */ 191 /*08*/ struct ifvba *mb_pkb; /* available to user */ 192 /*12*/ union mb_all { 193 struct net_mode mb_net_mode; 194 struct net_addrs mb_net_addrs; 195 struct net_recv mb_net_recv; 196 struct net_ststcs mb_net_ststcs; 197 struct enet_xmit mb_enet_xmit; 198 struct enet_recv mb_enet_recv; 199 } mb_all; 200 /* following field is used only by host, not read by board */ 201 struct ex_msg *mb_next; /* host's pointer to next message */ 202 }; 203 #define mb_nm mb_all.mb_net_mode 204 #define mb_na mb_all.mb_net_addrs 205 #define mb_nr mb_all.mb_net_recv 206 #define mb_ns mb_all.mb_net_ststcs 207 #define mb_et mb_all.mb_enet_xmit 208 #define mb_er mb_all.mb_enet_recv 209 #define mb_rqst mb_nm.nm_rqst 210 #define mb_rply mb_nm.nm_rply 211 #define MBDATALEN (sizeof(union mb_all)+6) 212 213 struct ex_conf { 214 /*00*/ u_short cm_1rsrv; /* reserved, must be 1 */ 215 /*02*/ char cm_vc[4]; /* returns ASCII version code */ 216 /*06*/ u_char cm_cc; /* returns config completion code */ 217 /*07*/ u_char cm_opmode; /* specifies operation mode */ 218 /*08*/ u_short cm_dfo; /* specifies host data format option */ 219 /*00*/ u_char cm_dcn1; /* reserved, must be 1 */ 220 /*11*/ u_char cm_2rsrv[2]; /* reserved, must be 0 */ 221 /*13*/ u_char cm_ham; /* specifies host address mode */ 222 /*14*/ u_char cm_3rsrv; /* reserved, must be 0 */ 223 /*15*/ u_char cm_mapsiz; /* reserved, must be 0 */ 224 /*16*/ u_char cm_byteptrn[4]; /* host data format option test pattern */ 225 /*20*/ u_short cm_wordptrn[2]; 226 /*24*/ u_long cm_lwordptrn; 227 /*28*/ u_char cm_rsrvd[20]; 228 /*48*/ u_long cm_mba; /* use 0xFFFFFFFF in link level mode */ 229 /*52*/ u_char cm_nproc; /* use 0xFF in link level mode */ 230 /*53*/ u_char cm_nmbox; /* use 0xFF in link level mode */ 231 /*54*/ u_char cm_nmcast; /* use 0xFF in link level mode */ 232 /*55*/ u_char cm_nhost; /* use 1 in link level mode */ 233 234 /* the next five parameters define the request message queue */ 235 /*56*/ u_long cm_h2xba; /* base address of message queue */ 236 /*60*/ u_short cm_h2xhdr; /* address offset of msg Q header */ 237 /*62*/ u_char cm_h2xtyp; /* interrupt type */ 238 /*63*/ u_char cm_h2xval; /* interrupt value (not used) */ 239 /*64*/ u_short cm_h2xaddr; /* interrupt vector */ 240 /*66*/ u_short cm_h2xpad; /* pad out unused portion of vector */ 241 242 /* the next five parameters define the reply message queue */ 243 /*68*/ u_long cm_x2hba; /* base address of message queue */ 244 /*72*/ u_short cm_x2hhdr; /* address offset of msg Q header */ 245 /*74*/ u_char cm_x2htyp; /* interrupt type */ 246 /*75*/ u_char cm_x2hval; /* interrupt value (not used) */ 247 /*76*/ u_short cm_x2haddr; /* interrupt vector */ 248 /*78*/ u_short cm_x2hpad; /* pad out unused portion of vector */ 249 /*80*/ 250 }; 251