1 /* udc.h 1.2 86/01/05 */ 2 3 struct UDPAC { /* UDC command packet */ 4 char _stx ; 5 char _pkid ; 6 char _pksiz ; /* 21 bytes */ 7 char _pkdev ; /* device # */ 8 char _pkcmd ; /* Command type */ 9 char _pkfnc ; /* Function type */ 10 short _pkcnt ; /* # of data blocks (1/4K each) */ 11 short _pbsiz ; /* Block length size (0x100 = 1/4K) */ 12 short _pkmem[2] ; /* Starting memory address.Should be 'long' but 13 we can't write it this way on Tahoe, 14 because of alignment problems - the C 15 will gap after the previous 'short' */ 16 short _pcksm ; /* Checksum (unused) */ 17 long _psecno ; /* Starting sector # */ 18 char _etx ; 19 } 20 ; 21 22 #define SECTSIZ 256 /* sector size */ 23 #define L2SIZ 8 /* log2 of sector size */ 24 #define L2BSIZ 10 /* log2 of block size */ 25 #define NUDC 1 /* number of UDC controllers */ 26 #define NUNIT 8 /* number of units per controller */ 27 #define NUDDRV 5 /* number of drive types supported */ 28 #define DK_N 1 /* Monitoring device bit */ 29 30 /* 31 ** Block devices sizes structure 32 */ 33 34 struct size 35 { 36 daddr_t nblocks; 37 int block0; 38 }; 39 40 #define udaddr ( (char *)(0xff0000+IOBASE) ) 41 #define INT 0x00d /* interrupt offset */ 42 #define RST 0x00f /* controller reset offset */ 43 #define OB1 0x101 44 #define OB2 0x103 45 #define IB1 0x181 46 #define IB2 0x183 47 #define PKID 0x187 /* packet id */ 48 #define PKLEN 0x189 /* packet length */ 49 #define PKDEV 0x18b /* device # */ 50 #define PKCMD 0x18d /* command type */ 51 #define PKSTT 0x18f /* status type */ 52 #define STAT1 0x191 /* i/o status result offset */ 53 #define STAT2 0x193 54 #define DEVSTAT1 0x195 55 #define DEVSTAT2 0x197 56 #define DEVSIZE 0x199 /* # of sectors in device status message */ 57 58 #define UDREAD 0x10 59 #define UDWTRY 0x01 /* read with retry */ 60 61 #define UDWRITE 0x20 62 #define UDWCRC 0x01 /* write sectors and check CRC */ 63 #define UDWSECT 0x02 /* write sectors */ 64 65 #define UDTEST 0x30 66 #define UDSTAT 0x02 /* Test status */ 67 68 #define DEVRDY 0x80 /* device ready bit in status byte */ 69 #define DEVTYPE 0x7 /* bits 0-2 in status byte define device */ 70 #define FLP 0x1 71 #define HARDDISK 0x2 72 #define TAPE 0x5 73 74 /* Some I/O addresses used to generate pulses for scopes */ 75 #define OUT1 0xffffb034 76 #define OUT2 0xffffb018 77 #define OUT3 0xffffb020 78 #define OUT4 0xffffb004 79 #define OUT5 0xffffb024 80 #define OUT6 0xffffb00c 81 #define OUT7 0xffffb02c 82 83 #define IN1 0xffffb030 84 #define IN2 0xffffb03c 85 #define IN3 0xffffb004 86 #define IN4 0xffffb00c 87 #define IN5 0xffffb02c 88 89 int dummy; 90 extern char vmem[][16*NBPG]; 91 92 #define IOaddr(off) (caddr_t)((int)vmem + ((off) & 0x0fffff)) 93 94 int iospace_mapped; 95 #define scope_out(x) if(iospace_mapped) movob(IOaddr(OUT/**/x),0) 96 #define scope_in(x) if(iospace_mapped) dummy = *IOaddr(IN/**/x) 97