1 /* 2 * Copyright (c) 1988 Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms are permitted 6 * provided that the above copyright notice and this paragraph are 7 * duplicated in all such forms and that any documentation, 8 * advertising materials, and other materials related to such 9 * distribution and use acknowledge that the software was developed 10 * by the University of California, Berkeley. The name of the 11 * University may not be used to endorse or promote products derived 12 * from this software without specific prior written permission. 13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 15 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. 16 * 17 * @(#)vdreg.h 7.3 (Berkeley) 08/27/88 18 */ 19 20 /* 21 * Versabus VDDC/SMDE disk controller definitions. 22 */ 23 #define VDDC_SECSIZE 512 /* sector size for VDDC */ 24 #define VD_MAXSECSIZE 1024 /* max sector size for SMD/E */ 25 26 /* 27 * Controller communications block. 28 */ 29 struct vddevice { 30 u_long vdcdr; /* controller device register */ 31 u_long vdreset; /* controller reset register */ 32 u_long vdcsr; /* control-status register */ 33 long vdrstclr; /* reset clear register */ 34 u_short vdstatus[16]; /* per-drive status register */ 35 u_short vdicf_status; /* status change interupt control format */ 36 u_short vdicf_done; /* interrupt complete control format */ 37 u_short vdicf_error; /* interrupt error control format */ 38 u_short vdicf_success; /* interrupt success control format */ 39 u_short vdtcf_mdcb; /* mdcb transfer control format */ 40 u_short vdtcf_dcb; /* dcb transfer control format */ 41 u_short vdtcf_trail; /* trail transfer control format */ 42 u_short vdtcf_data; /* data transfer control format */ 43 u_long vdccf; /* controller configuration flags */ 44 u_long vdsecsize; /* sector size */ 45 u_short vdfill0; 46 u_char vdcylskew; /* cylinder to cylinder skew factor */ 47 u_char vdtrackskew; /* track to track skew factor */ 48 u_long vdfill1; 49 u_long vddfr; /* diagnostic flag register */ 50 u_long vddda; /* diagnostic dump address */ 51 }; 52 53 /* controller types */ 54 #define VDTYPE_VDDC 1 /* old vddc controller (smd only) */ 55 #define VDTYPE_SMDE 2 /* new smde controller (smd-e) */ 56 57 /* 58 * Controller status definitions. 59 */ 60 #define CS_SCS 0xf /* status change source (drive number) */ 61 #define CS_ELC 0x10 /* error on last command */ 62 #define CS_ICC 0x60 /* interupt cause code */ 63 #define ICC_NOI 0x00 /* no interupt */ 64 #define ICC_DUN 0x20 /* no interupt */ 65 #define ICC_ERR 0x40 /* no interupt */ 66 #define ICC_SUC 0x60 /* no interupt */ 67 #define CS_GO 0x80 /* go bit (controller busy) */ 68 #define CS_BE 0x100 /* buss error */ 69 #define CS_BOK 0x4000 /* board ok */ 70 #define CS_SFL 0x8000 /* system fail */ 71 #define CS_LEC 0xff000000 /* last error code */ 72 73 /* 74 * Drive status definitions. 75 */ 76 #define STA_UR 0x1 /* unit ready */ 77 #define STA_OC 0x2 /* on cylinder */ 78 #define STA_SE 0x4 /* seek error */ 79 #define STA_DF 0x8 /* drive fault */ 80 #define STA_WP 0x10 /* write protected */ 81 #define STA_US 0x20 /* unit selected */ 82 #define STA_TYPE 0x300 /* drive type: */ 83 #define STA_SMD 0x000 /* SMD */ 84 #define STA_ESDI 0x100 /* ESDI */ 85 86 /* 87 * Interupt Control Field definitions. 88 */ 89 #define ICF_IPL 0x7 /* interupt priority level */ 90 #define ICF_IEN 0x8 /* interupt enable */ 91 #define ICF_IV 0xff00 /* interupt vector */ 92 93 /* 94 * Transfer Control Format definitions. 95 */ 96 #define TCF_AM 0xff /* Address Modifier */ 97 #define AM_SNPDA 0x01 /* Standard Non-Privileged Data Access */ 98 #define AM_SASA 0x81 /* Standard Ascending Sequential Access */ 99 #define AM_ENPDA 0xf1 /* Extended Non-Privileged Data Access */ 100 #define AM_EASA 0xe1 /* Extended Ascending Sequential Access */ 101 #define TCF_BTE 0x800 /* Block Transfer Enable */ 102 103 /* 104 * Controller Configuration Flags. 105 */ 106 #define CCF_STS 0x1 /* sectors per track selectable */ 107 #define CCF_EAV 0x2 /* enable auto vector */ 108 #define CCF_ERR 0x4 /* enable reset register */ 109 #define CCF_RFE 0x8 /* recovery flag enable */ 110 #define CCF_XMD 0x60 /* xmd transfer mode (bus size) */ 111 #define XMD_8BIT 0x20 /* do only 8 bit transfers */ 112 #define XMD_16BIT 0x40 /* do only 16 bit transfers */ 113 #define XMD_32BIT 0x60 /* do only 32 bit transfers */ 114 #define CCF_DIU 0x80 /* disable initial update of DCB @cmd start */ 115 #define CCF_BSZ 0x300 /* burst size */ 116 #define BSZ_16WRD 0x000 /* 16 word transfer burst */ 117 #define BSZ_12WRD 0x100 /* 12 word transfer burst */ 118 #define BSZ_8WRD 0x200 /* 8 word transfer burst */ 119 #define BSZ_4WRD 0x300 /* 4 word transfer burst */ 120 #define CCF_SEN 0x400 /* cylinder/track skew enable (for format) */ 121 #define CCF_ENP 0x1000 /* enable parity */ 122 #define CCF_EPE 0x2000 /* enable parity errors */ 123 #define CCF_EDE 0x10000 /* error detection enable */ 124 #define CCF_ECE 0x20000 /* error correction enable */ 125 126 /* 127 * Diagnostic register definitions. 128 */ 129 #define DIA_DC 0x7f /* dump count mask */ 130 #define DIA_DWR 0x80 /* dump write/read flag */ 131 #define DIA_ARE 0x100 /* auto rebuild enable */ 132 #define DIA_CEN 0x200 /* call enable flag */ 133 #define DIA_KEY 0xAA550000 /* reset enable key */ 134 135 /* 136 * Hardware interface flags, in dcb.devselect and d_devflags 137 */ 138 #define VD_ESDI 0x10 /* drive is on ESDI interface */ 139 #define d_devflags d_drivedata[0] /* in disk label */ 140 141 /* 142 * Error recovery flags. 143 */ 144 #define VDRF_RTZ 0x0001 /* return to zero */ 145 #define VDRF_OCF 0x0002 /* on cylinder false */ 146 #define VDRF_OSP 0x0004 /* offset plus */ 147 #define VDRF_OSM 0x0008 /* offset minus */ 148 #define VDRF_DSE 0x0080 /* data strobe early */ 149 #define VDRF_DSL 0x0100 /* data strobe late */ 150 151 #define VDRF_NONE 0 152 #define VDRF_NORMAL (VDRF_RTZ|VDRF_OCF|VDRF_OSP|VDRF_OSM|VDRF_DSE|VDRF_DSE) 153 154 /* 155 * Perform a reset on the controller. 156 */ 157 #define VDRESET(a,t) { \ 158 if ((t) == VDTYPE_SMDE) { \ 159 ((struct vddevice *)(a))->vddfr = DIA_KEY|DIA_CEN; \ 160 ((struct vddevice *)(a))->vdcdr = (u_long)0xffffffff; \ 161 DELAY(5000000); \ 162 } else { \ 163 ((struct vddevice *)(a))->vdreset = 0; \ 164 DELAY(1500000); \ 165 } \ 166 } 167 168 /* 169 * Abort a controller operation. 170 */ 171 #define VDABORT(a,t) { \ 172 if ((t) == VDTYPE_VDDC) { \ 173 movow((a), (VDOP_ABORT&0xffff0000)>>16) ; \ 174 movow((int)(a)+2, VDOP_ABORT&0xffff); \ 175 } else \ 176 ((struct vddevice *)(a))->vdcdr = (u_long)VDOP_ABORT; \ 177 DELAY(1000000); \ 178 } 179 180 /* 181 * Start a command. 182 */ 183 #define VDGO(a,mdcb,t) {\ 184 if ((t) == VDTYPE_VDDC) { \ 185 movow((a), ((int)(mdcb)&0xffff0000)>>16) ; \ 186 movow((int)((a))+2, (int)(mdcb)&0xffff); \ 187 } else \ 188 ((struct vddevice *)(a))->vdcdr = (mdcb); \ 189 } 190 191 /* 192 * MDCB layout. 193 */ 194 struct mdcb { 195 struct dcb *mdcb_head; /* first dcb in list */ 196 struct dcb *mdcb_busy; /* dcb being processed */ 197 struct dcb *mdcb_intr; /* dcb causing interrupt */ 198 long mdcb_status; /* status of dcb in mdcb_busy */ 199 }; 200 201 /* 202 * DCB definitions. 203 */ 204 205 /* 206 * A disk address. 207 */ 208 typedef struct { 209 u_char track; /* all 8 bits */ 210 u_char sector; /* all 8 bits */ 211 u_short cylinder; /* low order 12 bits */ 212 } dskadr; 213 214 /* 215 * DCB trailer formats. 216 */ 217 /* read/write trailer */ 218 struct trrw { 219 u_long memadr; /* memory address */ 220 u_long wcount; /* 16 bit word count */ 221 dskadr disk; /* disk address */ 222 }; 223 224 /* scatter/gather trailer */ 225 #define VDMAXPAGES (MAXPHYS / NBPG) 226 struct trsg { 227 struct trrw start_addr; 228 struct addr_chain { 229 u_long nxt_addr; 230 u_long nxt_len; 231 } addr_chain[VDMAXPAGES + 1]; 232 }; 233 234 /* seek trailer format */ 235 struct trseek { 236 dskadr skaddr; 237 }; 238 239 /* format trailer */ 240 struct trfmt { 241 char *addr; /* data buffer to be filled on sector*/ 242 long nsectors; /* # of sectors to be formatted */ 243 dskadr disk; /* disk physical address info */ 244 dskadr hdr; /* header address info */ 245 }; 246 247 /* reset/configure trailer */ 248 struct treset { 249 long ncyl; /* # cylinders */ 250 long nsurfaces; /* # surfaces */ 251 long nsectors; /* # sectors */ 252 long slip_sec; /* # of slip sectors */ 253 long recovery; /* recovery flags */ 254 }; 255 256 /* ident trailer */ 257 struct trid { 258 long name; 259 long rev; 260 long date; 261 }; 262 263 /* 264 * DCB layout. 265 */ 266 struct dcb { 267 struct dcb *nxtdcb; /* next dcb */ 268 short intflg; /* interrupt settings and flags */ 269 short opcode; /* DCB command code etc... */ 270 long operrsta; /* error & status info */ 271 short fill; /* not used */ 272 char devselect; /* drive selection */ 273 char trailcnt; /* trailer Word Count */ 274 long err_memadr; /* error memory address */ 275 u_char err_code; /* error codes for SMD/E */ 276 char fill2; /* not used */ 277 short err_wcount; /* error word count */ 278 char err_trk; /* error track/sector */ 279 char err_sec; /* error track/sector */ 280 short err_cyl; /* error cylinder adr */ 281 union { 282 struct trid idtrail; /* ident command trailer */ 283 struct trseek sktrail; /* seek command trailer */ 284 struct trsg sgtrail; /* scatter/gather trailer */ 285 struct trrw rwtrail; /* read/write trailer */ 286 struct trfmt fmtrail; /* format trailer */ 287 struct treset rstrail; /* reset/configure trailer */ 288 } trail; 289 }; 290 291 /* 292 * smaller DCB with seek trailer only (no scatter-gather). 293 */ 294 struct skdcb { 295 struct dcb *nxtdcb; /* next dcb */ 296 short intflg; /* interrupt settings and flags */ 297 short opcode; /* DCB command code etc... */ 298 long operrsta; /* error & status info */ 299 short fill; /* not used */ 300 char devselect; /* drive selection */ 301 char trailcnt; /* trailer Word Count */ 302 long err_memadr; /* error memory address */ 303 u_char err_code; /* error codes for SMD/E */ 304 char fill2; /* not used */ 305 short err_wcount; /* error word count */ 306 char err_trk; /* error track/sector */ 307 char err_sec; /* error track/sector */ 308 short err_cyl; /* error cylinder adr */ 309 union { 310 struct trseek sktrail; /* seek command trailer */ 311 } trail; 312 }; 313 314 /* 315 * DCB command codes. 316 */ 317 #define VDOP_RD 0x80 /* read data */ 318 #define VDOP_FTR 0xc0 /* full track read */ 319 #define VDOP_RAS 0x90 /* read and scatter */ 320 #define VDOP_RDRAW 0x600 /* read unformatted disk sector */ 321 #define VDOP_CMP 0xa0 /* compare */ 322 #define VDOP_FTC 0xe0 /* full track compare */ 323 #define VDOP_RHDE 0x180 /* read header, data & ecc */ 324 #define VDOP_WD 0x00 /* write data */ 325 #define VDOP_FTW 0x40 /* full track write */ 326 #define VDOP_WTC 0x20 /* write then compare */ 327 #define VDOP_FTWTC 0x60 /* full track write then compare */ 328 #define VDOP_GAW 0x10 /* gather and write */ 329 #define VDOP_WDE 0x100 /* write data & ecc */ 330 #define VDOP_FSECT 0x900 /* format sector */ 331 #define VDOP_GWC 0x30 /* gather write & compare */ 332 #define VDOP_START 0x800 /* start drives */ 333 #define VDOP_RELEASE 0xa00 /* stop drives */ 334 #define VDOP_SEEK 0xb00 /* seek */ 335 #define VDOP_INIT 0xc00 /* initialize controller */ 336 #define VDOP_DIAG 0xd00 /* diagnose (self-test) controller */ 337 #define VDOP_CONFIG 0xe00 /* reset & configure drive */ 338 #define VDOP_STATUS 0xf00 /* get drive status */ 339 #define VDOP_IDENT 0x700 /* identify controller */ 340 341 #define VDOP_ABORT 0x80000000 /* abort current command */ 342 343 /* 344 * DCB status definitions. 345 */ 346 #define DCBS_HCRC 0x00000001 /* header crc error */ 347 #define DCBS_HCE 0x00000002 /* header compare error */ 348 #define DCBS_WPT 0x00000004 /* drive write protected */ 349 #define DCBS_CHE 0x00000008 /* controller hardware error */ 350 #define DCBS_SKI 0x00000010 /* seek incomplete */ 351 #define DCBS_UDE 0x00000020 /* uncorrectable data error */ 352 #define DCBS_OCYL 0x00000040 /* off cylinder */ 353 #define DCBS_NRDY 0x00000080 /* drive not ready */ 354 #define DCBS_ATA 0x00000100 /* alternate track accessed */ 355 #define DCBS_SKS 0x00000200 /* seek started */ 356 #define DCBS_IVA 0x00000400 /* invalid disk address error */ 357 #define DCBS_NEM 0x00000800 /* non-existant memory error */ 358 #define DCBS_DPE 0x00001000 /* memory data parity error */ 359 #define DCBS_DCE 0x00002000 /* data compare error */ 360 #define DCBS_DDI 0x00004000 /* ddi ready */ 361 #define DCBS_OAB 0x00008000 /* operation aborted */ 362 #define DCBS_DSE 0x00010000 /* data strobe early */ 363 #define DCBS_DSL 0x00020000 /* data strobe late */ 364 #define DCBS_TOP 0x00040000 /* track offset plus */ 365 #define DCBS_TOM 0x00080000 /* track offset minus */ 366 #define DCBS_CCD 0x00100000 /* controller corrected data */ 367 #define DCBS_HARD 0x00200000 /* hard error */ 368 #define DCBS_SOFT 0x00400000 /* soft error (retry succesful) */ 369 #define DCBS_ERR 0x00800000 /* composite error */ 370 #define DCBS_IVC 0x01000000 /* invalid command error */ 371 /* bits 24-27 unused */ 372 #define DCBS_BSY 0x10000000 /* controller busy */ 373 #define DCBS_ICC 0x60000000 /* interrupt cause code */ 374 #define DCBS_INT 0x80000000 /* interrupt generated for this dcb */ 375 376 #define VDERRBITS "\20\1HCRC\2HCE\3WPT\4CHE\5DSKI\6UDE\7OCYL\10NRDY\ 377 \11ATA\12SKS\13IVA\14NEM\15DPE\16DCE\17DDI\20OAB\21DSE\22DSL\23TOP\24TOM\ 378 \25CCD\26HARD\27SOFT\30ERR\31IVC\35ABORTED\36FAIL\37COMPLETE\40STARTED" 379 380 /* drive related errors */ 381 #define VDERR_DRIVE (DCBS_SKI|DCBS_OCYL|DCBS_NRDY|DCBS_IVA) 382 /* controller related errors */ 383 #define VDERR_CTLR (DCBS_CHE|DCBS_OAB|DCBS_IVC|DCBS_NEM) 384 /* potentially recoverable errors */ 385 #define VDERR_RETRY \ 386 (VDERR_DRIVE|VDERR_CTLR|DCBS_DCE|DCBS_DPE|DCBS_HCRC|DCBS_HCE) 387 /* uncorrected data errors */ 388 #define VDERR_HARD (VDERR_RETRY|DCBS_WPT|DCBS_UDE) 389 390 /* 391 * DCB status codes. 392 */ 393 #define DCBS_ABORT 0x10000000 /* dcb aborted */ 394 #define DCBS_FAIL 0x20000000 /* dcb unsuccesfully completed */ 395 #define DCBS_DONE 0x40000000 /* dcb complete */ 396 #define DCBS_START 0x80000000 /* dcb started */ 397 398 /* 399 * DCB interrupt control. 400 */ 401 #define DCBINT_NONE 0x0 /* don't interrupt */ 402 #define DCBINT_ERR 0x2 /* interrupt on error */ 403 #define DCBINT_SUC 0x1 /* interrupt on success */ 404 #define DCBINT_DONE (DCBINT_ERR|DCBINT_SUC) 405 #define DCBINT_PBA 0x4 /* proceed before acknowledge */ 406 407 /* 408 * Sector formats. 409 */ 410 typedef union { 411 struct { 412 dskadr hdr_addr; 413 short smd_crc; 414 } smd; 415 struct { 416 dskadr physical; 417 dskadr logical; 418 long smd_e_crc; 419 } smd_e; 420 } fmt_hdr; 421 422 /* Sector Header bit assignments */ 423 #define VDMF 0x8000 /* Manufacturer Fault 1=good sector */ 424 #define VDUF 0x4000 /* User Fault 1=good sector */ 425 #define VDALT 0x2000 /* Alternate Sector 1=alternate */ 426 #define VDWPT 0x1000 /* Write Protect 1=Read Only Sector */ 427 428 /* input register assignments for DIOCWFORMAT ioctl */ 429 #define dk_op df_reg[0] /* opcode */ 430 #define dk_althdr df_reg[1] /* alt. sect. header, in an int! */ 431 #define dk_fmtflags df_reg[2] /* header format flags */ 432 433 /* output register assignments for DIOCWFORMAT ioctl */ 434 #define dk_operrsta df_reg[0] /* dcb operrsta */ 435 #define dk_ecode df_reg[1] /* smd-e err_code */ 436