1 /* 2 * Registers for the DEBNA and DEBNK Ethernet interfaces 3 * (DEC calls these Network Interfaces, hence nireg.h) 4 */ 5 6 /* 7 * this seems to be intended to be more general, but I have no details, 8 * so it goes here for now 9 * 10 * BI Vax Port (BVP) stuff first: 11 */ 12 struct bvpregs { 13 u_long p_pcr; /* port control register */ 14 u_long p_psr; /* port status register */ 15 u_long p_per; /* port error register */ 16 u_long p_pdr; /* port data register */ 17 }; 18 19 /* 20 * BI node space registers 21 */ 22 struct ni_regs { 23 struct biiregs ni_bi; /* BIIC registers, except GPRs */ 24 struct bvpregs ni_tkp; /* tk50 port control via BIIC GPRs */ 25 u_long ni_xxx[64]; /* unused */ 26 u_long ni_rxcd; /* receive console data */ 27 struct bvpregs ni_nip; /* NI port control via BCI3 GPRs */ 28 u_long ni_pudr; /* power-up diagnostic register */ 29 }; 30 31 /* bits in ni_pudr */ 32 #define PUDR_TAPE 0x40000000 /* tk50 & assoc logic ok */ 33 #define PUDR_PATCH 0x20000000 /* patch logic ok */ 34 #define PUDR_VRAM 0x10000000 /* DEBNx onboard RAM ok */ 35 #define PUDR_VROM1 0x08000000 /* uVax ROM 1 ok */ /* ? */ 36 #define PUDR_VROM2 0x04000000 /* uVax ROM 2 ok */ 37 #define PUDR_VROM3 0x02000000 /* uVax ROM 3 ok */ 38 #define PUDR_VROM4 0x01000000 /* uVax ROM 4 ok */ 39 #define PUDR_UVAX 0x00800000 /* uVax passes self test */ 40 #define PUDR_BI 0x00400000 /* BIIC and BCI3 chips ok */ 41 #define PUDR_TMR 0x00200000 /* interval timer ok */ 42 #define PUDR_IRQ 0x00100000 /* no IRQ lines stuck */ 43 #define PUDR_NI 0x00080000 /* Ethernet ctlr ok */ 44 #define PUDR_TK50 0x00040000 /* tk50 present */ 45 #define PUDR_PRES 0x00001000 /* tk50 present (again?!) */ 46 #define PUDR_UVINT 0x00000800 /* uVax-to-80186 intr logic ok */ 47 #define PUDR_BUSHD 0x00000400 /* no bus hold errors */ 48 #define PUDR_II32 0x00000200 /* II32 transceivers ok */ 49 #define PUDR_MPSC 0x00000100 /* MPSC logic ok */ 50 #define PUDR_GAP 0x00000080 /* gap-detect logic ok */ 51 #define PUDR_MISC 0x00000040 /* misc. registers ok */ 52 #define PUDR_UNEXP 0x00000020 /* unexpected interrupt trapped */ 53 #define PUDR_80186 0x00000010 /* 80186 ok */ 54 #define PUDR_PATCH 0x00000008 /* patch logic ok (again) */ 55 #define PUDR_8RAM 0x00000004 /* 80186 RAM ok */ 56 #define PUDR_8ROM2 0x00000002 /* 80186 ROM1 ok */ 57 #define PUDR_8ROM1 0x00000001 /* 80186 ROM2 ok */ 58