xref: /original-bsd/sys/vax/if/if_ddnreg.h (revision c7ce21e7)
1 /*	@(#)if_ddnreg.h	7.1 (Berkeley) 06/05/86 */
2 
3 
4 /************************************************************************\
5 
6      ________________________________________________________
7     /                                                        \
8    |          AAA          CCCCCCCCCCCCCC    CCCCCCCCCCCCCC   |
9    |         AAAAA        CCCCCCCCCCCCCCCC  CCCCCCCCCCCCCCCC  |
10    |        AAAAAAA       CCCCCCCCCCCCCCCCC CCCCCCCCCCCCCCCCC |
11    |       AAAA AAAA      CCCC              CCCC              |
12    |      AAAA   AAAA     CCCC              CCCC              |
13    |     AAAA     AAAA    CCCC              CCCC              |
14    |    AAAA       AAAA   CCCC              CCCC              |
15    |   AAAA  AAAAAAAAAAA  CCCCCCCCCCCCCCCCC CCCCCCCCCCCCCCCCC |
16    |  AAAA    AAAAAAAAAAA CCCCCCCCCCCCCCCC  CCCCCCCCCCCCCCCC  |
17    | AAAA      AAAAAAAAA   CCCCCCCCCCCCCC    CCCCCCCCCCCCCC   |
18     \________________________________________________________/
19 
20 	Copyright (c) 1985 by Advanced Computer Communications
21 	720 Santa Barbara Street, Santa Barbara, California  93101
22 	(805) 963-9431
23 
24 	This software may be duplicated and used on systems
25 	which are licensed to run U.C. Berkeley versions of
26 	the UNIX operating system.  Any duplication of any
27 	part of this software must include a copy of ACC's
28 	copyright notice.
29 
30 
31 File:
32 		if_ddnreg.h
33 
34 Author:
35 		Art Berggreen
36 
37 Project:
38 		4.2 DDN X.25 network driver
39 
40 Function:
41 		This file contains definitions of the hardware
42 		interface of the ACP625 (IF-11/X25).
43 
44 Components:
45 
46 Revision History:
47 		16-May-1985:	V1.0 - First release.
48 				Art Berggreen.
49 
50 \************************************************************************/
51 
52 
53 /*	if_ddnvar.h	 V1.0	5/16/85	*/
54 
55 /*
56  * ACC IF-11/DDN-X25 interface
57  */
58 
59 struct ddnregs {			/* device registers */
60 	u_short	csr;			/* control and status register */
61 	u_char	iochn;			/* logical channel */
62 	u_char	ioadx;			/* address extension (A16,A17) */
63 	u_short	ioadl;			/* buffer address (A0-A15) */
64 	u_short	iocnt;			/* byte count */
65 	u_char	iofcn;			/* UMC funciton code */
66 	u_char	iosbf;			/* UMC subfunction code */
67 	u_char	ioini;			/* comm regs valid flag */
68 	u_char	staack;			/* interrupt acknowledge flag */
69 	u_char	ionmi;			/* NMI routine active flag */
70 	u_char	xfrgnt;			/* UMR transfer grant flag */
71 	u_char	stachn;			/* interrupt channel number */
72 	u_char	statyp;			/* interrupt type code */
73 	u_char	stacc;			/* completion function code */
74 	u_char	stacs;			/* completion subfunction code */
75 	u_short	stacnt;			/* completion byte count */
76 };
77 
78 #define	iovect	iochn
79 
80 /* defines for CSR */
81 
82 #define DDN_UER		0100000		/* UMC error condition */
83 #define DDN_NXM		0040000		/* non-existent memory error */
84 #define DDN_PER		0020000		/* UNIBUS parity error */
85 #define DDN_ZRUN	0010000		/* Z80 running */
86 #define DDN_ZGO		0004000		/* Z80 not in wait state */
87 #define DDN_MBLK	0000200		/* memory swap state (0=main, 1=srv) */
88 #define	DDN_SRV		0000100		/* select UMC service memory */
89 #define DDN_MAIN	0000040		/* select UMC main memory */
90 #define DDN_DMA		0000020		/* DMA enable */
91 #define DDN_WRT		0000010		/* DMA write enable */
92 #define DDN_IEN		0000004		/* interrupt enable */
93 #define DDN_RST		0000002		/* reset */
94 #define	DDN_NMI		0000001		/* cause NMI */
95 
96 #define DDN_BITS \
97 "\10\20UER\17NXM\16PER\15ZRUN\14ZGO\10MBLK\7SRV\6MAIN\5DMA\4WRT\3IEN\2RST\1NMI"
98 
99 /* start i/o function code definitions */
100 
101 #define DDNWRT		0	/* write to if-11 */
102 #define DDNRDB		1	/* read from if-11 */
103 #define DDNSTR		2	/* stream flag */
104 #define DDNEOS		(4|DDNSTR)  /* end of stream flag */
105 #define DDNABT		8	/* abort flag */
106 #define DDNUMR		16	/* UMR protocol flag */
107 
108 /* interrupt type definitions */
109 
110 #define DDNSACK		0	/* start i/o ack */
111 #define DDNDONE		1	/* i/o completion */
112 #define DDNXREQ		2	/* UMR protocol transfer request */
113 
114 /* i/o completion codes */
115 
116 #define DDNIOCOK	0001	/* successful completion */
117 #define DDNIOCOKP 	0002	/* successful completion, more data pending */
118 #define DDNIOCABT 	0361	/* i/o aborted */
119 #define DDNIOCERR 	0321	/* program error */
120 #define DDNIOCOVR 	0363	/* overrun error */
121 #define DDNIOCUBE 	0374	/* non-existant memory or unibus error */
122 
123 /* UMR protocol transfer grant code definitions */
124 
125 #define DDNXEVN		1	/* start with even address */
126 #define DDNXODD		2	/* start with odd address */
127 #define DDNNUMR		4	/* non-UMR transfer */
128 #define DDNXABT		8	/* abort transfer */
129