1 /* if_dmc.c 4.7 82/03/28 */ 2 3 #include "dmc.h" 4 #if NDMC > 0 5 #define printd if(dmcdebug)printf 6 int dmcdebug = 1; 7 /* 8 * DMC11 device driver, internet version 9 * 10 * TODO 11 * allow more than one outstanding read or write. 12 */ 13 14 #include "../h/param.h" 15 #include "../h/systm.h" 16 #include "../h/mbuf.h" 17 #include "../h/pte.h" 18 #include "../h/buf.h" 19 #include "../h/tty.h" 20 #include "../h/protosw.h" 21 #include "../h/socket.h" 22 #include "../h/ubareg.h" 23 #include "../h/ubavar.h" 24 #include "../h/cpu.h" 25 #include "../h/mtpr.h" 26 #include "../h/vmmac.h" 27 #include "../net/in.h" 28 #include "../net/in_systm.h" 29 #include "../net/if.h" 30 #include "../net/if_uba.h" 31 #include "../net/if_dmc.h" 32 #include "../net/ip.h" 33 #include "../net/ip_var.h" 34 35 /* 36 * Driver information for auto-configuration stuff. 37 */ 38 int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset(); 39 struct uba_device *dmcinfo[NDMC]; 40 u_short dmcstd[] = { 0 }; 41 struct uba_driver dmcdriver = 42 { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 43 44 #define DMC_AF 0xff /* 8 bits of address type in ui_flags */ 45 #define DMC_NET 0xff00 /* 8 bits of net number in ui_flags */ 46 47 /* 48 * DMC software status per interface. 49 * 50 * Each interface is referenced by a network interface structure, 51 * sc_if, which the routing code uses to locate the interface. 52 * This structure contains the output queue for the interface, its address, ... 53 * We also have, for each interface, a UBA interface structure, which 54 * contains information about the UNIBUS resources held by the interface: 55 * map registers, buffered data paths, etc. Information is cached in this 56 * structure for use by the if_uba.c routines in running the interface 57 * efficiently. 58 */ 59 struct dmc_softc { 60 struct ifnet sc_if; /* network-visible interface */ 61 struct ifuba sc_ifuba; /* UNIBUS resources */ 62 short sc_flag; /* flags */ 63 short sc_oactive; /* output active */ 64 int sc_ubinfo; /* UBA mapping info for base table */ 65 struct clist sc_que; /* command queue */ 66 } dmc_softc[NDMC]; 67 68 /* flags */ 69 #define DMCRUN 01 70 #define DMCBMAPPED 02 /* base table mapped */ 71 72 struct dmc_base { 73 short d_base[128]; /* DMC base table */ 74 } dmc_base[NDMC]; 75 76 #define loword(x) ((short *)&x)[0] 77 #define hiword(x) ((short *)&x)[1] 78 79 dmcprobe(reg) 80 caddr_t reg; 81 { 82 register int br, cvec; 83 register struct dmcdevice *addr = (struct dmcdevice *)reg; 84 register int i; 85 86 #ifdef lint 87 br = 0; cvec = br; br = cvec; 88 dmcrint(0); dmcxint(0); 89 #endif 90 addr->bsel1 = DMC_MCLR; 91 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 92 ; 93 if ((addr->bsel1 & DMC_RUN) == 0) 94 return (0); 95 addr->bsel1 &= ~DMC_MCLR; 96 addr->bsel0 = DMC_RQI|DMC_IEI; 97 DELAY(100000); 98 addr->bsel1 = DMC_MCLR; 99 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 100 ; 101 return (1); 102 } 103 104 /* 105 * Interface exists: make available by filling in network interface 106 * record. System will initialize the interface when it is ready 107 * to accept packets. 108 */ 109 dmcattach(ui) 110 register struct uba_device *ui; 111 { 112 register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 113 register struct sockaddr_in *sin; 114 115 sc->sc_if.if_unit = ui->ui_unit; 116 sc->sc_if.if_name = "dmc"; 117 sc->sc_if.if_mtu = DMCMTU; 118 sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8; 119 sc->sc_if.if_host[0] = 17; /* random number */ 120 sin = (struct sockaddr_in *)&sc->sc_if.if_addr; 121 sin->sa_family = AF_INET; 122 sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]); 123 sc->sc_if.if_init = dmcinit; 124 sc->sc_if.if_output = dmcoutput; 125 sc->sc_if.if_ubareset = dmcreset; 126 sc->sc_ifuba.ifuba_flags = UBA_NEEDBDP; 127 if_attach(&sc->sc_if); 128 } 129 130 /* 131 * Reset of interface after UNIBUS reset. 132 * If interface is on specified UBA, reset it's state. 133 */ 134 dmcreset(unit, uban) 135 int unit, uban; 136 { 137 register struct uba_device *ui; 138 139 if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 140 ui->ui_ubanum != uban) 141 return; 142 printf(" dmc%d", unit); 143 dmcinit(unit); 144 } 145 146 /* 147 * Initialization of interface; reinitialize UNIBUS usage. 148 */ 149 dmcinit(unit) 150 int unit; 151 { 152 register struct dmc_softc *sc = &dmc_softc[unit]; 153 register struct uba_device *ui = dmcinfo[unit]; 154 register struct dmcdevice *addr; 155 int base; 156 157 printd("dmcinit\n"); 158 if ((sc->sc_flag&DMCBMAPPED) == 0) { 159 sc->sc_ubinfo = uballoc(ui->ui_ubanum, 160 (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 161 sc->sc_flag |= DMCBMAPPED; 162 } 163 if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 164 (int)btoc(DMCMTU)) == 0) { 165 printf("dmc%d: can't initialize\n", unit); 166 sc->sc_if.if_flags &= ~IFF_UP; 167 return; 168 } 169 addr = (struct dmcdevice *)ui->ui_addr; 170 addr->bsel2 |= DMC_IEO; 171 base = sc->sc_ubinfo & 0x3ffff; 172 printd(" base 0x%x\n", base); 173 dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 174 dmcload(sc, DMC_CNTLI, 0, 0); 175 base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 176 dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 177 printd(" first read queued, addr 0x%x\n", base); 178 sc->sc_if.if_flags |= IFF_UP; 179 } 180 181 /* 182 * Start output on interface. Get another datagram 183 * to send from the interface queue and map it to 184 * the interface before starting output. 185 */ 186 dmcstart(dev) 187 dev_t dev; 188 { 189 int unit = minor(dev); 190 struct uba_device *ui = dmcinfo[unit]; 191 register struct dmc_softc *sc = &dmc_softc[unit]; 192 int addr, len; 193 struct mbuf *m; 194 195 printd("dmcstart\n"); 196 /* 197 * Dequeue a request and map it to the UNIBUS. 198 * If no more requests, just return. 199 */ 200 IF_DEQUEUE(&sc->sc_if.if_snd, m); 201 if (m == 0) 202 return; 203 len = if_wubaput(&sc->sc_ifuba, m); 204 205 /* 206 * Have request mapped to UNIBUS for transmission. 207 * Purge any stale data from this BDP and start the output. 208 */ 209 if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP) 210 UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 211 addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 212 printd(" len %d, addr 0x%x, ", len, addr); 213 printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 214 dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 215 sc->sc_oactive = 1; 216 } 217 218 /* 219 * Utility routine to load the DMC device registers. 220 */ 221 dmcload(sc, type, w0, w1) 222 register struct dmc_softc *sc; 223 int type, w0, w1; 224 { 225 register struct dmcdevice *addr; 226 register int unit, sps, n; 227 228 printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 229 unit = sc - dmc_softc; 230 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 231 sps = spl5(); 232 if ((n = sc->sc_que.c_cc) == 0) 233 addr->bsel0 = type | DMC_RQI; 234 else 235 (void) putc(type | DMC_RQI, &sc->sc_que); 236 (void) putw(w0, &sc->sc_que); 237 (void) putw(w1, &sc->sc_que); 238 if (n == 0) 239 dmcrint(unit); 240 splx(sps); 241 } 242 243 /* 244 * DMC interface receiver interrupt. 245 * Ready to accept another command, 246 * pull one off the command queue. 247 */ 248 dmcrint(unit) 249 int unit; 250 { 251 register struct dmc_softc *sc; 252 register struct dmcdevice *addr; 253 register int n; 254 int w0, w1; /* DEBUG */ 255 256 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 257 sc = &dmc_softc[unit]; 258 while (addr->bsel0&DMC_RDYI) { 259 w0 = getw(&sc->sc_que); /* DEBUG */ 260 addr->sel4 = w0; /* DEBUG */ 261 w1 = getw(&sc->sc_que); /* DEBUG */ 262 addr->sel6 = w1; /* DEBUG */ 263 /* DEBUG 264 addr->sel4 = getw(&sc->sc_que); 265 addr->sel6 = getw(&sc->sc_que); 266 DEBUG */ 267 addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 268 printd(" w0 0x%x, w1 0x%x\n", w0, w1); 269 while (addr->bsel0&DMC_RDYI) 270 ; 271 if (sc->sc_que.c_cc == 0) 272 return; 273 addr->bsel0 = getc(&sc->sc_que); 274 n = RDYSCAN; 275 while (n-- && (addr->bsel0&DMC_RDYI) == 0) 276 ; 277 } 278 if (sc->sc_que.c_cc) 279 addr->bsel0 |= DMC_IEI; 280 } 281 282 /* 283 * DMC interface transmitter interrupt. 284 * A transfer has completed, check for errors. 285 * If it was a read, notify appropriate protocol. 286 * If it was a write, pull the next one off the queue. 287 */ 288 dmcxint(unit) 289 int unit; 290 { 291 register struct dmc_softc *sc; 292 struct uba_device *ui = dmcinfo[unit]; 293 struct dmcdevice *addr; 294 struct mbuf *m; 295 register struct ifqueue *inq; 296 int arg, cmd, len; 297 298 addr = (struct dmcdevice *)ui->ui_addr; 299 arg = addr->sel6; 300 cmd = addr->bsel2&7; 301 addr->bsel2 &= ~DMC_RDYO; 302 sc = &dmc_softc[unit]; 303 printd("dmcxint\n"); 304 switch (cmd) { 305 306 case DMC_OUR: 307 /* 308 * A read has completed. Purge input buffered 309 * data path. Pass packet to type specific 310 * higher-level input routine. 311 */ 312 sc->sc_if.if_ipackets++; 313 if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP) 314 UBAPURGE(sc->sc_ifuba.ifu_uba, 315 sc->sc_ifuba.ifu_r.ifrw_bdp); 316 len = arg & DMC_CCOUNT; 317 printd(" read done, len %d\n", len); 318 switch (ui->ui_flags & DMC_AF) { 319 #ifdef INET 320 case AF_INET: 321 schednetisr(NETISR_IP); 322 inq = &ipintrq; 323 break; 324 #endif 325 326 default: 327 printf("dmc%d: unknown address type %d\n", unit, 328 ui->ui_flags & DMC_AF); 329 goto setup; 330 } 331 m = if_rubaget(&sc->sc_ifuba, len, 0); 332 if (m == 0) 333 goto setup; 334 if (IF_QFULL(inq)) { 335 IF_DROP(inq); 336 (void) m_freem(m); 337 } else 338 IF_ENQUEUE(inq, m); 339 340 setup: 341 arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 342 dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 343 return; 344 345 case DMC_OUX: 346 /* 347 * A write has completed, start another 348 * transfer if there is more data to send. 349 */ 350 if (sc->sc_oactive == 0) 351 return; /* SHOULD IT BE A FATAL ERROR? */ 352 printd(" write done\n"); 353 sc->sc_if.if_opackets++; 354 sc->sc_oactive = 0; 355 if (sc->sc_ifuba.ifu_xtofree) { 356 (void) m_freem(sc->sc_ifuba.ifu_xtofree); 357 sc->sc_ifuba.ifu_xtofree = 0; 358 } 359 if (sc->sc_if.if_snd.ifq_head == 0) 360 return; 361 dmcstart(unit); 362 return; 363 364 case DMC_CNTLO: 365 arg &= DMC_CNTMASK; 366 if (arg&DMC_FATAL) { 367 addr->bsel1 = DMC_MCLR; 368 sc->sc_flag &= ~DMCRUN; 369 /*** DO SOMETHING TO RESTART DEVICE ***/ 370 printf("DMC FATAL ERROR 0%o\n", arg); 371 } else { 372 /* ACCUMULATE STATISTICS */ 373 printf("DMC SOFT ERROR 0%o\n", arg); 374 } 375 return; 376 377 default: 378 printf("dmc%d: bad control %o\n", unit, cmd); 379 } 380 } 381 382 /* 383 * DMC output routine. 384 * Just send the data, header was supplied by 385 * upper level protocol routines. 386 */ 387 dmcoutput(ifp, m, dst) 388 register struct ifnet *ifp; 389 register struct mbuf *m; 390 struct sockaddr *dst; 391 { 392 struct uba_device *ui = dmcinfo[ifp->if_unit]; 393 int s; 394 395 printd("dmcoutput\n"); 396 if (dst->sa_family != (ui->ui_flags & DMC_AF)) { 397 printf("dmc%d: af%d not supported\n", ifp->if_unit, pf); 398 m_freem(m); 399 return (0); 400 } 401 s = splimp(); 402 if (IF_QFULL(&ifp->if_snd)) { 403 IF_DROP(&ifp->if_snd); 404 m_freem(m); 405 splx(s); 406 return (0); 407 } 408 IF_ENQUEUE(&ifp->if_snd, m); 409 if (dmc_softc[ifp->if_unit].sc_oactive == 0) 410 dmcstart(ifp->if_unit); 411 splx(s); 412 return (1); 413 } 414