xref: /original-bsd/sys/vax/if/if_dmc.c (revision b3b53e97)
1 /*	if_dmc.c	4.9	82/03/30	*/
2 
3 #include "dmc.h"
4 #if NDMC > 0
5 #define printd if(dmcdebug)printf
6 int dmcdebug = 1;
7 /*
8  * DMC11 device driver, internet version
9  *
10  * TODO
11  *	allow more than one outstanding read or write.
12  */
13 
14 #include "../h/param.h"
15 #include "../h/systm.h"
16 #include "../h/mbuf.h"
17 #include "../h/pte.h"
18 #include "../h/buf.h"
19 #include "../h/tty.h"
20 #include "../h/protosw.h"
21 #include "../h/socket.h"
22 #include "../h/ubareg.h"
23 #include "../h/ubavar.h"
24 #include "../h/cpu.h"
25 #include "../h/mtpr.h"
26 #include "../h/vmmac.h"
27 #include "../net/in.h"
28 #include "../net/in_systm.h"
29 #include "../net/if.h"
30 #include "../net/if_uba.h"
31 #include "../net/if_dmc.h"
32 #include "../net/ip.h"
33 #include "../net/ip_var.h"
34 #include "../net/route.h"
35 
36 /*
37  * Driver information for auto-configuration stuff.
38  */
39 int	dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset();
40 struct	uba_device *dmcinfo[NDMC];
41 u_short	dmcstd[] = { 0 };
42 struct	uba_driver dmcdriver =
43 	{ dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo };
44 
45 #define	DMC_AF	0xff		/* 8 bits of address type in ui_flags */
46 #define	DMC_NET	0xff00		/* 8 bits of net number in ui_flags */
47 
48 /*
49  * DMC software status per interface.
50  *
51  * Each interface is referenced by a network interface structure,
52  * sc_if, which the routing code uses to locate the interface.
53  * This structure contains the output queue for the interface, its address, ...
54  * We also have, for each interface, a UBA interface structure, which
55  * contains information about the UNIBUS resources held by the interface:
56  * map registers, buffered data paths, etc.  Information is cached in this
57  * structure for use by the if_uba.c routines in running the interface
58  * efficiently.
59  */
60 struct dmc_softc {
61 	struct	ifnet sc_if;		/* network-visible interface */
62 	struct	ifuba sc_ifuba;		/* UNIBUS resources */
63 	short	sc_flag;		/* flags */
64 	short	sc_oactive;		/* output active */
65 	int	sc_ubinfo;		/* UBA mapping info for base table */
66 	struct clist sc_que;		/* command queue */
67 } dmc_softc[NDMC];
68 
69 /* flags */
70 #define	DMCRUN		01
71 #define	DMCBMAPPED	02		/* base table mapped */
72 
73 struct dmc_base {
74 	short	d_base[128];		/* DMC base table */
75 } dmc_base[NDMC];
76 
77 #define	loword(x)	((short *)&x)[0]
78 #define	hiword(x)	((short *)&x)[1]
79 
80 dmcprobe(reg)
81 	caddr_t reg;
82 {
83 	register int br, cvec;
84 	register struct dmcdevice *addr = (struct dmcdevice *)reg;
85 	register int i;
86 
87 COUNT(DMCPROBE);
88 #ifdef lint
89 	br = 0; cvec = br; br = cvec;
90 	dmcrint(0); dmcxint(0);
91 #endif
92 	addr->bsel1 = DMC_MCLR;
93 	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
94 		;
95 	if ((addr->bsel1 & DMC_RUN) == 0)
96 		return (0);
97 	addr->bsel1 &= ~DMC_MCLR;
98 	addr->bsel0 = DMC_RQI|DMC_IEI;
99 	DELAY(100000);
100 	addr->bsel1 = DMC_MCLR;
101 	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
102 		;
103 	return (1);
104 }
105 
106 /*
107  * Interface exists: make available by filling in network interface
108  * record.  System will initialize the interface when it is ready
109  * to accept packets.
110  */
111 dmcattach(ui)
112 	register struct uba_device *ui;
113 {
114 	register struct dmc_softc *sc = &dmc_softc[ui->ui_unit];
115 	register struct sockaddr_in *sin;
116 
117 COUNT(DMCATTACH);
118 	sc->sc_if.if_unit = ui->ui_unit;
119 	sc->sc_if.if_name = "dmc";
120 	sc->sc_if.if_mtu = DMCMTU;
121 	sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8;
122 	sc->sc_if.if_host[0] = 17;	/* random number */
123 	sin = (struct sockaddr_in *)&sc->sc_if.if_addr;
124 	sin->sa_family = AF_INET;
125 	sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]);
126 	sc->sc_if.if_init = dmcinit;
127 	sc->sc_if.if_output = dmcoutput;
128 	sc->sc_if.if_ubareset = dmcreset;
129 	sc->sc_ifuba.ifuba_flags = UBA_NEEDBDP;
130 	if_attach(&sc->sc_if);
131 }
132 
133 /*
134  * Reset of interface after UNIBUS reset.
135  * If interface is on specified UBA, reset it's state.
136  */
137 dmcreset(unit, uban)
138 	int unit, uban;
139 {
140 	register struct uba_device *ui;
141 
142 COUNT(DMCRESET);
143 	if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 ||
144 	    ui->ui_ubanum != uban)
145 		return;
146 	printf(" dmc%d", unit);
147 	dmcinit(unit);
148 }
149 
150 /*
151  * Initialization of interface; reinitialize UNIBUS usage.
152  */
153 dmcinit(unit)
154 	int unit;
155 {
156 	register struct dmc_softc *sc = &dmc_softc[unit];
157 	register struct uba_device *ui = dmcinfo[unit];
158 	register struct dmcdevice *addr;
159 	int base;
160 
161 COUNT(DMCINIT);
162 	printd("dmcinit\n");
163 	if ((sc->sc_flag&DMCBMAPPED) == 0) {
164 		sc->sc_ubinfo = uballoc(ui->ui_ubanum,
165 		    (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0);
166 		sc->sc_flag |= DMCBMAPPED;
167 	}
168 	if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0,
169 	    (int)btoc(DMCMTU)) == 0) {
170 		printf("dmc%d: can't initialize\n", unit);
171 		sc->sc_if.if_flags &= ~IFF_UP;
172 		return;
173 	}
174 	addr = (struct dmcdevice *)ui->ui_addr;
175 	addr->bsel2 |= DMC_IEO;
176 	base = sc->sc_ubinfo & 0x3ffff;
177 	printd("  base 0x%x\n", base);
178 	dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM);
179 	dmcload(sc, DMC_CNTLI, 0, 0);
180 	base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
181 	dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU);
182 	printd("  first read queued, addr 0x%x\n", base);
183 	sc->sc_if.if_flags |= IFF_UP;
184 	/* set up routing table entry */
185 	if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) {
186 		rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr,
187 			RTF_DIRECT|RTF_HOST|RTF_UP);
188 		sc->sc_if.if_flags |= IFF_ROUTE;
189 	}
190 }
191 
192 /*
193  * Start output on interface.  Get another datagram
194  * to send from the interface queue and map it to
195  * the interface before starting output.
196  */
197 dmcstart(dev)
198 	dev_t dev;
199 {
200 	int unit = minor(dev);
201 	struct uba_device *ui = dmcinfo[unit];
202 	register struct dmc_softc *sc = &dmc_softc[unit];
203 	int addr, len;
204 	struct mbuf *m;
205 
206 COUNT(DMCSTART);
207 	printd("dmcstart\n");
208 	/*
209 	 * Dequeue a request and map it to the UNIBUS.
210 	 * If no more requests, just return.
211 	 */
212 	IF_DEQUEUE(&sc->sc_if.if_snd, m);
213 	if (m == 0)
214 		return;
215 	len = if_wubaput(&sc->sc_ifuba, m);
216 
217 	/*
218 	 * Have request mapped to UNIBUS for transmission.
219 	 * Purge any stale data from this BDP and start the output.
220 	 */
221 	if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP)
222 		UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp);
223 	addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff;
224 	printd("  len %d, addr 0x%x, ", len, addr);
225 	printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]);
226 	dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM));
227 	sc->sc_oactive = 1;
228 }
229 
230 /*
231  * Utility routine to load the DMC device registers.
232  */
233 dmcload(sc, type, w0, w1)
234 	register struct dmc_softc *sc;
235 	int type, w0, w1;
236 {
237 	register struct dmcdevice *addr;
238 	register int unit, sps, n;
239 
240 COUNT(DMCLOAD);
241 	printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1);
242 	unit = sc - dmc_softc;
243 	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
244 	sps = spl5();
245 	if ((n = sc->sc_que.c_cc) == 0)
246 		addr->bsel0 = type | DMC_RQI;
247 	else
248 		(void) putc(type | DMC_RQI, &sc->sc_que);
249 	(void) putw(w0, &sc->sc_que);
250 	(void) putw(w1, &sc->sc_que);
251 	if (n == 0)
252 		dmcrint(unit);
253 	splx(sps);
254 }
255 
256 /*
257  * DMC interface receiver interrupt.
258  * Ready to accept another command,
259  * pull one off the command queue.
260  */
261 dmcrint(unit)
262 	int unit;
263 {
264 	register struct dmc_softc *sc;
265 	register struct dmcdevice *addr;
266 	register int n;
267 	int w0, w1; /* DEBUG */
268 
269 COUNT(DMCRINT);
270 	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
271 	sc = &dmc_softc[unit];
272 	while (addr->bsel0&DMC_RDYI) {
273 		w0 = getw(&sc->sc_que); /* DEBUG */
274 		addr->sel4 = w0; /* DEBUG */
275 		w1 = getw(&sc->sc_que); /* DEBUG */
276 		addr->sel6 = w1; /* DEBUG */
277 		/* DEBUG
278 		addr->sel4 = getw(&sc->sc_que);
279 		addr->sel6 = getw(&sc->sc_que);
280 		DEBUG */
281 		addr->bsel0 &= ~(DMC_IEI|DMC_RQI);
282 		printd("  w0 0x%x, w1 0x%x\n", w0, w1);
283 		while (addr->bsel0&DMC_RDYI)
284 			;
285 		if (sc->sc_que.c_cc == 0)
286 			return;
287 		addr->bsel0 = getc(&sc->sc_que);
288 		n = RDYSCAN;
289 		while (n-- && (addr->bsel0&DMC_RDYI) == 0)
290 			;
291 	}
292 	if (sc->sc_que.c_cc)
293 		addr->bsel0 |= DMC_IEI;
294 }
295 
296 /*
297  * DMC interface transmitter interrupt.
298  * A transfer has completed, check for errors.
299  * If it was a read, notify appropriate protocol.
300  * If it was a write, pull the next one off the queue.
301  */
302 dmcxint(unit)
303 	int unit;
304 {
305 	register struct dmc_softc *sc;
306 	struct uba_device *ui = dmcinfo[unit];
307 	struct dmcdevice *addr;
308 	struct mbuf *m;
309 	register struct ifqueue *inq;
310 	int arg, cmd, len;
311 
312 COUNT(DMCXINT);
313 	addr = (struct dmcdevice *)ui->ui_addr;
314 	arg = addr->sel6;
315 	cmd = addr->bsel2&7;
316 	addr->bsel2 &= ~DMC_RDYO;
317 	sc = &dmc_softc[unit];
318 	printd("dmcxint\n");
319 	switch (cmd) {
320 
321 	case DMC_OUR:
322 		/*
323 		 * A read has completed.  Purge input buffered
324 		 * data path.  Pass packet to type specific
325 		 * higher-level input routine.
326 		 */
327 		sc->sc_if.if_ipackets++;
328 		if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP)
329 			UBAPURGE(sc->sc_ifuba.ifu_uba,
330 				sc->sc_ifuba.ifu_r.ifrw_bdp);
331 		len = arg & DMC_CCOUNT;
332 		printd("  read done, len %d\n", len);
333 		switch (ui->ui_flags & DMC_AF) {
334 #ifdef INET
335 		case AF_INET:
336 			schednetisr(NETISR_IP);
337 			inq = &ipintrq;
338 			break;
339 #endif
340 
341 		default:
342 			printf("dmc%d: unknown address type %d\n", unit,
343 			    ui->ui_flags & DMC_AF);
344 			goto setup;
345 		}
346 		m = if_rubaget(&sc->sc_ifuba, len, 0);
347 		if (m == 0)
348 			goto setup;
349 		if (IF_QFULL(inq)) {
350 			IF_DROP(inq);
351 			(void) m_freem(m);
352 		} else
353 			IF_ENQUEUE(inq, m);
354 
355 setup:
356 		arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
357 		dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU);
358 		return;
359 
360 	case DMC_OUX:
361 		/*
362 		 * A write has completed, start another
363 		 * transfer if there is more data to send.
364 		 */
365 		if (sc->sc_oactive == 0)
366 			return;		/* SHOULD IT BE A FATAL ERROR? */
367 		printd("  write done\n");
368 		sc->sc_if.if_opackets++;
369 		sc->sc_oactive = 0;
370 		if (sc->sc_ifuba.ifu_xtofree) {
371 			(void) m_freem(sc->sc_ifuba.ifu_xtofree);
372 			sc->sc_ifuba.ifu_xtofree = 0;
373 		}
374 		if (sc->sc_if.if_snd.ifq_head == 0)
375 			return;
376 		dmcstart(unit);
377 		return;
378 
379 	case DMC_CNTLO:
380 		arg &= DMC_CNTMASK;
381 		if (arg&DMC_FATAL) {
382 			addr->bsel1 = DMC_MCLR;
383 			sc->sc_flag &= ~DMCRUN;
384 			/*** DO SOMETHING TO RESTART DEVICE ***/
385 			printf("DMC FATAL ERROR 0%o\n", arg);
386 		} else {
387 			/* ACCUMULATE STATISTICS */
388 			printf("DMC SOFT ERROR 0%o\n", arg);
389 		}
390 		return;
391 
392 	default:
393 		printf("dmc%d: bad control %o\n", unit, cmd);
394 	}
395 }
396 
397 /*
398  * DMC output routine.
399  * Just send the data, header was supplied by
400  * upper level protocol routines.
401  */
402 dmcoutput(ifp, m, dst)
403 	register struct ifnet *ifp;
404 	register struct mbuf *m;
405 	struct sockaddr *dst;
406 {
407 	struct uba_device *ui = dmcinfo[ifp->if_unit];
408 	int s;
409 
410 COUNT(DMCOUTPUT);
411 	printd("dmcoutput\n");
412 	if (dst->sa_family != (ui->ui_flags & DMC_AF)) {
413 		printf("dmc%d: af%d not supported\n", ifp->if_unit, pf);
414 		m_freem(m);
415 		return (0);
416 	}
417 	s = splimp();
418 	if (IF_QFULL(&ifp->if_snd)) {
419 		IF_DROP(&ifp->if_snd);
420 		m_freem(m);
421 		splx(s);
422 		return (0);
423 	}
424 	IF_ENQUEUE(&ifp->if_snd, m);
425 	if (dmc_softc[ifp->if_unit].sc_oactive == 0)
426 		dmcstart(ifp->if_unit);
427 	splx(s);
428 	return (1);
429 }
430