xref: /original-bsd/sys/vax/if/if_ecreg.h (revision a95f03a8)
1 /*
2  * Copyright (c) 1982, 1986 Regents of the University of California.
3  * All rights reserved.
4  *
5  * %sccs.include.redist.c%
6  *
7  *	@(#)if_ecreg.h	7.4 (Berkeley) 06/28/90
8  */
9 
10 /*
11  * 3Com Ethernet controller registers.
12  */
13 struct ecdevice {
14 	short	ec_rcr;		/* Receive Control Register */
15 	short	ec_xcr;		/* Transmit Control Register */
16 };
17 
18 /*
19  * Control and status bits -- rcr
20  */
21 #define	EC_SPIE		0x8000		/* set parity interrupt enable */
22 #define	EC_ASTEP	0x4000		/* increment address counter */
23 #define	EC_AROM		0x2000		/* 1: Use address ROM, 0: use RAM */
24 #define	EC_PE		0x2000		/* Parity error */
25 #define	EC_AWCLK	0x1000		/* address write clock bit */
26 #define	EC_PIE		0x1000		/* Parity interrupt enable (read) */
27 #define	EC_ADATA	0x0f00		/* address/filtering */
28 #define	EC_RDONE	0x0080		/* receive done */
29 #define	EC_MDISAB	0x0080		/* memory disable */
30 #define	EC_RINTEN	0x0040		/* receive interrupt enable */
31 #define	EC_RCLR		0x0020		/* clear RDONE bit */
32 #define	EC_RWBN		0x0010		/* submit buffer for receive */
33 #define	EC_RBN		0x000f		/* buffer number */
34 
35 #define	EC_RBITS	"\10\16PE\15PIE\10RDONE\7RINTEN"
36 
37 /*
38  * Control and status bits -- xcr
39  */
40 #define	EC_JAM		0x8000		/* collision dectected */
41 #define	EC_JINTEN	0x4000		/* collision interrupt enable */
42 #define	EC_JCLR		0x2000		/* clear collision detect */
43 #define	EC_UECLR	0x0100		/* reset controller */
44 #define	EC_XDONE	0x0080		/* transmit done */
45 #define	EC_XINTEN	0x0040		/* transmit interrupt enable */
46 #define	EC_XCLR		0x0020		/* clear XDONE bit */
47 #define	EC_XWBN		0x0010		/* submit buffer for transmit */
48 #define	EC_XBN		0x000f		/* buffer number */
49 
50 #define	EC_XBITS	"\10\20JAM\17JINTEN\10XDONE\7XINTEN"
51 
52 /*
53  * Useful combinations
54  */
55 #define	EC_READ		(0x600|EC_RINTEN|EC_RWBN)
56 #define	EC_MULTI	(0x700|EC_RINTEN|EC_RWBN)
57 #define EC_PROMISC	(0x000|EC_RINTEN|EC_RWBN)
58 #define	EC_WRITE	(EC_JINTEN|EC_XINTEN|EC_XWBN)
59 #define	EC_CLEAR	(EC_JINTEN|EC_XINTEN|EC_JCLR)
60 
61 /*
62  * Buffer number definitions
63  */
64 #define	ECTBF		0		/* Buffer for transmit */
65 #define	ECRLBF		1		/* First buffer for receive */
66 #define	ECRHBF		15		/* Last buffer for receive */
67 
68 #define	ECRDOFF		528		/* Packet offset in read buffer */
69