xref: /original-bsd/sys/vax/if/if_exreg.h (revision 2301fdfb)
1 /*
2  * Copyright (c) 1982, 1986 Regents of the University of California.
3  * All rights reserved.
4  *
5  * This code is derived from software contributed to Berkeley by
6  * Excelan Inc.
7  *
8  * Redistribution and use in source and binary forms are permitted
9  * provided that the above copyright notice and this paragraph are
10  * duplicated in all such forms and that any documentation,
11  * advertising materials, and other materials related to such
12  * distribution and use acknowledge that the software was developed
13  * by the University of California, Berkeley.  The name of the
14  * University may not be used to endorse or promote products derived
15  * from this software without specific prior written permission.
16  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
18  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
19  *
20  *	@(#)if_exreg.h	7.2 (Berkeley) 08/04/88
21  */
22 
23 struct	exdevice {
24 	char	xd_porta;	/* write on porta resets EXOS */
25 	char	xd_pad_a;
26 	char	xd_portb;	/* write on portb interrupts EXOS */
27 				/* read on portb returns status bits */
28 	char	xd_pad_b;
29 };
30 
31 /* EXOS I/O PORT A write definitions */
32 #define	EX_RESET	0	/* value doesn't really matter... */
33 
34 /* EXOS I/O PORT B write definitions */
35 #define	EX_NTRUPT	0
36 
37 /* EXOS I/O PORT B read definitions */
38 #define	EX_TESTOK	1	/* set when self-diagnostics passed */
39 #define	EX_UNREADY	(1<<3)	/* set until EXOS ready to read from B */
40 
41 /* message buffer status field definitions */
42 #define	MH_OWNER	1	/* mask for status bit for owner */
43 #define	MH_HOST		0	/* if 0, the host owns the buffer */
44 #define	MH_EXOS		1	/* if 1, the EXOS owns the buffer */
45 
46 /* EXOS Link Level request codes */
47 #define	LLTRANSMIT	0xC	/* send a packet */
48 #define	LLRTRANSMIT	0xE	/* send a packet, and self-receive */
49 #define	LLRECEIVE	0xD	/* receive a packet */
50 #define	LLNET_MODE	0x8	/* read/write mode control objects */
51 #define	LLNET_ADDRS	0x9	/* read/write receive address slots */
52 #define	LLNET_RECV	0xA	/* read/alter receive slot enable bit */
53 #define	LLNET_STSTCS	0xB	/* read/reset network statistics objects */
54 
55 /* Link Level return codes common to all requests */
56 #define	LL_OK		0	/* successful completion */
57 #define	LLX_MODE	0xA1	/* EXOS not in link level mode (impossible) */
58 
59 /* LLTRANSMIT unique return codes */
60 #define	LLXM_1RTRY	0x1	/* successful xmission, 1 retry */
61 #define	LLXM_RTRYS	0x2	/* successful xmission, more than 1 retry */
62 #define	LLXM_NSQE	0x8	/* successful xmission, no SQE TEST signal */
63 #define	LLXM_CLSN	0x10	/* xmission failed, excess retries */
64 #define	LLXM_NCS	0x20	/* xmission failed, no carrier sense */
65 #define	LLXM_LNGTH	0x40	/* xmission failed, bad packet length */
66 #define	XMIT_BITS	"\7\7LENGTH\6CARRIER\5XCLSNS\4SQETST"
67 #define	LLXM_ERROR	(LLXM_NSQE|LLXM_CLSN|LLXM_NCS|LLXM_LNGTH)
68 
69 /* LLRECEIVE unique return codes */
70 #define	LLRC_TRUNC	0x4	/* pkt received, but truncated to fit buffer */
71 #define	LLRC_ALIGN	0x10	/* pkt received, but with alignment error */
72 #define	LLRC_CRC	0x20	/* pkt received, but with CRC error */
73 #define	LLRC_BUFLEN	0x40	/* no pkt received, buffer less than 64 bytes */
74 				/* this should never happen here */
75 #define	RECV_BITS	"\7\7BUFLEN\6CRC\5ALIGN\3TRUNC"
76 
77 /* LLNET_ADDRS unique return codes */
78 #define	LLNA_BADSLOT	0xD1	/* slot doesn't exist or can't be accessed */
79 #define	LLNA_BADADDR	0xD3	/* invalid address for designated slot */
80 
81 /* LLNET_RECV unique return codes */
82 #define	LLNR_BADSLOT	0xD1	/* slot doesn't exist or can't be accessed */
83 #define	LLNR_BADADDR	0xD2	/* designated slot was empty */
84 
85 /* address slot object indices */
86 #define	NULLSLOT	0	/* the null slot */
87 #define	MINMCSLOT	1	/* minimum multicast slot index */
88 #define	MAXMCSLOT	8	/* default maximum multicast slot index */
89 #define	PHYSSLOT	253	/* physical slot index */
90 #define	UNVRSSLOT	254	/* universal slot index */
91 #define	BROADSLOT	255	/* broadcast slot index */
92 
93 /* request mask bit definitions */
94 #define	WRITE_OBJ	1	/* write the object */
95 #define	READ_OBJ	2	/* read the object */
96 #define	ENABLE_RCV	4	/* enable reception on designated slot */
97 
98 /* NET_MODE options mask bit definitions */
99 #define	OPT_ALIGN	0x10	/* receive packets with alignment errors */
100 #define	OPT_CRC		0x20	/* receive packets with CRC errors */
101 #define	OPT_DSABLE	0x80	/* disconnect controller hardware */
102 
103 /* NET_MODE mode field value definitions */
104 #define	MODE_OFF	0	/* stop transmission and reception */
105 #define	MODE_PERF	1	/* perfect multicast address filtering */
106 #define	MODE_HW		2	/* hardware-only multicast address filtering */
107 #define	MODE_PROM	3	/* promiscuous reception */
108 
109 #define	NFRAGMENTS 1	/* number fragments that the EXOS will scatter/gather */
110 #define	EXMAXRBUF 1520	/* per EXOS 101 manual 5.3.7 (maybe 1518 would do) */
111 
112 /*
113  * N.B.  Structures below are carefully constructed so that
114  * they correspond to the message formats that NX firmware
115  * defines.  None of them should contain any compiler-instigated
116  * padding.  Be especially careful about VAX C longword alignment!
117  */
118 
119 struct	stat_array {
120 	u_long	sa_fsent;	/* frames sent without errors */
121 	u_long	sa_xsclsn;	/* frames aborted excess collisions */
122 	u_long	sa_nsqe;	/* frames subject to heartbeat failure */
123 	u_long	sa_undef;	/* undefined (TDR on EXOS 101) */
124 	u_long	sa_frcvd;	/* frames received no errors */
125 	u_long	sa_align;	/* frames received alignment error */
126 	u_long	sa_crc;		/* frames received crc error */
127 	u_long	sa_flost;	/* frames lost */
128 };
129 
130 struct	buf_blk {		/* packet/buffer block descriptor */
131 	u_short	bb_len;			/* length of block, in bytes */
132 	u_short	bb_addr[2];		/* address of block */
133 	/*
134 	 * Array above is really a single u_long field.
135 	 * We kludge its definition to defeat word-alignment.
136 	 * Access would look like:
137 	 *     longaddr = *(u_long *)bp->.mb_er.er_blks[0].bb_addr;
138 	 */
139 };
140 
141 struct	net_mode {		/* read/write mode control objects */
142 /*12*/	u_char	nm_rqst;	/* request code */
143 /*13*/	u_char	nm_rply;	/* reply code */
144 /*14*/	u_char	nm_mask;		/* bit-wise switches for read, write */
145 /*15*/	u_char	nm_optn;		/* acceptable packet reception errors */
146 /*16*/	u_char	nm_mode;		/* EXOS filtering mode */
147 /*17*/
148 };
149 
150 struct	net_addrs {		/* read/write receive address slots */
151 /*12*/	u_char	na_rqst;	/* request code */
152 /*13*/	u_char	na_rply;	/* reply code */
153 /*14*/	u_char	na_mask;		/* bit-wise switches for read, write */
154 /*15*/	u_char	na_slot;		/* index of address slot */
155 /*16*/	u_char	na_addrs[6];		/* address read and/or written */
156 /*22*/
157 };
158 
159 struct	net_recv {		/* read/alter receive slot enable bit */
160 /*12*/	u_char	nr_rqst;	/* request code */
161 /*13*/	u_char	nr_rply;	/* reply code */
162 /*14*/	u_char	nr_mask;		/* bit-wise switches for read, write */
163 /*15*/	u_char	nr_slot;		/* index of address slot */
164 /*16*/
165 };
166 
167 struct	net_ststcs {		/* read/reset network statistics objects */
168 /*12*/	u_char	ns_rqst;	/* request code */
169 /*13*/	u_char	ns_rply;	/* reply code */
170 /*14*/	u_char	ns_mask;		/* bit-wise switches for read, write */
171 /*15*/	u_char	ns_rsrv;		/* reserved for EXOS */
172 /*16*/	u_short	ns_nobj;		/* number of objects to work on */
173 /*18*/	u_short	ns_xobj;		/* index of first object to work on */
174 /*20*/	u_long	ns_bufp;		/* pointer to statistics buffer */
175 /*24*/
176 };
177 
178 struct	enet_xmit {		/* send a packet on the Ethernet */
179 /*12*/	u_char	et_rqst;	/* request code */
180 /*13*/	u_char	et_rply;	/* reply code */
181 /*14*/	u_char	et_slot;		/* address slot matching dest address */
182 /*15*/	u_char	et_nblock;		/* number of blocks composing packet */
183 /*16*/	struct	buf_blk et_blks[NFRAGMENTS];	/* array of block descriptors */
184 /*22-64*/
185 };
186 
187 struct	enet_recv {		/* receive a packet on the Ethernet */
188 /*12*/	u_char	er_rqst;	/* request code */
189 /*13*/	u_char	er_rply;	/* reply code */
190 /*14*/	u_char	er_slot;		/* address slot matching dest address */
191 /*15*/	u_char	er_nblock;		/* number of blocks composing buffer */
192 /*16*/	struct	buf_blk er_blks[NFRAGMENTS];	/* array of block descriptors */
193 /*22-64*/
194 };
195 
196 /* we send requests and receive replys with the EXOS using this structure */
197 struct	ex_msg {
198 /*00*/	u_short	mb_link;	/* address of next message buffer */
199 /*02*/	u_char	mb_rsrv;	/* reserved for use by EXOS */
200 /*03*/	u_char	mb_status;	/* used bit-wise for message protocol */
201 /*04*/	u_short	mb_length;	/* length, in bytes, of the rest */
202 /*06*/	short	mb_1rsrv;	/* reserved for used by EXOS */
203 /*08*/	long	mb_mid;		/* available to user */
204 /*12*/	union	mb_all {
205 		struct	net_mode	mb_net_mode;
206 		struct	net_addrs	mb_net_addrs;
207 		struct	net_recv	mb_net_recv;
208 		struct	net_ststcs	mb_net_ststcs;
209 		struct	enet_xmit	mb_enet_xmit;
210 		struct	enet_recv	mb_enet_recv;
211 	} mb_all;
212 /* following field is used only by host, not read by board */
213 	struct	ex_msg *mb_next;	/* host's pointer to next message */
214 };
215 #define	mb_nm	mb_all.mb_net_mode
216 #define	mb_na	mb_all.mb_net_addrs
217 #define	mb_nr	mb_all.mb_net_recv
218 #define	mb_ns	mb_all.mb_net_ststcs
219 #define	mb_et	mb_all.mb_enet_xmit
220 #define	mb_er	mb_all.mb_enet_recv
221 #define	mb_rqst	mb_nm.nm_rqst
222 #define	mb_rply	mb_nm.nm_rply
223 #define	MBDATALEN (sizeof(union mb_all)+6)
224 
225 struct	confmsg {
226 /*00*/	u_short	cm_1rsrv;	/* reserved, must be 1 */
227 /*02*/	char	cm_vc[4];	/* returns ASCII version code */
228 /*06*/	u_char	cm_cc;		/* returns config completion code */
229 /*07*/	u_char	cm_opmode;	/* specifies operation mode */
230 /*08*/	u_short	cm_dfo;		/* specifies host data format option */
231 /*10*/	u_char	cm_dcn1;	/* reserved, must be 1 */
232 /*11*/	u_char	cm_2rsrv[2];	/* reserved, must be 0 */
233 /*13*/	u_char	cm_ham;		/* specifies host address mode */
234 /*14*/	u_char	cm_3rsrv;	/* reserved, must be 0 */
235 /*15*/	u_char	cm_mapsiz;	/* reserved, must be 0 */
236 /*16*/	u_char	cm_byteptrn[4];	/* host data format option test pattern */
237 /*20*/	u_short	cm_wordptrn[2];
238 /*24*/	u_long	cm_lwordptrn;
239 /*28*/	u_char	cm_rsrvd[20];
240 /*48*/	u_long	cm_mba;		/* use 0xFFFFFFFF in link level mode */
241 /*52*/	u_char	cm_nproc;	/* use 0xFF in link level mode */
242 /*53*/	u_char	cm_nmbox;	/* use 0xFF in link level mode */
243 /*54*/	u_char	cm_nmcast;	/* use 0xFF in link level mode */
244 /*55*/	u_char	cm_nhost;	/* use 1 in link level mode */
245 
246 	/* the next five parameters define the request message queue */
247 /*56*/	u_long	cm_h2xba;	/* base address of message queue */
248 /*60*/	u_short	cm_h2xhdr;	/* address offset of msg Q header */
249 /*62*/	u_char	cm_h2xtyp;	/* interrupt type */
250 /*63*/	u_char	cm_h2xval;	/* interrupt value (not used) */
251 /*64*/	u_short	cm_h2xaddr;	/* interrupt vector */
252 /*66*/	u_short	cm_h2xpad;	/* pad out unused portion of vector */
253 
254 	/* the next five parameters define the reply message queue */
255 /*68*/	u_long	cm_x2hba;	/* base address of message queue */
256 /*72*/	u_short	cm_x2hhdr;	/* address offset of msg Q header */
257 /*74*/	u_char	cm_x2htyp;	/* interrupt type */
258 /*75*/	u_char	cm_x2hval;	/* interrupt value (not used) */
259 /*76*/	u_short	cm_x2haddr;	/* interrupt vector */
260 /*78*/	u_short	cm_x2hpad;	/* pad out unused portion of vector */
261 /*80*/
262 };
263 
264