1 /* 2 * Copyright (c) 1982, 1986 Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * Excelan Inc. 7 * 8 * %sccs.include.redist.c% 9 * 10 * @(#)if_exreg.h 7.3 (Berkeley) 06/28/90 11 */ 12 13 struct exdevice { 14 char xd_porta; /* write on porta resets EXOS */ 15 char xd_pad_a; 16 char xd_portb; /* write on portb interrupts EXOS */ 17 /* read on portb returns status bits */ 18 char xd_pad_b; 19 }; 20 21 /* EXOS I/O PORT A write definitions */ 22 #define EX_RESET 0 /* value doesn't really matter... */ 23 24 /* EXOS I/O PORT B write definitions */ 25 #define EX_NTRUPT 0 26 27 /* EXOS I/O PORT B read definitions */ 28 #define EX_TESTOK 1 /* set when self-diagnostics passed */ 29 #define EX_UNREADY (1<<3) /* set until EXOS ready to read from B */ 30 31 /* message buffer status field definitions */ 32 #define MH_OWNER 1 /* mask for status bit for owner */ 33 #define MH_HOST 0 /* if 0, the host owns the buffer */ 34 #define MH_EXOS 1 /* if 1, the EXOS owns the buffer */ 35 36 /* EXOS Link Level request codes */ 37 #define LLTRANSMIT 0xC /* send a packet */ 38 #define LLRTRANSMIT 0xE /* send a packet, and self-receive */ 39 #define LLRECEIVE 0xD /* receive a packet */ 40 #define LLNET_MODE 0x8 /* read/write mode control objects */ 41 #define LLNET_ADDRS 0x9 /* read/write receive address slots */ 42 #define LLNET_RECV 0xA /* read/alter receive slot enable bit */ 43 #define LLNET_STSTCS 0xB /* read/reset network statistics objects */ 44 45 /* Link Level return codes common to all requests */ 46 #define LL_OK 0 /* successful completion */ 47 #define LLX_MODE 0xA1 /* EXOS not in link level mode (impossible) */ 48 49 /* LLTRANSMIT unique return codes */ 50 #define LLXM_1RTRY 0x1 /* successful xmission, 1 retry */ 51 #define LLXM_RTRYS 0x2 /* successful xmission, more than 1 retry */ 52 #define LLXM_NSQE 0x8 /* successful xmission, no SQE TEST signal */ 53 #define LLXM_CLSN 0x10 /* xmission failed, excess retries */ 54 #define LLXM_NCS 0x20 /* xmission failed, no carrier sense */ 55 #define LLXM_LNGTH 0x40 /* xmission failed, bad packet length */ 56 #define XMIT_BITS "\7\7LENGTH\6CARRIER\5XCLSNS\4SQETST" 57 #define LLXM_ERROR (LLXM_NSQE|LLXM_CLSN|LLXM_NCS|LLXM_LNGTH) 58 59 /* LLRECEIVE unique return codes */ 60 #define LLRC_TRUNC 0x4 /* pkt received, but truncated to fit buffer */ 61 #define LLRC_ALIGN 0x10 /* pkt received, but with alignment error */ 62 #define LLRC_CRC 0x20 /* pkt received, but with CRC error */ 63 #define LLRC_BUFLEN 0x40 /* no pkt received, buffer less than 64 bytes */ 64 /* this should never happen here */ 65 #define RECV_BITS "\7\7BUFLEN\6CRC\5ALIGN\3TRUNC" 66 67 /* LLNET_ADDRS unique return codes */ 68 #define LLNA_BADSLOT 0xD1 /* slot doesn't exist or can't be accessed */ 69 #define LLNA_BADADDR 0xD3 /* invalid address for designated slot */ 70 71 /* LLNET_RECV unique return codes */ 72 #define LLNR_BADSLOT 0xD1 /* slot doesn't exist or can't be accessed */ 73 #define LLNR_BADADDR 0xD2 /* designated slot was empty */ 74 75 /* address slot object indices */ 76 #define NULLSLOT 0 /* the null slot */ 77 #define MINMCSLOT 1 /* minimum multicast slot index */ 78 #define MAXMCSLOT 8 /* default maximum multicast slot index */ 79 #define PHYSSLOT 253 /* physical slot index */ 80 #define UNVRSSLOT 254 /* universal slot index */ 81 #define BROADSLOT 255 /* broadcast slot index */ 82 83 /* request mask bit definitions */ 84 #define WRITE_OBJ 1 /* write the object */ 85 #define READ_OBJ 2 /* read the object */ 86 #define ENABLE_RCV 4 /* enable reception on designated slot */ 87 88 /* NET_MODE options mask bit definitions */ 89 #define OPT_ALIGN 0x10 /* receive packets with alignment errors */ 90 #define OPT_CRC 0x20 /* receive packets with CRC errors */ 91 #define OPT_DSABLE 0x80 /* disconnect controller hardware */ 92 93 /* NET_MODE mode field value definitions */ 94 #define MODE_OFF 0 /* stop transmission and reception */ 95 #define MODE_PERF 1 /* perfect multicast address filtering */ 96 #define MODE_HW 2 /* hardware-only multicast address filtering */ 97 #define MODE_PROM 3 /* promiscuous reception */ 98 99 #define NFRAGMENTS 1 /* number fragments that the EXOS will scatter/gather */ 100 #define EXMAXRBUF 1520 /* per EXOS 101 manual 5.3.7 (maybe 1518 would do) */ 101 102 /* 103 * N.B. Structures below are carefully constructed so that 104 * they correspond to the message formats that NX firmware 105 * defines. None of them should contain any compiler-instigated 106 * padding. Be especially careful about VAX C longword alignment! 107 */ 108 109 struct stat_array { 110 u_long sa_fsent; /* frames sent without errors */ 111 u_long sa_xsclsn; /* frames aborted excess collisions */ 112 u_long sa_nsqe; /* frames subject to heartbeat failure */ 113 u_long sa_undef; /* undefined (TDR on EXOS 101) */ 114 u_long sa_frcvd; /* frames received no errors */ 115 u_long sa_align; /* frames received alignment error */ 116 u_long sa_crc; /* frames received crc error */ 117 u_long sa_flost; /* frames lost */ 118 }; 119 120 struct buf_blk { /* packet/buffer block descriptor */ 121 u_short bb_len; /* length of block, in bytes */ 122 u_short bb_addr[2]; /* address of block */ 123 /* 124 * Array above is really a single u_long field. 125 * We kludge its definition to defeat word-alignment. 126 * Access would look like: 127 * longaddr = *(u_long *)bp->.mb_er.er_blks[0].bb_addr; 128 */ 129 }; 130 131 struct net_mode { /* read/write mode control objects */ 132 /*12*/ u_char nm_rqst; /* request code */ 133 /*13*/ u_char nm_rply; /* reply code */ 134 /*14*/ u_char nm_mask; /* bit-wise switches for read, write */ 135 /*15*/ u_char nm_optn; /* acceptable packet reception errors */ 136 /*16*/ u_char nm_mode; /* EXOS filtering mode */ 137 /*17*/ 138 }; 139 140 struct net_addrs { /* read/write receive address slots */ 141 /*12*/ u_char na_rqst; /* request code */ 142 /*13*/ u_char na_rply; /* reply code */ 143 /*14*/ u_char na_mask; /* bit-wise switches for read, write */ 144 /*15*/ u_char na_slot; /* index of address slot */ 145 /*16*/ u_char na_addrs[6]; /* address read and/or written */ 146 /*22*/ 147 }; 148 149 struct net_recv { /* read/alter receive slot enable bit */ 150 /*12*/ u_char nr_rqst; /* request code */ 151 /*13*/ u_char nr_rply; /* reply code */ 152 /*14*/ u_char nr_mask; /* bit-wise switches for read, write */ 153 /*15*/ u_char nr_slot; /* index of address slot */ 154 /*16*/ 155 }; 156 157 struct net_ststcs { /* read/reset network statistics objects */ 158 /*12*/ u_char ns_rqst; /* request code */ 159 /*13*/ u_char ns_rply; /* reply code */ 160 /*14*/ u_char ns_mask; /* bit-wise switches for read, write */ 161 /*15*/ u_char ns_rsrv; /* reserved for EXOS */ 162 /*16*/ u_short ns_nobj; /* number of objects to work on */ 163 /*18*/ u_short ns_xobj; /* index of first object to work on */ 164 /*20*/ u_long ns_bufp; /* pointer to statistics buffer */ 165 /*24*/ 166 }; 167 168 struct enet_xmit { /* send a packet on the Ethernet */ 169 /*12*/ u_char et_rqst; /* request code */ 170 /*13*/ u_char et_rply; /* reply code */ 171 /*14*/ u_char et_slot; /* address slot matching dest address */ 172 /*15*/ u_char et_nblock; /* number of blocks composing packet */ 173 /*16*/ struct buf_blk et_blks[NFRAGMENTS]; /* array of block descriptors */ 174 /*22-64*/ 175 }; 176 177 struct enet_recv { /* receive a packet on the Ethernet */ 178 /*12*/ u_char er_rqst; /* request code */ 179 /*13*/ u_char er_rply; /* reply code */ 180 /*14*/ u_char er_slot; /* address slot matching dest address */ 181 /*15*/ u_char er_nblock; /* number of blocks composing buffer */ 182 /*16*/ struct buf_blk er_blks[NFRAGMENTS]; /* array of block descriptors */ 183 /*22-64*/ 184 }; 185 186 /* we send requests and receive replys with the EXOS using this structure */ 187 struct ex_msg { 188 /*00*/ u_short mb_link; /* address of next message buffer */ 189 /*02*/ u_char mb_rsrv; /* reserved for use by EXOS */ 190 /*03*/ u_char mb_status; /* used bit-wise for message protocol */ 191 /*04*/ u_short mb_length; /* length, in bytes, of the rest */ 192 /*06*/ short mb_1rsrv; /* reserved for used by EXOS */ 193 /*08*/ long mb_mid; /* available to user */ 194 /*12*/ union mb_all { 195 struct net_mode mb_net_mode; 196 struct net_addrs mb_net_addrs; 197 struct net_recv mb_net_recv; 198 struct net_ststcs mb_net_ststcs; 199 struct enet_xmit mb_enet_xmit; 200 struct enet_recv mb_enet_recv; 201 } mb_all; 202 /* following field is used only by host, not read by board */ 203 struct ex_msg *mb_next; /* host's pointer to next message */ 204 }; 205 #define mb_nm mb_all.mb_net_mode 206 #define mb_na mb_all.mb_net_addrs 207 #define mb_nr mb_all.mb_net_recv 208 #define mb_ns mb_all.mb_net_ststcs 209 #define mb_et mb_all.mb_enet_xmit 210 #define mb_er mb_all.mb_enet_recv 211 #define mb_rqst mb_nm.nm_rqst 212 #define mb_rply mb_nm.nm_rply 213 #define MBDATALEN (sizeof(union mb_all)+6) 214 215 struct confmsg { 216 /*00*/ u_short cm_1rsrv; /* reserved, must be 1 */ 217 /*02*/ char cm_vc[4]; /* returns ASCII version code */ 218 /*06*/ u_char cm_cc; /* returns config completion code */ 219 /*07*/ u_char cm_opmode; /* specifies operation mode */ 220 /*08*/ u_short cm_dfo; /* specifies host data format option */ 221 /*10*/ u_char cm_dcn1; /* reserved, must be 1 */ 222 /*11*/ u_char cm_2rsrv[2]; /* reserved, must be 0 */ 223 /*13*/ u_char cm_ham; /* specifies host address mode */ 224 /*14*/ u_char cm_3rsrv; /* reserved, must be 0 */ 225 /*15*/ u_char cm_mapsiz; /* reserved, must be 0 */ 226 /*16*/ u_char cm_byteptrn[4]; /* host data format option test pattern */ 227 /*20*/ u_short cm_wordptrn[2]; 228 /*24*/ u_long cm_lwordptrn; 229 /*28*/ u_char cm_rsrvd[20]; 230 /*48*/ u_long cm_mba; /* use 0xFFFFFFFF in link level mode */ 231 /*52*/ u_char cm_nproc; /* use 0xFF in link level mode */ 232 /*53*/ u_char cm_nmbox; /* use 0xFF in link level mode */ 233 /*54*/ u_char cm_nmcast; /* use 0xFF in link level mode */ 234 /*55*/ u_char cm_nhost; /* use 1 in link level mode */ 235 236 /* the next five parameters define the request message queue */ 237 /*56*/ u_long cm_h2xba; /* base address of message queue */ 238 /*60*/ u_short cm_h2xhdr; /* address offset of msg Q header */ 239 /*62*/ u_char cm_h2xtyp; /* interrupt type */ 240 /*63*/ u_char cm_h2xval; /* interrupt value (not used) */ 241 /*64*/ u_short cm_h2xaddr; /* interrupt vector */ 242 /*66*/ u_short cm_h2xpad; /* pad out unused portion of vector */ 243 244 /* the next five parameters define the reply message queue */ 245 /*68*/ u_long cm_x2hba; /* base address of message queue */ 246 /*72*/ u_short cm_x2hhdr; /* address offset of msg Q header */ 247 /*74*/ u_char cm_x2htyp; /* interrupt type */ 248 /*75*/ u_char cm_x2hval; /* interrupt value (not used) */ 249 /*76*/ u_short cm_x2haddr; /* interrupt vector */ 250 /*78*/ u_short cm_x2hpad; /* pad out unused portion of vector */ 251 /*80*/ 252 }; 253 254