1 /* 2 * Copyright (c) 1988 Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * Advanced Computer Communications. 7 * 8 * Redistribution and use in source and binary forms are permitted 9 * provided that the above copyright notice and this paragraph are 10 * duplicated in all such forms and that any documentation, 11 * advertising materials, and other materials related to such 12 * distribution and use acknowledge that the software was developed 13 * by the University of California, Berkeley. The name of the 14 * University may not be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 18 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. 19 * 20 * @(#)if_hdhreg.h 7.2 (Berkeley) 08/04/88 21 */ 22 23 /* 24 * ACC IF-11/HDH interface 25 */ 26 27 struct hdhregs { /* device registers */ 28 u_short csr; /* control and status register */ 29 u_char iochn; /* logical channel */ 30 u_char ioadx; /* address extension (A16,A17) */ 31 u_short ioadl; /* buffer address (A0-A15) */ 32 u_short iocnt; /* byte count */ 33 u_char iofcn; /* UMC funciton code */ 34 u_char iosbf; /* UMC subfunction code */ 35 u_char ioini; /* comm regs valid flag */ 36 u_char staack; /* interrupt acknowledge flag */ 37 u_char ionmi; /* NMI routine active flag */ 38 u_char ioxfrg; /* UMR transfer grant flag */ 39 u_char stachn; /* interrupt channel number */ 40 u_char statyp; /* interrupt type code */ 41 u_char stacc; /* completion function code */ 42 u_char stacs; /* completion subfunction code */ 43 u_short stacnt; /* completion byte count */ 44 }; 45 46 /* defines for CSR */ 47 48 #define HDH_UER 0100000 /* UMC error condition */ 49 #define HDH_NXM 0040000 /* non-existent memory error */ 50 #define HDH_PER 0020000 /* UNIBUS parity error */ 51 #define HDH_ZRUN 0010000 /* Z80 running */ 52 #define HDH_ZGO 0004000 /* Z80 not in wait state */ 53 #define HDH_MBLK 0000200 /* memory swap state (0=main, 1=srv) */ 54 #define HDH_SRV 0000100 /* select UMC service memory */ 55 #define HDH_MAIN 0000040 /* select UMC main memory */ 56 #define HDH_DMA 0000020 /* DMA enable */ 57 #define HDH_WRT 0000010 /* DMA write enable */ 58 #define HDH_IEN 0000004 /* interrupt enable */ 59 #define HDH_RST 0000002 /* reset */ 60 #define HDH_NMI 0000001 /* cause NMI */ 61 62 #define HDH_BITS \ 63 "\10\20UER\17NXM\16PER\15ZRUN\14ZGO\10MBLK\7SRV\6MAIN\5DMA\4WRT\3IEN\2RST\1NMI" 64 65 /* start i/o function code definitions */ 66 67 #define HDHWRT 0 /* write to if-11 */ 68 #define HDHRDB 1 /* read from if-11 */ 69 #define HDHSTR 2 /* stream flag */ 70 #define HDHEOS 6 /* end of stream flag */ 71 #define HDHABT 8 /* abort flag */ 72 #define HDHUMR 16 /* UMR protocol flag */ 73 74 /* interrupt type definitions */ 75 76 #define HDHSACK 0 /* start i/o ack */ 77 #define HDHDONE 1 /* i/o completion */ 78 #define HDHXREQ 2 /* UMR protocol transfer request */ 79 80 /* i/o completion codes */ 81 82 #define HDHIOCOK 0001 /* successful completion */ 83 #define HDHIOCOKP 0002 /* successful completion, more data pending */ 84 #define HDHIOCABT 0361 /* i/o aborted */ 85 #define HDHIOCERR 0321 /* program error */ 86 #define HDHIOCOVR 0363 /* overrun error */ 87 #define HDHIOCUBE 0374 /* non-existant memory or unibus error */ 88 89 /* UMR protocol transfer grant code definitions */ 90 91 #define HDHXEVN 1 /* start with even address */ 92 #define HDHXODD 2 /* start with odd address */ 93 #define HDHNUMR 4 /* non-UMR transfer */ 94 #define HDHXABT 8 /* abort transfer */ 95 96 /* HDH supervisor request code definitions */ 97 #define HDHINIT 0x42 /* SYSINIT opcode */ 98 99 #define HDHSUP 0xf0 /* supervisor HDH status/line control prefix */ 100 #define HDHIMP 0x400 /* IMP line up modifier */ 101 #define HDHREFL 0x800 /* reflect mode modifier */ 102 #define HDHINLB 0x1000 /* internal loopback modifier */ 103 #define HDHEXLP 0x2000 /* external loopback modifier */ 104 #define HDHRQST (HDHSUP+0x0000) /* line status request */ 105 #define HDHRQUP (HDHSUP+0x0100) /* line up request */ 106 #define HDHRQDN (HDHSUP+0x0200) /* line down request */ 107 108 /* HDH supervisor reply code definitions */ 109 110 #define HDHIACK (HDHSUP+0x4200) /* line init ack */ 111 #define HDHLNUP (HDHSUP+0x0100) /* line up reply */ 112 #define HDHLNDN (HDHSUP+0x0200) /* line down reply */ 113 #define HDHLNACK (HDHSUP+0x0300) /* ack line up request (but line is down now) */ 114 #define HDHTIMO (HDHSUP+0x0400) /* line timeout */ 115 #define HDHLOOP (HDHSUP+0x0500) /* loopback message */ 116 #define HDHDTERR (HDHSUP+0x0600) /* host data error detected */ 117 #define HDHSQRCV (HDHSUP+0x0700) /* HDLC sequence error detected by IMP */ 118 #define HDHSQERR (HDHSUP+0x0800) /* HDLC sequence error detected by if-11 */ 119