1 /* 2 * Copyright (c) 1988 Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * Digital Equipment Corp. 7 * 8 * Redistribution and use in source and binary forms are permitted 9 * provided that the above copyright notice and this paragraph are 10 * duplicated in all such forms and that any documentation, 11 * advertising materials, and other materials related to such 12 * distribution and use acknowledge that the software was developed 13 * by the University of California, Berkeley. The name of the 14 * University may not be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 18 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. 19 * 20 * @(#)if_qe.c 7.11 (Berkeley) 02/17/89 21 */ 22 23 /* from @(#)if_qe.c 1.15 (ULTRIX) 4/16/86 */ 24 25 /**************************************************************** 26 * * 27 * Licensed from Digital Equipment Corporation * 28 * Copyright (c) * 29 * Digital Equipment Corporation * 30 * Maynard, Massachusetts * 31 * 1985, 1986 * 32 * All rights reserved. * 33 * * 34 * The Information in this software is subject to change * 35 * without notice and should not be construed as a commitment * 36 * by Digital Equipment Corporation. Digital makes no * 37 * representations about the suitability of this software for * 38 * any purpose. It is supplied "As Is" without expressed or * 39 * implied warranty. * 40 * * 41 * If the Regents of the University of California or its * 42 * licensees modify the software in a manner creating * 43 * derivative copyright rights, appropriate copyright * 44 * legends may be placed on the derivative work in addition * 45 * to that set forth above. * 46 * * 47 ****************************************************************/ 48 /* --------------------------------------------------------------------- 49 * Modification History 50 * 51 * 15-Apr-86 -- afd 52 * Rename "unused_multi" to "qunused_multi" for extending Generic 53 * kernel to MicroVAXen. 54 * 55 * 18-mar-86 -- jaw br/cvec changed to NOT use registers. 56 * 57 * 12 March 86 -- Jeff Chase 58 * Modified to handle the new MCLGET macro 59 * Changed if_qe_data.c to use more receive buffers 60 * Added a flag to poke with adb to log qe_restarts on console 61 * 62 * 19 Oct 85 -- rjl 63 * Changed the watch dog timer from 30 seconds to 3. VMS is using 64 * less than 1 second in their's. Also turned the printf into an 65 * mprintf. 66 * 67 * 09/16/85 -- Larry Cohen 68 * Add 43bsd alpha tape changes for subnet routing 69 * 70 * 1 Aug 85 -- rjl 71 * Panic on a non-existent memory interrupt and the case where a packet 72 * was chained. The first should never happen because non-existant 73 * memory interrupts cause a bus reset. The second should never happen 74 * because we hang 2k input buffers on the device. 75 * 76 * 1 Aug 85 -- rich 77 * Fixed the broadcast loopback code to handle Clusters without 78 * wedging the system. 79 * 80 * 27 Feb. 85 -- ejf 81 * Return default hardware address on ioctl request. 82 * 83 * 12 Feb. 85 -- ejf 84 * Added internal extended loopback capability. 85 * 86 * 27 Dec. 84 -- rjl 87 * Fixed bug that caused every other transmit descriptor to be used 88 * instead of every descriptor. 89 * 90 * 21 Dec. 84 -- rjl 91 * Added watchdog timer to mask hardware bug that causes device lockup. 92 * 93 * 18 Dec. 84 -- rjl 94 * Reworked driver to use q-bus mapping routines. MicroVAX-I now does 95 * copying instead of m-buf shuffleing. 96 * A number of deficencies in the hardware/firmware were compensated 97 * for. See comments in qestart and qerint. 98 * 99 * 14 Nov. 84 -- jf 100 * Added usage counts for multicast addresses. 101 * Updated general protocol support to allow access to the Ethernet 102 * header. 103 * 104 * 04 Oct. 84 -- jf 105 * Added support for new ioctls to add and delete multicast addresses 106 * and set the physical address. 107 * Add support for general protocols. 108 * 109 * 14 Aug. 84 -- rjl 110 * Integrated Shannon changes. (allow arp above 1024 and ? ) 111 * 112 * 13 Feb. 84 -- rjl 113 * 114 * Initial version of driver. derived from IL driver. 115 * 116 * --------------------------------------------------------------------- 117 */ 118 119 #include "qe.h" 120 #if NQE > 0 121 /* 122 * Digital Q-BUS to NI Adapter 123 */ 124 #include "param.h" 125 #include "systm.h" 126 #include "mbuf.h" 127 #include "buf.h" 128 #include "protosw.h" 129 #include "socket.h" 130 #include "vmmac.h" 131 #include "ioctl.h" 132 #include "errno.h" 133 #include "syslog.h" 134 #include "time.h" 135 #include "kernel.h" 136 137 #include "../net/if.h" 138 #include "../net/netisr.h" 139 #include "../net/route.h" 140 141 #ifdef INET 142 #include "../netinet/in.h" 143 #include "../netinet/in_systm.h" 144 #include "../netinet/in_var.h" 145 #include "../netinet/ip.h" 146 #include "../netinet/if_ether.h" 147 #endif 148 149 #ifdef NS 150 #include "../netns/ns.h" 151 #include "../netns/ns_if.h" 152 #endif 153 154 #include "../vax/pte.h" 155 #include "../vax/cpu.h" 156 #include "../vax/mtpr.h" 157 #include "if_qereg.h" 158 #include "if_uba.h" 159 #include "../vaxuba/ubareg.h" 160 #include "../vaxuba/ubavar.h" 161 162 #if NQE == 1 && !defined(QNIVERT) 163 #define NRCV 15 /* Receive descriptors */ 164 #else 165 #define NRCV 10 /* Receive descriptors */ 166 #endif 167 #define NXMT 5 /* Transmit descriptors */ 168 #define NTOT (NXMT + NRCV) 169 170 #define QETIMEOUT 2 /* transmit timeout, must be > 1 */ 171 172 /* 173 * This constant should really be 60 because the qna adds 4 bytes of crc. 174 * However when set to 60 our packets are ignored by deuna's , 3coms are 175 * okay ?????????????????????????????????????????? 176 */ 177 #define MINDATA 64 178 179 /* 180 * Ethernet software status per interface. 181 * 182 * Each interface is referenced by a network interface structure, 183 * qe_if, which the routing code uses to locate the interface. 184 * This structure contains the output queue for the interface, its address, ... 185 */ 186 struct qe_softc { 187 struct arpcom qe_ac; /* Ethernet common part */ 188 #define qe_if qe_ac.ac_if /* network-visible interface */ 189 #define qe_addr qe_ac.ac_enaddr /* hardware Ethernet address */ 190 struct ifubinfo qe_uba; /* Q-bus resources */ 191 struct ifrw qe_ifr[NRCV]; /* for receive buffers; */ 192 struct ifxmt qe_ifw[NXMT]; /* for xmit buffers; */ 193 int qe_flags; /* software state */ 194 #define QEF_RUNNING 0x01 195 #define QEF_SETADDR 0x02 196 int setupaddr; /* mapping info for setup pkts */ 197 int ipl; /* interrupt priority */ 198 struct qe_ring *rringaddr; /* mapping info for rings */ 199 struct qe_ring *tringaddr; /* "" */ 200 struct qe_ring rring[NRCV+1]; /* Receive ring descriptors */ 201 struct qe_ring tring[NXMT+1]; /* Transmit ring descriptors */ 202 u_char setup_pkt[16][8]; /* Setup packet */ 203 int rindex; /* Receive index */ 204 int tindex; /* Transmit index */ 205 int otindex; /* Old transmit index */ 206 int qe_intvec; /* Interrupt vector */ 207 struct qedevice *addr; /* device addr */ 208 int setupqueued; /* setup packet queued */ 209 int nxmit; /* Transmits in progress */ 210 int qe_restarts; /* timeouts */ 211 } qe_softc[NQE]; 212 213 struct uba_device *qeinfo[NQE]; 214 215 extern struct timeval time; 216 217 int qeprobe(), qeattach(), qeintr(), qetimeout(); 218 int qeinit(), qeoutput(), qeioctl(), qereset(); 219 220 u_short qestd[] = { 0 }; 221 struct uba_driver qedriver = 222 { qeprobe, 0, qeattach, 0, qestd, "qe", qeinfo }; 223 224 #define QEUNIT(x) minor(x) 225 /* 226 * The deqna shouldn't receive more than ETHERMTU + sizeof(struct ether_header) 227 * but will actually take in up to 2048 bytes. To guard against the receiver 228 * chaining buffers (which we aren't prepared to handle) we allocate 2kb 229 * size buffers. 230 */ 231 #define MAXPACKETSIZE 2048 /* Should really be ETHERMTU */ 232 /* 233 * Probe the QNA to see if it's there 234 */ 235 qeprobe(reg, ui) 236 caddr_t reg; 237 struct uba_device *ui; 238 { 239 register int br, cvec; /* r11, r10 value-result */ 240 register struct qedevice *addr = (struct qedevice *)reg; 241 register struct qe_ring *rp; 242 register struct qe_ring *prp; /* physical rp */ 243 register int i; 244 register struct qe_softc *sc = &qe_softc[ui->ui_unit]; 245 246 #ifdef lint 247 br = 0; cvec = br; br = cvec; 248 qeintr(0); 249 #endif 250 251 /* 252 * The QNA interrupts on i/o operations. To do an I/O operation 253 * we have to setup the interface by transmitting a setup packet. 254 */ 255 addr->qe_csr = QE_RESET; 256 addr->qe_csr &= ~QE_RESET; 257 addr->qe_vector = (uba_hd[numuba].uh_lastiv -= 4); 258 259 /* 260 * Map the communications area and the setup packet. 261 */ 262 sc->setupaddr = 263 uballoc(0, (caddr_t)sc->setup_pkt, sizeof(sc->setup_pkt), 0); 264 sc->rringaddr = (struct qe_ring *) uballoc(0, (caddr_t)sc->rring, 265 sizeof(struct qe_ring) * (NTOT+2), 0); 266 prp = (struct qe_ring *)UBAI_ADDR((int)sc->rringaddr); 267 268 /* 269 * The QNA will loop the setup packet back to the receive ring 270 * for verification, therefore we initialize the first 271 * receive & transmit ring descriptors and link the setup packet 272 * to them. 273 */ 274 qeinitdesc(sc->tring, (caddr_t)UBAI_ADDR(sc->setupaddr), 275 sizeof(sc->setup_pkt)); 276 qeinitdesc(sc->rring, (caddr_t)UBAI_ADDR(sc->setupaddr), 277 sizeof(sc->setup_pkt)); 278 279 rp = (struct qe_ring *)sc->tring; 280 rp->qe_setup = 1; 281 rp->qe_eomsg = 1; 282 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 283 rp->qe_valid = 1; 284 285 rp = (struct qe_ring *)sc->rring; 286 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 287 rp->qe_valid = 1; 288 289 /* 290 * Get the addr off of the interface and place it into the setup 291 * packet. This code looks strange due to the fact that the address 292 * is placed in the setup packet in col. major order. 293 */ 294 for( i = 0 ; i < 6 ; i++ ) 295 sc->setup_pkt[i][1] = addr->qe_sta_addr[i]; 296 297 qesetup( sc ); 298 /* 299 * Start the interface and wait for the packet. 300 */ 301 (void) spl6(); 302 addr->qe_csr = QE_INT_ENABLE | QE_XMIT_INT | QE_RCV_INT; 303 addr->qe_rcvlist_lo = (short)prp; 304 addr->qe_rcvlist_hi = (short)((int)prp >> 16); 305 prp += NRCV+1; 306 addr->qe_xmtlist_lo = (short)prp; 307 addr->qe_xmtlist_hi = (short)((int)prp >> 16); 308 DELAY(10000); 309 /* 310 * All done with the bus resources. 311 */ 312 ubarelse(0, &sc->setupaddr); 313 ubarelse(0, (int *)&sc->rringaddr); 314 sc->ipl = br = qbgetpri(); 315 return( sizeof(struct qedevice) ); 316 } 317 318 /* 319 * Interface exists: make available by filling in network interface 320 * record. System will initialize the interface when it is ready 321 * to accept packets. 322 */ 323 qeattach(ui) 324 struct uba_device *ui; 325 { 326 register struct qe_softc *sc = &qe_softc[ui->ui_unit]; 327 register struct ifnet *ifp = &sc->qe_if; 328 register struct qedevice *addr = (struct qedevice *)ui->ui_addr; 329 register int i; 330 331 ifp->if_unit = ui->ui_unit; 332 ifp->if_name = "qe"; 333 ifp->if_mtu = ETHERMTU; 334 ifp->if_flags = IFF_BROADCAST; 335 336 /* 337 * Read the address from the prom and save it. 338 */ 339 for( i=0 ; i<6 ; i++ ) 340 sc->setup_pkt[i][1] = sc->qe_addr[i] = addr->qe_sta_addr[i] & 0xff; 341 addr->qe_vector |= 1; 342 printf("qe%d: %s, hardware address %s\n", ui->ui_unit, 343 addr->qe_vector&01 ? "delqa":"deqna", 344 ether_sprintf(sc->qe_addr)); 345 addr->qe_vector &= ~1; 346 347 /* 348 * Save the vector for initialization at reset time. 349 */ 350 sc->qe_intvec = addr->qe_vector; 351 352 ifp->if_init = qeinit; 353 ifp->if_output = qeoutput; 354 ifp->if_ioctl = qeioctl; 355 ifp->if_reset = qereset; 356 ifp->if_watchdog = qetimeout; 357 sc->qe_uba.iff_flags = UBA_CANTWAIT; 358 if_attach(ifp); 359 } 360 361 /* 362 * Reset of interface after UNIBUS reset. 363 * If interface is on specified uba, reset its state. 364 */ 365 qereset(unit, uban) 366 int unit, uban; 367 { 368 register struct uba_device *ui; 369 370 if (unit >= NQE || (ui = qeinfo[unit]) == 0 || ui->ui_alive == 0 || 371 ui->ui_ubanum != uban) 372 return; 373 printf(" qe%d", unit); 374 qe_softc[unit].qe_if.if_flags &= ~IFF_RUNNING; 375 qeinit(unit); 376 } 377 378 /* 379 * Initialization of interface. 380 */ 381 qeinit(unit) 382 int unit; 383 { 384 register struct qe_softc *sc = &qe_softc[unit]; 385 register struct uba_device *ui = qeinfo[unit]; 386 register struct qedevice *addr = (struct qedevice *)ui->ui_addr; 387 register struct ifnet *ifp = &sc->qe_if; 388 register i; 389 int s; 390 391 /* address not known */ 392 if (ifp->if_addrlist == (struct ifaddr *)0) 393 return; 394 if (sc->qe_flags & QEF_RUNNING) 395 return; 396 397 if ((ifp->if_flags & IFF_RUNNING) == 0) { 398 /* 399 * map the communications area onto the device 400 */ 401 i = uballoc(0, (caddr_t)sc->rring, 402 sizeof(struct qe_ring) * (NTOT+2), 0); 403 if (i == 0) 404 goto fail; 405 sc->rringaddr = (struct qe_ring *)UBAI_ADDR(i); 406 sc->tringaddr = sc->rringaddr + NRCV + 1; 407 i = uballoc(0, (caddr_t)sc->setup_pkt, 408 sizeof(sc->setup_pkt), 0); 409 if (i == 0) 410 goto fail; 411 sc->setupaddr = UBAI_ADDR(i); 412 /* 413 * init buffers and maps 414 */ 415 if (if_ubaminit(&sc->qe_uba, ui->ui_ubanum, 416 sizeof (struct ether_header), (int)btoc(MAXPACKETSIZE), 417 sc->qe_ifr, NRCV, sc->qe_ifw, NXMT) == 0) { 418 fail: 419 printf("qe%d: can't allocate uba resources\n", unit); 420 sc->qe_if.if_flags &= ~IFF_UP; 421 return; 422 } 423 } 424 /* 425 * Init the buffer descriptors and indexes for each of the lists and 426 * loop them back to form a ring. 427 */ 428 for (i = 0; i < NRCV; i++) { 429 qeinitdesc( &sc->rring[i], 430 (caddr_t)UBAI_ADDR(sc->qe_ifr[i].ifrw_info), MAXPACKETSIZE); 431 sc->rring[i].qe_flag = sc->rring[i].qe_status1 = QE_NOTYET; 432 sc->rring[i].qe_valid = 1; 433 } 434 qeinitdesc(&sc->rring[i], (caddr_t)NULL, 0); 435 436 sc->rring[i].qe_addr_lo = (short)sc->rringaddr; 437 sc->rring[i].qe_addr_hi = (short)((int)sc->rringaddr >> 16); 438 sc->rring[i].qe_chain = 1; 439 sc->rring[i].qe_flag = sc->rring[i].qe_status1 = QE_NOTYET; 440 sc->rring[i].qe_valid = 1; 441 442 for( i = 0 ; i <= NXMT ; i++ ) 443 qeinitdesc(&sc->tring[i], (caddr_t)NULL, 0); 444 i--; 445 446 sc->tring[i].qe_addr_lo = (short)sc->tringaddr; 447 sc->tring[i].qe_addr_hi = (short)((int)sc->tringaddr >> 16); 448 sc->tring[i].qe_chain = 1; 449 sc->tring[i].qe_flag = sc->tring[i].qe_status1 = QE_NOTYET; 450 sc->tring[i].qe_valid = 1; 451 452 sc->nxmit = sc->otindex = sc->tindex = sc->rindex = 0; 453 454 /* 455 * Take the interface out of reset, program the vector, 456 * enable interrupts, and tell the world we are up. 457 */ 458 s = splimp(); 459 addr->qe_vector = sc->qe_intvec; 460 sc->addr = addr; 461 addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | 462 QE_RCV_INT | QE_ILOOP; 463 addr->qe_rcvlist_lo = (short)sc->rringaddr; 464 addr->qe_rcvlist_hi = (short)((int)sc->rringaddr >> 16); 465 ifp->if_flags |= IFF_UP | IFF_RUNNING; 466 sc->qe_flags |= QEF_RUNNING; 467 qesetup( sc ); 468 qestart( unit ); 469 splx( s ); 470 } 471 472 /* 473 * Start output on interface. 474 * 475 */ 476 qestart(unit) 477 int unit; 478 { 479 struct uba_device *ui = qeinfo[unit]; 480 register struct qe_softc *sc = &qe_softc[unit]; 481 register struct qedevice *addr; 482 register struct qe_ring *rp; 483 register index; 484 struct mbuf *m; 485 int buf_addr, len, s; 486 487 488 s = splimp(); 489 addr = (struct qedevice *)ui->ui_addr; 490 /* 491 * The deqna doesn't look at anything but the valid bit 492 * to determine if it should transmit this packet. If you have 493 * a ring and fill it the device will loop indefinately on the 494 * packet and continue to flood the net with packets until you 495 * break the ring. For this reason we never queue more than n-1 496 * packets in the transmit ring. 497 * 498 * The microcoders should have obeyed their own defination of the 499 * flag and status words, but instead we have to compensate. 500 */ 501 for( index = sc->tindex; 502 sc->tring[index].qe_valid == 0 && sc->nxmit < (NXMT-1) ; 503 sc->tindex = index = ++index % NXMT){ 504 rp = &sc->tring[index]; 505 if( sc->setupqueued ) { 506 buf_addr = sc->setupaddr; 507 len = 128; 508 rp->qe_setup = 1; 509 sc->setupqueued = 0; 510 } else { 511 IF_DEQUEUE(&sc->qe_if.if_snd, m); 512 if( m == 0 ){ 513 splx(s); 514 return; 515 } 516 buf_addr = sc->qe_ifw[index].ifw_info; 517 len = if_ubaput(&sc->qe_uba, &sc->qe_ifw[index], m); 518 } 519 /* 520 * Does buffer end on odd byte ? 521 */ 522 if( len & 1 ) { 523 len++; 524 rp->qe_odd_end = 1; 525 } 526 if( len < MINDATA ) 527 len = MINDATA; 528 rp->qe_buf_len = -(len/2); 529 buf_addr = UBAI_ADDR(buf_addr); 530 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 531 rp->qe_addr_lo = (short)buf_addr; 532 rp->qe_addr_hi = (short)(buf_addr >> 16); 533 rp->qe_eomsg = 1; 534 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 535 rp->qe_valid = 1; 536 if (sc->nxmit++ == 0) 537 sc->qe_if.if_timer = QETIMEOUT; 538 539 /* 540 * See if the xmit list is invalid. 541 */ 542 if( addr->qe_csr & QE_XL_INVALID ) { 543 buf_addr = (int)(sc->tringaddr+index); 544 addr->qe_xmtlist_lo = (short)buf_addr; 545 addr->qe_xmtlist_hi = (short)(buf_addr >> 16); 546 } 547 } 548 splx( s ); 549 } 550 551 /* 552 * Ethernet interface interrupt processor 553 */ 554 qeintr(unit) 555 int unit; 556 { 557 register struct qe_softc *sc = &qe_softc[unit]; 558 struct qedevice *addr = (struct qedevice *)qeinfo[unit]->ui_addr; 559 int buf_addr, csr; 560 561 /* 562 splx(sc->ipl); 563 */ 564 (void) splimp(); 565 csr = addr->qe_csr; 566 addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | QE_RCV_INT | QE_ILOOP; 567 if( csr & QE_RCV_INT ) 568 qerint( unit ); 569 if( csr & QE_XMIT_INT ) 570 qetint( unit ); 571 if( csr & QE_NEX_MEM_INT ) 572 printf("qe%d: Nonexistent memory interrupt\n", unit); 573 574 if( addr->qe_csr & QE_RL_INVALID && sc->rring[sc->rindex].qe_status1 == QE_NOTYET ) { 575 buf_addr = (int)&sc->rringaddr[sc->rindex]; 576 addr->qe_rcvlist_lo = (short)buf_addr; 577 addr->qe_rcvlist_hi = (short)(buf_addr >> 16); 578 } 579 } 580 581 /* 582 * Ethernet interface transmit interrupt. 583 */ 584 585 qetint(unit) 586 int unit; 587 { 588 register struct qe_softc *sc = &qe_softc[unit]; 589 register struct qe_ring *rp; 590 register struct ifxmt *ifxp; 591 int status1, setupflag; 592 short len; 593 594 595 while( sc->otindex != sc->tindex && sc->tring[sc->otindex].qe_status1 != QE_NOTYET && sc->nxmit > 0 ) { 596 /* 597 * Save the status words from the descriptor so that it can 598 * be released. 599 */ 600 rp = &sc->tring[sc->otindex]; 601 status1 = rp->qe_status1; 602 setupflag = rp->qe_setup; 603 len = (-rp->qe_buf_len) * 2; 604 if( rp->qe_odd_end ) 605 len++; 606 /* 607 * Init the buffer descriptor 608 */ 609 bzero((caddr_t)rp, sizeof(struct qe_ring)); 610 if( --sc->nxmit == 0 ) 611 sc->qe_if.if_timer = 0; 612 if( !setupflag ) { 613 /* 614 * Do some statistics. 615 */ 616 sc->qe_if.if_opackets++; 617 sc->qe_if.if_collisions += ( status1 & QE_CCNT ) >> 4; 618 if (status1 & QE_ERROR) 619 sc->qe_if.if_oerrors++; 620 /* 621 * If this was a broadcast packet loop it 622 * back because the hardware can't hear its own 623 * transmits. 624 */ 625 ifxp = &sc->qe_ifw[sc->otindex]; 626 if (bcmp((caddr_t)((struct ether_header *)ifxp->ifw_addr)->ether_dhost, 627 (caddr_t)etherbroadcastaddr, 628 sizeof(etherbroadcastaddr)) == 0) 629 qeread(sc, &ifxp->ifrw, 630 len - sizeof(struct ether_header)); 631 if (ifxp->ifw_xtofree) { 632 m_freem(ifxp->ifw_xtofree); 633 ifxp->ifw_xtofree = 0; 634 } 635 } 636 sc->otindex = ++sc->otindex % NXMT; 637 } 638 qestart( unit ); 639 } 640 641 /* 642 * Ethernet interface receiver interrupt. 643 * If can't determine length from type, then have to drop packet. 644 * Othewise decapsulate packet based on type and pass to type specific 645 * higher-level input routine. 646 */ 647 qerint(unit) 648 int unit; 649 { 650 register struct qe_softc *sc = &qe_softc[unit]; 651 register struct qe_ring *rp; 652 int len, status1, status2; 653 int bufaddr; 654 655 /* 656 * Traverse the receive ring looking for packets to pass back. 657 * The search is complete when we find a descriptor not in use. 658 * 659 * As in the transmit case the deqna doesn't honor it's own protocols 660 * so there exists the possibility that the device can beat us around 661 * the ring. The proper way to guard against this is to insure that 662 * there is always at least one invalid descriptor. We chose instead 663 * to make the ring large enough to minimize the problem. With a ring 664 * size of 4 we haven't been able to see the problem. To be safe we 665 * doubled that to 8. 666 * 667 */ 668 for( ; sc->rring[sc->rindex].qe_status1 != QE_NOTYET ; sc->rindex = ++sc->rindex % NRCV ){ 669 rp = &sc->rring[sc->rindex]; 670 status1 = rp->qe_status1; 671 status2 = rp->qe_status2; 672 bzero((caddr_t)rp, sizeof(struct qe_ring)); 673 if( (status1 & QE_MASK) == QE_MASK ) 674 panic("qe: chained packet"); 675 len = ((status1 & QE_RBL_HI) | (status2 & QE_RBL_LO)) + 60; 676 sc->qe_if.if_ipackets++; 677 678 if (status1 & QE_ERROR) { 679 if ((status1 & QE_RUNT) == 0) 680 sc->qe_if.if_ierrors++; 681 } else { 682 /* 683 * We don't process setup packets. 684 */ 685 if( !(status1 & QE_ESETUP) ) 686 qeread(sc, &sc->qe_ifr[sc->rindex], 687 len - sizeof(struct ether_header)); 688 } 689 /* 690 * Return the buffer to the ring 691 */ 692 bufaddr = (int)UBAI_ADDR(sc->qe_ifr[sc->rindex].ifrw_info); 693 rp->qe_buf_len = -((MAXPACKETSIZE)/2); 694 rp->qe_addr_lo = (short)bufaddr; 695 rp->qe_addr_hi = (short)((int)bufaddr >> 16); 696 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 697 rp->qe_valid = 1; 698 } 699 } 700 /* 701 * Ethernet output routine. 702 * Encapsulate a packet of type family for the local net. 703 * Use trailer local net encapsulation if enough data in first 704 * packet leaves a multiple of 512 bytes of data in remainder. 705 */ 706 qeoutput(ifp, m0, dst) 707 struct ifnet *ifp; 708 struct mbuf *m0; 709 struct sockaddr *dst; 710 { 711 int type, s, error; 712 u_char edst[6]; 713 struct in_addr idst; 714 register struct qe_softc *is = &qe_softc[ifp->if_unit]; 715 register struct mbuf *m = m0; 716 register struct ether_header *eh; 717 register int off; 718 int usetrailers; 719 720 if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) != (IFF_UP|IFF_RUNNING)) { 721 error = ENETDOWN; 722 goto bad; 723 } 724 725 switch (dst->sa_family) { 726 727 #ifdef INET 728 case AF_INET: 729 idst = ((struct sockaddr_in *)dst)->sin_addr; 730 if (!arpresolve(&is->qe_ac, m, &idst, edst, &usetrailers)) 731 return (0); /* if not yet resolved */ 732 off = ntohs((u_short)mtod(m, struct ip *)->ip_len) - m->m_len; 733 if (usetrailers && off > 0 && (off & 0x1ff) == 0 && 734 m->m_off >= MMINOFF + 2 * sizeof (u_short)) { 735 type = ETHERTYPE_TRAIL + (off>>9); 736 m->m_off -= 2 * sizeof (u_short); 737 m->m_len += 2 * sizeof (u_short); 738 *mtod(m, u_short *) = htons((u_short)ETHERTYPE_IP); 739 *(mtod(m, u_short *) + 1) = htons((u_short)m->m_len); 740 goto gottrailertype; 741 } 742 type = ETHERTYPE_IP; 743 off = 0; 744 goto gottype; 745 #endif 746 #ifdef NS 747 case AF_NS: 748 type = ETHERTYPE_NS; 749 bcopy((caddr_t)&(((struct sockaddr_ns *)dst)->sns_addr.x_host), 750 (caddr_t)edst, sizeof (edst)); 751 off = 0; 752 goto gottype; 753 #endif 754 755 756 case AF_UNSPEC: 757 eh = (struct ether_header *)dst->sa_data; 758 bcopy((caddr_t)eh->ether_dhost, (caddr_t)edst, sizeof (edst)); 759 type = eh->ether_type; 760 goto gottype; 761 762 default: 763 printf("qe%d: can't handle af%d\n", ifp->if_unit, 764 dst->sa_family); 765 error = EAFNOSUPPORT; 766 goto bad; 767 } 768 769 gottrailertype: 770 /* 771 * Packet to be sent as trailer: move first packet 772 * (control information) to end of chain. 773 */ 774 while (m->m_next) 775 m = m->m_next; 776 m->m_next = m0; 777 m = m0->m_next; 778 m0->m_next = 0; 779 m0 = m; 780 781 gottype: 782 /* 783 * Add local net header. If no space in first mbuf, 784 * allocate another. 785 */ 786 if (m->m_off > MMAXOFF || 787 MMINOFF + sizeof (struct ether_header) > m->m_off) { 788 m = m_get(M_DONTWAIT, MT_HEADER); 789 if (m == 0) { 790 error = ENOBUFS; 791 goto bad; 792 } 793 m->m_next = m0; 794 m->m_off = MMINOFF; 795 m->m_len = sizeof (struct ether_header); 796 } else { 797 m->m_off -= sizeof (struct ether_header); 798 m->m_len += sizeof (struct ether_header); 799 } 800 eh = mtod(m, struct ether_header *); 801 eh->ether_type = htons((u_short)type); 802 bcopy((caddr_t)edst, (caddr_t)eh->ether_dhost, sizeof (edst)); 803 bcopy((caddr_t)is->qe_addr, (caddr_t)eh->ether_shost, sizeof (is->qe_addr)); 804 805 /* 806 * Queue message on interface, and start output if interface 807 * not yet active. 808 */ 809 s = splimp(); 810 if (IF_QFULL(&ifp->if_snd)) { 811 IF_DROP(&ifp->if_snd); 812 splx(s); 813 m_freem(m); 814 return (ENOBUFS); 815 } 816 IF_ENQUEUE(&ifp->if_snd, m); 817 qestart(ifp->if_unit); 818 splx(s); 819 return (0); 820 821 bad: 822 m_freem(m0); 823 return (error); 824 } 825 826 827 /* 828 * Process an ioctl request. 829 */ 830 qeioctl(ifp, cmd, data) 831 register struct ifnet *ifp; 832 int cmd; 833 caddr_t data; 834 { 835 struct qe_softc *sc = &qe_softc[ifp->if_unit]; 836 struct ifaddr *ifa = (struct ifaddr *)data; 837 int s = splimp(), error = 0; 838 839 switch (cmd) { 840 841 case SIOCSIFADDR: 842 ifp->if_flags |= IFF_UP; 843 qeinit(ifp->if_unit); 844 switch(ifa->ifa_addr.sa_family) { 845 #ifdef INET 846 case AF_INET: 847 ((struct arpcom *)ifp)->ac_ipaddr = 848 IA_SIN(ifa)->sin_addr; 849 arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr); 850 break; 851 #endif 852 #ifdef NS 853 case AF_NS: 854 { 855 register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); 856 857 if (ns_nullhost(*ina)) 858 ina->x_host = *(union ns_host *)(sc->qe_addr); 859 else 860 qe_setaddr(ina->x_host.c_host, ifp->if_unit); 861 break; 862 } 863 #endif 864 } 865 break; 866 867 case SIOCSIFFLAGS: 868 if ((ifp->if_flags & IFF_UP) == 0 && 869 sc->qe_flags & QEF_RUNNING) { 870 ((struct qedevice *) 871 (qeinfo[ifp->if_unit]->ui_addr))->qe_csr = QE_RESET; 872 sc->qe_flags &= ~QEF_RUNNING; 873 } else if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) == 874 IFF_RUNNING && (sc->qe_flags & QEF_RUNNING) == 0) 875 qerestart(sc); 876 break; 877 878 default: 879 error = EINVAL; 880 881 } 882 splx(s); 883 return (error); 884 } 885 886 /* 887 * set ethernet address for unit 888 */ 889 qe_setaddr(physaddr, unit) 890 u_char *physaddr; 891 int unit; 892 { 893 register struct qe_softc *sc = &qe_softc[unit]; 894 register int i; 895 896 for (i = 0; i < 6; i++) 897 sc->setup_pkt[i][1] = sc->qe_addr[i] = physaddr[i]; 898 sc->qe_flags |= QEF_SETADDR; 899 if (sc->qe_if.if_flags & IFF_RUNNING) 900 qesetup(sc); 901 qeinit(unit); 902 } 903 904 905 /* 906 * Initialize a ring descriptor with mbuf allocation side effects 907 */ 908 qeinitdesc(rp, addr, len) 909 register struct qe_ring *rp; 910 caddr_t addr; /* mapped address */ 911 int len; 912 { 913 /* 914 * clear the entire descriptor 915 */ 916 bzero((caddr_t)rp, sizeof(struct qe_ring)); 917 918 if( len ) { 919 rp->qe_buf_len = -(len/2); 920 rp->qe_addr_lo = (short)addr; 921 rp->qe_addr_hi = (short)((int)addr >> 16); 922 } 923 } 924 /* 925 * Build a setup packet - the physical address will already be present 926 * in first column. 927 */ 928 qesetup( sc ) 929 struct qe_softc *sc; 930 { 931 register i, j; 932 933 /* 934 * Copy the target address to the rest of the entries in this row. 935 */ 936 for ( j = 0; j < 6 ; j++ ) 937 for ( i = 2 ; i < 8 ; i++ ) 938 sc->setup_pkt[j][i] = sc->setup_pkt[j][1]; 939 /* 940 * Duplicate the first half. 941 */ 942 bcopy((caddr_t)sc->setup_pkt[0], (caddr_t)sc->setup_pkt[8], 64); 943 /* 944 * Fill in the broadcast address. 945 */ 946 for ( i = 0; i < 6 ; i++ ) 947 sc->setup_pkt[i][2] = 0xff; 948 sc->setupqueued++; 949 } 950 951 /* 952 * Pass a packet to the higher levels. 953 * We deal with the trailer protocol here. 954 */ 955 qeread(sc, ifrw, len) 956 register struct qe_softc *sc; 957 struct ifrw *ifrw; 958 int len; 959 { 960 struct ether_header *eh; 961 struct mbuf *m; 962 int off, resid, s; 963 struct ifqueue *inq; 964 965 /* 966 * Deal with trailer protocol: if type is INET trailer 967 * get true type from first 16-bit word past data. 968 * Remember that type was trailer by setting off. 969 */ 970 971 eh = (struct ether_header *)ifrw->ifrw_addr; 972 eh->ether_type = ntohs((u_short)eh->ether_type); 973 #define qedataaddr(eh, off, type) ((type)(((caddr_t)((eh)+1)+(off)))) 974 if (eh->ether_type >= ETHERTYPE_TRAIL && 975 eh->ether_type < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { 976 off = (eh->ether_type - ETHERTYPE_TRAIL) * 512; 977 if (off >= ETHERMTU) 978 return; /* sanity */ 979 eh->ether_type = ntohs(*qedataaddr(eh,off, u_short *)); 980 resid = ntohs(*(qedataaddr(eh, off+2, u_short *))); 981 if (off + resid > len) 982 return; /* sanity */ 983 len = off + resid; 984 } else 985 off = 0; 986 if (len == 0) 987 return; 988 989 /* 990 * Pull packet off interface. Off is nonzero if packet 991 * has trailing header; qeget will then force this header 992 * information to be at the front, but we still have to drop 993 * the type and length which are at the front of any trailer data. 994 */ 995 m = if_ubaget(&sc->qe_uba, ifrw, len, off, &sc->qe_if); 996 997 if (m == 0) 998 return; 999 1000 if (off) { 1001 struct ifnet *ifp; 1002 1003 ifp = *(mtod(m, struct ifnet **)); 1004 m->m_off += 2 * sizeof (u_short); 1005 m->m_len -= 2 * sizeof (u_short); 1006 *(mtod(m, struct ifnet **)) = ifp; 1007 } 1008 switch (eh->ether_type) { 1009 1010 #ifdef INET 1011 case ETHERTYPE_IP: 1012 schednetisr(NETISR_IP); 1013 inq = &ipintrq; 1014 break; 1015 1016 case ETHERTYPE_ARP: 1017 arpinput(&sc->qe_ac, m); 1018 return; 1019 #endif 1020 #ifdef NS 1021 case ETHERTYPE_NS: 1022 schednetisr(NETISR_NS); 1023 inq = &nsintrq; 1024 break; 1025 1026 #endif 1027 1028 default: 1029 m_freem(m); 1030 return; 1031 } 1032 1033 s = splimp(); 1034 if (IF_QFULL(inq)) { 1035 IF_DROP(inq); 1036 m_freem(m); 1037 } else 1038 IF_ENQUEUE(inq, m); 1039 splx(s); 1040 } 1041 1042 /* 1043 * Watchdog timeout routine. There is a condition in the hardware that 1044 * causes the board to lock up under heavy load. This routine detects 1045 * the hang up and restarts the device. 1046 */ 1047 qetimeout(unit) 1048 int unit; 1049 { 1050 register struct qe_softc *sc; 1051 1052 sc = &qe_softc[unit]; 1053 log(LOG_ERR, "qe%d: transmit timeout, restarted %d\n", 1054 unit, sc->qe_restarts++); 1055 qerestart(sc); 1056 } 1057 /* 1058 * Restart for board lockup problem. 1059 */ 1060 qerestart(sc) 1061 register struct qe_softc *sc; 1062 { 1063 register struct ifnet *ifp = &sc->qe_if; 1064 register struct qedevice *addr = sc->addr; 1065 register struct qe_ring *rp; 1066 register i; 1067 1068 addr->qe_csr = QE_RESET; 1069 addr->qe_csr &= ~QE_RESET; 1070 qesetup( sc ); 1071 for (i = 0, rp = sc->tring; i < NXMT; rp++, i++) { 1072 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 1073 rp->qe_valid = 0; 1074 } 1075 sc->nxmit = sc->otindex = sc->tindex = sc->rindex = 0; 1076 addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | 1077 QE_RCV_INT | QE_ILOOP; 1078 addr->qe_rcvlist_lo = (short)sc->rringaddr; 1079 addr->qe_rcvlist_hi = (short)((int)sc->rringaddr >> 16); 1080 sc->qe_flags |= QEF_RUNNING; 1081 qestart(ifp->if_unit); 1082 } 1083 #endif 1084