1 /* 2 * Copyright (c) 1982, 1986, 1988 Regents of the University of California. 3 * All rights reserved. The Berkeley software License Agreement 4 * specifies the terms and conditions for redistribution. 5 * 6 * @(#)cpu.h 7.5 (Berkeley) 07/09/88 7 */ 8 9 #ifndef LOCORE 10 /* 11 * Cpu identification, from SID register. 12 */ 13 union cpusid { 14 int cpusid; 15 struct cpuany { 16 u_int :24, 17 cp_type:8; 18 } cpuany; 19 struct cpu8600 { 20 u_int cp_sno:12, /* serial number */ 21 cp_plant:4, /* plant number */ 22 cp_eco:8, /* eco level */ 23 cp_type:8; /* VAX_8600 */ 24 } cpu8600; 25 struct cpu8200 { 26 u_int cp_urev:8, /* ucode rev */ 27 cp_secp:1, /* secondary patch? */ 28 cp_patch:10, /* patch number */ 29 cp_hrev:4, /* hardware rev */ 30 cp_5:1, /* true iff KA825 */ 31 cp_type:8; /* VAX_8200 */ 32 } cpu8200; 33 struct cpu780 { 34 u_int cp_sno:12, /* serial number */ 35 cp_plant:3, /* plant number */ 36 cp_eco:8, /* eco level */ 37 cp_5:1, /* true iff 785 */ 38 cp_type:8; /* VAX_780 */ 39 } cpu780; 40 struct cpu750 { 41 u_int cp_hrev:8, /* hardware rev level */ 42 cp_urev:8, /* ucode rev level */ 43 :8, 44 cp_type:8; /* VAX_750 */ 45 } cpu750; 46 struct cpu730 { 47 u_int :8, /* reserved */ 48 cp_urev:8, /* ucode rev level */ 49 :8, /* reserved */ 50 cp_type:8; /* VAX_730 */ 51 } cpu730; 52 struct cpu630 { 53 u_int cp_hrev:8, /* hardware rev level */ 54 cp_urev:8, /* ucode rev level */ 55 :8, 56 cp_type:8; /* VAX_630 */ 57 } cpu630; 58 }; 59 #endif 60 /* 61 * Vax CPU types. 62 * Similar types are grouped with their earliest example. 63 */ 64 #define VAX_780 1 65 #define VAX_750 2 66 #define VAX_730 3 67 #define VAX_8600 4 68 #define VAX_8200 5 69 #define VAX_8800 6 70 #define VAX_8500 6 /* same as 8800, 8700 */ 71 #define VAX_610 7 /* uVAX I */ 72 #define VAX_630 8 /* uVAX II */ 73 74 #define VAX_MAX 8 75 76 /* 77 * Main IO backplane types. 78 * This gives us a handle on how to do autoconfiguration. 79 */ 80 #define IO_SBI780 1 81 #define IO_CMI750 2 82 #define IO_XXX730 3 83 #define IO_ABUS 4 84 #define IO_QBUS 5 85 #define IO_BI 6 86 #define IO_NMI 7 87 88 #ifndef LOCORE 89 /* 90 * CPU-dependent operations. 91 */ 92 struct clockops { 93 int (*clkstartrt)(); /* start real time clock */ 94 int (*clkread)(); /* set system time from clock */ 95 int (*clkwrite)(); /* reset clock from system time */ 96 }; 97 98 struct cpuops { 99 struct clockops *cpu_clock; /* clock operations */ 100 int (*cpu_memenable)(); /* memory error (CRD intr) enable */ 101 int (*cpu_memerr)(); /* memory error handler */ 102 int (*cpu_mchk)(); /* machine check handler */ 103 int (*cpu_init)(); /* special initialisation, if any */ 104 }; 105 106 /* return values from cpu_mchk */ 107 #define MCHK_PANIC -1 108 #define MCHK_RECOVERED 0 109 110 /* 111 * Per-cpu information for system. 112 */ 113 struct percpu { 114 short pc_cputype; /* cpu type code */ 115 short pc_cpuspeed; /* relative speed of cpu */ 116 short pc_nioa; /* number of IO adaptors/nexus blocks */ 117 struct iobus *pc_io; /* descriptions of IO adaptors */ 118 struct cpuops *pc_ops; /* per-cpu operations */ 119 }; 120 121 /* 122 * Generic description of an I/O "adaptor" 123 * (any top-level I/O bus visible to software 124 * and requiring autoconfiguration). 125 * The remainder of the description 126 * is pointed to by io_details. 127 */ 128 struct iobus { 129 int io_type; /* io adaptor types */ 130 caddr_t io_addr; /* phys address of IO adaptor */ 131 int io_size; /* size of an IO space */ 132 caddr_t io_details; /* specific to adaptor types */ 133 }; 134 135 /* 136 * Description of a main bus that maps "nexi", ala the 780 SBI. 137 */ 138 struct nexusconnect { 139 short psb_nnexus; /* number of nexus slots */ 140 struct nexus *psb_nexbase; /* base of nexus space */ 141 short psb_ubatype; /* type of "unibus adaptor" */ 142 short psb_nubabdp; /* number of bdp's per uba */ 143 caddr_t *psb_umaddr; /* unibus memory addresses */ 144 /* the 750 has some slots which don't promise to tell you their types */ 145 /* if this pointer is non-zero, then you get the type from this array */ 146 /* rather than from the (much more sensible) low byte of the config register */ 147 short *psb_nextype; /* botch */ 148 }; 149 150 /* 151 * Description of a BI bus configuration. 152 */ 153 struct bibus { 154 struct bi_node *pbi_base; /* base of node space */ 155 /* that cannot possibly be all! */ 156 }; 157 158 /* 159 * Description of a Q-bus configuration. 160 */ 161 struct qbus { 162 int qb_type; /* type of "unibus adaptor" */ 163 int qb_memsize; /* size of (used) memory, pages */ 164 struct pte *qb_map; /* base of map registers */ 165 caddr_t qb_maddr; /* "unibus" memory address */ 166 caddr_t qb_iopage; /* "unibus" IO page address */ 167 }; 168 169 #ifdef KERNEL 170 int cpu; 171 #if VAX8800 || VAX8200 172 int mastercpu; /* if multiple cpus, this identifies master */ 173 #endif 174 struct percpu percpu[]; 175 struct cpuops *cpuops; 176 #endif 177 178 /* 179 * Enable realtime clock (always enabled). 180 */ 181 #define enablertclock() 182 #endif /* LOCORE */ 183