1 /* hpreg.h 4.13 83/02/18 */ 2 3 struct hpdevice 4 { 5 int hpcs1; /* control and status register 1 */ 6 int hpds; /* drive status */ 7 int hper1; /* error register 1 */ 8 int hpmr; /* maintenance */ 9 int hpas; /* attention summary */ 10 int hpda; /* desired address register */ 11 int hpdt; /* drive type */ 12 int hpla; /* look ahead */ 13 int hpsn; /* serial number */ 14 int hpof; /* offset register */ 15 int hpdc; /* desired cylinder address register */ 16 int hpcc; /* current cylinder */ 17 #define hphr hpcc /* holding register */ 18 /* on an rp drive, mr2 is called er2 and er2 is called er3 */ 19 /* we use rm terminology here */ 20 int hpmr2; /* maintenance register 2 */ 21 int hper2; /* error register 2 */ 22 int hpec1; /* burst error bit position */ 23 int hpec2; /* burst error bit pattern */ 24 }; 25 26 /* hpcs1 */ 27 #define HP_SC 0100000 /* special condition */ 28 #define HP_TRE 0040000 /* transfer error */ 29 #define HP_DVA 0004000 /* drive available */ 30 #define HP_RDY 0000200 /* controller ready */ 31 #define HP_IE 0000100 /* interrupt enable */ 32 /* bits 5-1 are the command */ 33 #define HP_GO 0000001 34 35 /* commands */ 36 #define HP_NOP 000 /* no operation */ 37 #define HP_UNLOAD 002 /* offline drive */ 38 #define HP_SEEK 004 /* seek */ 39 #define HP_RECAL 006 /* recalibrate */ 40 #define HP_DCLR 010 /* drive clear */ 41 #define HP_RELEASE 012 /* release */ 42 #define HP_OFFSET 014 /* offset */ 43 #define HP_RTC 016 /* return to centerline */ 44 #define HP_PRESET 020 /* read-in preset */ 45 #define HP_PACK 022 /* pack acknowledge */ 46 #define HP_SEARCH 030 /* search */ 47 #define HP_DIAGNOSE 034 /* diagnose drive */ 48 #define HP_WCDATA 050 /* write check data */ 49 #define HP_WCHDR 052 /* write check header and data */ 50 #define HP_WCOM 060 /* write data */ 51 #define HP_WHDR 062 /* write header */ 52 #define HP_WTRACKD 064 /* write track descriptor */ 53 #define HP_RCOM 070 /* read data */ 54 #define HP_RHDR 072 /* read header and data */ 55 #define HP_RTRACKD 074 /* read track descriptor */ 56 57 /* hpds */ 58 #define HPDS_ATA 0100000 /* attention active */ 59 #define HPDS_ERR 0040000 /* composite drive error */ 60 #define HPDS_PIP 0020000 /* positioning in progress */ 61 #define HPDS_MOL 0010000 /* medium on line */ 62 #define HPDS_WRL 0004000 /* write locked */ 63 #define HPDS_LST 0002000 /* last sector transferred */ 64 #define HPDS_PGM 0001000 /* programmable */ 65 #define HPDS_DPR 0000400 /* drive present */ 66 #define HPDS_DRY 0000200 /* drive ready */ 67 #define HPDS_VV 0000100 /* volume valid */ 68 /* bits 1-5 are spare */ 69 #define HPDS_OM 0000001 /* offset mode */ 70 71 #define HPDS_DREADY (HPDS_DPR|HPDS_DRY|HPDS_MOL|HPDS_VV) 72 #define HPDS_BITS \ 73 "\10\20ATA\17ERR\16PIP\15MOL\14WRL\13LST\12PGM\11DPR\10DRY\7VV\1OM" 74 75 /* hper1 */ 76 #define HPER1_DCK 0100000 /* data check */ 77 #define HPER1_UNS 0040000 /* drive unsafe */ 78 #define HPER1_OPI 0020000 /* operation incomplete */ 79 #define HPER1_DTE 0010000 /* drive timing error */ 80 #define HPER1_WLE 0004000 /* write lock error */ 81 #define HPER1_IAE 0002000 /* invalid address error */ 82 #define HPER1_AOE 0001000 /* address overflow error */ 83 #define HPER1_HCRC 0000400 /* header crc error */ 84 #define HPER1_HCE 0000200 /* header compare error */ 85 #define HPER1_ECH 0000100 /* ecc hard error */ 86 #define HPER1_WCF 0000040 /* write clock fail */ 87 #define HPER1_FER 0000020 /* format error */ 88 #define HPER1_PAR 0000010 /* parity error */ 89 #define HPER1_RMR 0000004 /* register modification refused */ 90 #define HPER1_ILR 0000002 /* illegal register */ 91 #define HPER1_ILF 0000001 /* illegal function */ 92 93 #define HPER1_BITS \ 94 "\10\20DCK\17UNS\16OPI\15DTE\14WLE\13IAE\12AOE\11HCRC\10HCE\ 95 \7ECH\6WCF\5FER\4PAR\3RMR\2ILR\1ILF" 96 #define HPER1_HARD \ 97 (HPER1_WLE|HPER1_IAE|HPER1_AOE|\ 98 HPER1_FER|HPER1_RMR|HPER1_ILR|HPER1_ILF) 99 100 /* hper2 */ 101 #define HPER2_BSE 0100000 /* bad sector error */ 102 #define HPER2_SKI 0040000 /* seek incomplete */ 103 #define HPER2_OPE 0020000 /* operator plug error */ 104 #define HPER2_IVC 0010000 /* invalid command */ 105 #define HPER2_LSC 0004000 /* loss of system clock */ 106 #define HPER2_LBC 0002000 /* loss of bit check */ 107 #define HPER2_DVC 0000200 /* device check */ 108 #define HPER2_SSE 0000040 /* skip sector error (rm80) */ 109 #define HPER2_DPE 0000010 /* data parity error */ 110 111 #define HPER2_BITS \ 112 "\10\20BSE\17SKI\16OPE\15IVC\14LSC\13LBC\10DVC\6SSE\4DPE" 113 #define HPER2_HARD (HPER2_OPE) 114 115 /* hpof */ 116 #define HPOF_CMO 0100000 /* command modifier */ 117 #define HPOF_MTD 0040000 /* move track descriptor */ 118 #define HPOF_FMT22 0010000 /* 16 bit format */ 119 #define HPOF_ECI 0004000 /* ecc inhibit */ 120 #define HPOF_HCI 0002000 /* header compare inhibit */ 121 #define HPOF_SSEI 0001000 /* skip sector inhibit */ 122 123 #define HPOF_P400 020 /* +400 uinches */ 124 #define HPOF_M400 0220 /* -400 uinches */ 125 #define HPOF_P800 040 /* +800 uinches */ 126 #define HPOF_M800 0240 /* -800 uinches */ 127 #define HPOF_P1200 060 /* +1200 uinches */ 128 #define HPOF_M1200 0260 /* -1200 uinches */ 129 130 /* hphr (alias hpcc) commands */ 131 #define HPHR_MAXCYL 0x8017 /* maximum cylinder address */ 132 #define HPHR_MAXTRAK 0x8018 /* maximum track address */ 133 #define HPHR_MAXSECT 0x8019 /* maximum sector address */ 134 #define HPHR_FMTENABLE 0xffff /* enable format command in cs1 */ 135 136 /* hpmr */ 137 #define HPMR_SZ 0174000 /* ML11 system size */ 138 #define HPMR_ARRTYP 0002000 /* ML11 array type */ 139 #define HPMR_TRT 0001400 /* ML11 transfer rate */ 140 141 /* 142 * Systems Industries kludge: use value in 143 * the serial # register to figure out real drive type. 144 */ 145 #define SIMB_MB 0xff00 /* model byte value */ 146 #define SIMB_S6 0x2000 /* switch s6 */ 147 #define SIMB_LU 0x0007 /* logical unit (should = drive #) */ 148 149 #define SI9775D 0x0700 /* 9775 direct */ 150 #define SI9775M 0x0e00 /* 9775 mapped */ 151 #define SI9730D 0x0b00 /* 9730 direct */ 152 #define SI9730M 0x0d00 /* 9730 mapped */ 153 #define SI9766 0x0300 /* 9766 */ 154 #define SI9762 0x0100 /* 9762 */ 155 #define SICAPD 0x0500 /* Capricorn direct */ 156 #define SICAPN 0x0400 /* Capricorn mapped */ 157 #define SI9751D 0x0f00 /* Eagle direct */ 158 159 #define SIRM03 0x8000 /* RM03 indication */ 160 #define SIRM05 0x0000 /* RM05 pseudo-indication */ 161