1 /* 2 * Copyright (c) 1982, 1986 Regents of the University of California. 3 * All rights reserved. The Berkeley software License Agreement 4 * specifies the terms and conditions for redistribution. 5 * 6 * @(#)hpreg.h 7.1 (Berkeley) 06/05/86 7 */ 8 9 struct hpdevice 10 { 11 int hpcs1; /* control and status register 1 */ 12 int hpds; /* drive status */ 13 int hper1; /* error register 1 */ 14 int hpmr; /* maintenance */ 15 int hpas; /* attention summary */ 16 int hpda; /* desired address register */ 17 int hpdt; /* drive type */ 18 int hpla; /* look ahead */ 19 int hpsn; /* serial number */ 20 int hpof; /* offset register */ 21 int hpdc; /* desired cylinder address register */ 22 int hpcc; /* current cylinder */ 23 #define hphr hpcc /* holding register */ 24 /* on an rp drive, mr2 is called er2 and er2 is called er3 */ 25 /* we use rm terminology here */ 26 int hpmr2; /* maintenance register 2 */ 27 int hper2; /* error register 2 */ 28 int hpec1; /* burst error bit position */ 29 int hpec2; /* burst error bit pattern */ 30 }; 31 32 /* hpcs1 */ 33 #define HP_SC 0100000 /* special condition */ 34 #define HP_TRE 0040000 /* transfer error */ 35 #define HP_DVA 0004000 /* drive available */ 36 #define HP_RDY 0000200 /* controller ready */ 37 #define HP_IE 0000100 /* interrupt enable */ 38 /* bits 5-1 are the command */ 39 #define HP_GO 0000001 40 41 /* commands */ 42 #define HP_NOP 000 /* no operation */ 43 #define HP_UNLOAD 002 /* offline drive */ 44 #define HP_SEEK 004 /* seek */ 45 #define HP_RECAL 006 /* recalibrate */ 46 #define HP_DCLR 010 /* drive clear */ 47 #define HP_RELEASE 012 /* release */ 48 #define HP_OFFSET 014 /* offset */ 49 #define HP_RTC 016 /* return to centerline */ 50 #define HP_PRESET 020 /* read-in preset */ 51 #define HP_PACK 022 /* pack acknowledge */ 52 #define HP_SEARCH 030 /* search */ 53 #define HP_DIAGNOSE 034 /* diagnose drive */ 54 #define HP_WCDATA 050 /* write check data */ 55 #define HP_WCHDR 052 /* write check header and data */ 56 #define HP_WCOM 060 /* write data */ 57 #define HP_WHDR 062 /* write header */ 58 #define HP_WTRACKD 064 /* write track descriptor */ 59 #define HP_RCOM 070 /* read data */ 60 #define HP_RHDR 072 /* read header and data */ 61 #define HP_RTRACKD 074 /* read track descriptor */ 62 63 /* hpds */ 64 #define HPDS_ATA 0100000 /* attention active */ 65 #define HPDS_ERR 0040000 /* composite drive error */ 66 #define HPDS_PIP 0020000 /* positioning in progress */ 67 #define HPDS_MOL 0010000 /* medium on line */ 68 #define HPDS_WRL 0004000 /* write locked */ 69 #define HPDS_LST 0002000 /* last sector transferred */ 70 #define HPDS_PGM 0001000 /* programmable */ 71 #define HPDS_DPR 0000400 /* drive present */ 72 #define HPDS_DRY 0000200 /* drive ready */ 73 #define HPDS_VV 0000100 /* volume valid */ 74 /* bits 1-5 are spare */ 75 #define HPDS_OM 0000001 /* offset mode */ 76 77 #define HPDS_DREADY (HPDS_DPR|HPDS_DRY|HPDS_MOL|HPDS_VV) 78 #define HPDS_BITS \ 79 "\10\20ATA\17ERR\16PIP\15MOL\14WRL\13LST\12PGM\11DPR\10DRY\7VV\1OM" 80 81 /* hper1 */ 82 #define HPER1_DCK 0100000 /* data check */ 83 #define HPER1_UNS 0040000 /* drive unsafe */ 84 #define HPER1_OPI 0020000 /* operation incomplete */ 85 #define HPER1_DTE 0010000 /* drive timing error */ 86 #define HPER1_WLE 0004000 /* write lock error */ 87 #define HPER1_IAE 0002000 /* invalid address error */ 88 #define HPER1_AOE 0001000 /* address overflow error */ 89 #define HPER1_HCRC 0000400 /* header crc error */ 90 #define HPER1_HCE 0000200 /* header compare error */ 91 #define HPER1_ECH 0000100 /* ecc hard error */ 92 #define HPER1_WCF 0000040 /* write clock fail */ 93 #define HPER1_FER 0000020 /* format error */ 94 #define HPER1_PAR 0000010 /* parity error */ 95 #define HPER1_RMR 0000004 /* register modification refused */ 96 #define HPER1_ILR 0000002 /* illegal register */ 97 #define HPER1_ILF 0000001 /* illegal function */ 98 99 #define HPER1_BITS \ 100 "\10\20DCK\17UNS\16OPI\15DTE\14WLE\13IAE\12AOE\11HCRC\10HCE\ 101 \7ECH\6WCF\5FER\4PAR\3RMR\2ILR\1ILF" 102 #define HPER1_HARD \ 103 (HPER1_WLE|HPER1_IAE|HPER1_AOE|\ 104 HPER1_FER|HPER1_RMR|HPER1_ILR|HPER1_ILF) 105 106 /* hper2 */ 107 #define HPER2_BSE 0100000 /* bad sector error */ 108 #define HPER2_SKI 0040000 /* seek incomplete */ 109 #define HPER2_OPE 0020000 /* operator plug error */ 110 #define HPER2_IVC 0010000 /* invalid command */ 111 #define HPER2_LSC 0004000 /* loss of system clock */ 112 #define HPER2_LBC 0002000 /* loss of bit check */ 113 #define HPER2_DVC 0000200 /* device check */ 114 #define HPER2_SSE 0000040 /* skip sector error (rm80) */ 115 #define HPER2_DPE 0000010 /* data parity error */ 116 117 #define HPER2_BITS \ 118 "\10\20BSE\17SKI\16OPE\15IVC\14LSC\13LBC\10DVC\6SSE\4DPE" 119 #define HPER2_HARD (HPER2_OPE) 120 121 /* hpof */ 122 #define HPOF_CMO 0100000 /* command modifier */ 123 #define HPOF_MTD 0040000 /* move track descriptor */ 124 #define HPOF_FMT22 0010000 /* 16 bit format */ 125 #define HPOF_ECI 0004000 /* ecc inhibit */ 126 #define HPOF_HCI 0002000 /* header compare inhibit */ 127 #define HPOF_SSEI 0001000 /* skip sector inhibit */ 128 129 #define HPOF_P400 020 /* +400 uinches */ 130 #define HPOF_M400 0220 /* -400 uinches */ 131 #define HPOF_P800 040 /* +800 uinches */ 132 #define HPOF_M800 0240 /* -800 uinches */ 133 #define HPOF_P1200 060 /* +1200 uinches */ 134 #define HPOF_M1200 0260 /* -1200 uinches */ 135 136 /* hphr (alias hpcc) commands */ 137 #define HPHR_MAXCYL 0x8017 /* maximum cylinder address */ 138 #define HPHR_MAXTRAK 0x8018 /* maximum track address */ 139 #define HPHR_MAXSECT 0x8019 /* maximum sector address */ 140 #define HPHR_FMTENABLE 0xffff /* enable format command in cs1 */ 141 142 /* hpmr */ 143 #define HPMR_SZ 0174000 /* ML11 system size */ 144 #define HPMR_ARRTYP 0002000 /* ML11 array type */ 145 #define HPMR_TRT 0001400 /* ML11 transfer rate */ 146 147 /* 148 * Systems Industries kludge: use value in 149 * the serial # register to figure out real drive type. 150 */ 151 #define SIMB_MB 0xff00 /* model byte value */ 152 #define SIMB_S6 0x2000 /* switch s6 */ 153 #define SIMB_LU 0x0007 /* logical unit (should = drive #) */ 154 155 #define SI9775D 0x0700 /* 9775 direct */ 156 #define SI9775M 0x0e00 /* 9775 mapped */ 157 #define SI9730D 0x0b00 /* 9730 direct */ 158 #define SI9730M 0x0d00 /* 9730 mapped */ 159 #define SI9766 0x0300 /* 9766 */ 160 #define SI9762 0x0100 /* 9762 */ 161 #define SICAPD 0x0500 /* Capricorn direct */ 162 #define SICAPN 0x0400 /* Capricorn mapped */ 163 #define SI9751D 0x0f00 /* Eagle direct */ 164 165 #define SIRM03 0x8000 /* RM03 indication */ 166 #define SIRM05 0x0000 /* RM05 pseudo-indication */ 167