1 /* autoconf.c 4.6 82/11/13 */ 2 3 #include "../h/param.h" 4 #include "../h/pte.h" 5 6 #include "../vax/cpu.h" 7 #include "../vax/nexus.h" 8 #include "../vaxuba/ubareg.h" 9 #include "../vaxmba/mbareg.h" 10 #include "../vax/mtpr.h" 11 12 #include "savax.h" 13 14 #define UTR(i) ((struct uba_regs *)(NEX780+(i))) 15 #define UMA(i) ((caddr_t)UMEM780(i)) 16 #define MTR(i) ((struct mba_regs *)(NEX780+(i))) 17 18 struct uba_regs *ubaddr780[] = { UTR(3), UTR(4), UTR(5), UTR(6) }; 19 caddr_t umaddr780[] = { UMA(0), UMA(1), UMA(2), UMA(3) }; 20 struct mba_regs *mbaddr780[] = { MTR(8), MTR(9), MTR(10), MTR(11) }; 21 22 #undef UTR 23 #undef UMA 24 #undef MTR 25 26 #define UTR(i) ((struct uba_regs *)(NEX750+(i))) 27 #define UMA(i) ((caddr_t)UMEM750(i)) 28 #define MTR(i) ((struct mba_regs *)(NEX750+(i))) 29 30 struct uba_regs *ubaddr750[] = { UTR(8), UTR(9) }; 31 caddr_t umaddr750[] = { UMA(0), UMA(1) }; 32 struct mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) }; 33 34 #undef UTR 35 #undef UMA 36 #undef MTR 37 38 #define UTR(i) ((struct uba_regs *)(NEX730+(i))) 39 #define UMA ((caddr_t)UMEM730) 40 41 struct uba_regs *ubaddr730[] = { UTR(3) }; 42 caddr_t umaddr730[] = { UMA }; 43 44 #undef UTR 45 #undef UMA 46 47 configure() 48 { 49 union cpusid cpusid; 50 int nmba, nuba, i; 51 52 cpusid.cpusid = mfpr(SID); 53 cpu = cpusid.cpuany.cp_type; 54 switch (cpu) { 55 56 case VAX_780: 57 mbaddr = mbaddr780; 58 ubaddr = ubaddr780; 59 umaddr = umaddr780; 60 nmba = sizeof (mbaddr780) / sizeof (mbaddr780[0]); 61 nuba = sizeof (ubaddr780) / sizeof (ubaddr780[0]); 62 break; 63 64 case VAX_750: 65 mbaddr = mbaddr750; 66 ubaddr = ubaddr750; 67 umaddr = umaddr750; 68 nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]); 69 nuba = 0; 70 break; 71 72 case VAX_730: 73 ubaddr = ubaddr730; 74 umaddr = umaddr730; 75 nmba = nuba = 0; 76 break; 77 } 78 /* 79 * Forward into the past... 80 */ 81 /* 82 for (i = 0; i < nmba; i++) 83 if (!badloc(mbaddr[i])) 84 mbaddr[i]->mba_cr = MBCR_INIT; 85 */ 86 for (i = 0; i < nuba; i++) 87 if (!badloc(ubaddr[i])) 88 ubaddr[i]->uba_cr = UBACR_ADINIT; 89 if (cpu != VAX_780) 90 mtpr(IUR, 0); 91 /* give unibus devices a chance to recover... */ 92 if (nuba > 0) 93 DELAY(2000000); 94 } 95