xref: /original-bsd/sys/vax/stand/autoconf.c (revision 7e7b101a)
1 /*	autoconf.c	6.1	83/07/29	*/
2 
3 #include "../machine/pte.h"
4 
5 #include "../h/param.h"
6 
7 #include "../vax/cpu.h"
8 #include "../vax/nexus.h"
9 #include "../vaxuba/ubareg.h"
10 #include "../vaxmba/mbareg.h"
11 #include "../vax/mtpr.h"
12 
13 #include "savax.h"
14 
15 #define	UTR(i)	((struct uba_regs *)(NEX780+(i)))
16 #define	UMA(i)	((caddr_t)UMEM780(i))
17 #define	MTR(i)	((struct mba_regs *)(NEX780+(i)))
18 
19 struct	uba_regs *ubaddr780[] = { UTR(3), UTR(4), UTR(5), UTR(6) };
20 caddr_t	umaddr780[] = { UMA(0), UMA(1), UMA(2), UMA(3) };
21 struct	mba_regs *mbaddr780[] = { MTR(8), MTR(9), MTR(10), MTR(11) };
22 
23 #undef	UTR
24 #undef	UMA
25 #undef	MTR
26 
27 #define	UTR(i)	((struct uba_regs *)(NEX750+(i)))
28 #define	UMA(i)	((caddr_t)UMEM750(i))
29 #define	MTR(i)	((struct mba_regs *)(NEX750+(i)))
30 
31 struct	uba_regs *ubaddr750[] = { UTR(8), UTR(9) };
32 caddr_t	umaddr750[] = { UMA(0), UMA(1) };
33 struct	mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) };
34 
35 #undef	UTR
36 #undef	UMA
37 #undef	MTR
38 
39 #define	UTR(i)	((struct uba_regs *)(NEX730+(i)))
40 #define	UMA	((caddr_t)UMEM730)
41 
42 struct	uba_regs *ubaddr730[] = { UTR(3) };
43 caddr_t	umaddr730[] = { UMA };
44 
45 #undef	UTR
46 #undef	UMA
47 
48 configure()
49 {
50 	union cpusid cpusid;
51 	int nmba, nuba, i;
52 
53 	cpusid.cpusid = mfpr(SID);
54 	cpu = cpusid.cpuany.cp_type;
55 	switch (cpu) {
56 
57 	case VAX_780:
58 		mbaddr = mbaddr780;
59 		ubaddr = ubaddr780;
60 		umaddr = umaddr780;
61 		nmba = sizeof (mbaddr780) / sizeof (mbaddr780[0]);
62 		nuba = sizeof (ubaddr780) / sizeof (ubaddr780[0]);
63 		break;
64 
65 	case VAX_750:
66 		mbaddr = mbaddr750;
67 		ubaddr = ubaddr750;
68 		umaddr = umaddr750;
69 		nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]);
70 		nuba = 0;
71 		break;
72 
73 	case VAX_730:
74 		ubaddr = ubaddr730;
75 		umaddr = umaddr730;
76 		nmba = nuba = 0;
77 		break;
78 	}
79 	/*
80 	 * Forward into the past...
81 	 */
82 /*
83 	for (i = 0; i < nmba; i++)
84 		if (!badloc(mbaddr[i]))
85 			mbaddr[i]->mba_cr = MBCR_INIT;
86 */
87 	for (i = 0; i < nuba; i++)
88 		if (!badloc(ubaddr[i]))
89 			ubaddr[i]->uba_cr = UBACR_ADINIT;
90 	if (cpu != VAX_780)
91 		mtpr(IUR, 0);
92 	/* give unibus devices a chance to recover... */
93 	if (nuba > 0)
94 		DELAY(2000000);
95 }
96