1 /* autoconf.c 4.5 82/07/15 */ 2 3 #include "../h/param.h" 4 #include "../h/cpu.h" 5 #include "../h/nexus.h" 6 #include "../h/pte.h" 7 #include "../h/ubareg.h" 8 #include "../h/mbareg.h" 9 #include "../h/mtpr.h" 10 #include "savax.h" 11 12 #define UTR(i) ((struct uba_regs *)(NEX780+(i))) 13 #define UMA(i) ((caddr_t)UMEM780(i)) 14 #define MTR(i) ((struct mba_regs *)(NEX780+(i))) 15 16 struct uba_regs *ubaddr780[] = { UTR(3), UTR(4), UTR(5), UTR(6) }; 17 caddr_t umaddr780[] = { UMA(0), UMA(1), UMA(2), UMA(3) }; 18 struct mba_regs *mbaddr780[] = { MTR(8), MTR(9), MTR(10), MTR(11) }; 19 20 #undef UTR 21 #undef UMA 22 #undef MTR 23 24 #define UTR(i) ((struct uba_regs *)(NEX750+(i))) 25 #define UMA(i) ((caddr_t)UMEM750(i)) 26 #define MTR(i) ((struct mba_regs *)(NEX750+(i))) 27 28 struct uba_regs *ubaddr750[] = { UTR(8), UTR(9) }; 29 caddr_t umaddr750[] = { UMA(0), UMA(1) }; 30 struct mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) }; 31 32 #undef UTR 33 #undef UMA 34 #undef MTR 35 36 #define UTR(i) ((struct uba_regs *)(NEX730+(i))) 37 #define UMA ((caddr_t)UMEM730) 38 39 struct uba_regs *ubaddr730[] = { UTR(3) }; 40 caddr_t umaddr730[] = { UMA }; 41 42 #undef UTR 43 #undef UMA 44 45 configure() 46 { 47 union cpusid cpusid; 48 int nmba, nuba, i; 49 50 cpusid.cpusid = mfpr(SID); 51 cpu = cpusid.cpuany.cp_type; 52 switch (cpu) { 53 54 case VAX_780: 55 mbaddr = mbaddr780; 56 ubaddr = ubaddr780; 57 umaddr = umaddr780; 58 nmba = sizeof (mbaddr780) / sizeof (mbaddr780[0]); 59 nuba = sizeof (ubaddr780) / sizeof (ubaddr780[0]); 60 break; 61 62 case VAX_750: 63 mbaddr = mbaddr750; 64 ubaddr = ubaddr750; 65 umaddr = umaddr750; 66 nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]); 67 nuba = 0; 68 break; 69 70 case VAX_730: 71 ubaddr = ubaddr730; 72 umaddr = umaddr730; 73 nmba = nuba = 0; 74 break; 75 } 76 /* 77 * Forward into the past... 78 */ 79 /* 80 for (i = 0; i < nmba; i++) 81 if (!badloc(mbaddr[i])) 82 mbaddr[i]->mba_cr = MBCR_INIT; 83 */ 84 for (i = 0; i < nuba; i++) 85 if (!badloc(ubaddr[i])) 86 ubaddr[i]->uba_cr = UBACR_ADINIT; 87 if (cpu != VAX_780) 88 mtpr(IUR, 0); 89 /* give unibus devices a chance to recover... */ 90 if (nuba > 0) 91 DELAY(2000000); 92 } 93