1 /* 2 * Copyright (c) 1982, 1986 Regents of the University of California. 3 * All rights reserved. The Berkeley software License Agreement 4 * specifies the terms and conditions for redistribution. 5 * 6 * @(#)autoconf.c 7.4 (Berkeley) 02/06/88 7 */ 8 9 #include "../machine/pte.h" 10 11 #include "param.h" 12 13 #include "../vax/cpu.h" 14 #include "../vax/nexus.h" 15 #include "../vaxuba/ubareg.h" 16 #include "../vaxmba/mbareg.h" 17 #include "../vax/mtpr.h" 18 19 #include "savax.h" 20 21 #ifdef VAX8200 22 #include "../vax/bireg.h" 23 /* 24 * These are found during configuration, rather than being compiled in 25 * statically. 26 */ 27 struct uba_regs *ubaddr8200[MAXNUBA]; 28 caddr_t uioaddr8200[MAXNUBA]; 29 #endif 30 31 #if VAX8600 || VAX780 32 #define UTR(i) ((struct uba_regs *)(NEX780+(i))) 33 #define UMA(i) ((caddr_t)UMEM780(i)+UBAIOADDR) 34 #define MTR(i) ((struct mba_regs *)(NEX780+(i))) 35 #define UTRB(i) ((struct uba_regs *)(NEXB8600+(i))) 36 #define UMAB(i) ((caddr_t)UMEMB8600(i)+UBAIOADDR) 37 #define MTRB(i) ((struct mba_regs *)(NEXB8600+(i))) 38 39 struct uba_regs *ubaddr780[] = { 40 UTR(3), UTR(4), UTR(5), UTR(6), 41 #if VAX8600 42 UTRB(3), UTRB(4), UTRB(5), UTRB(6), 43 #endif 44 }; 45 caddr_t uioaddr780[] = { 46 UMA(0), UMA(1), UMA(2), UMA(3), 47 #if VAX8600 48 UMAB(0), UMAB(1), UMAB(2), UMAB(3), 49 #endif 50 }; 51 struct mba_regs *mbaddr780[] = { 52 MTR(8), MTR(9), MTR(10), MTR(11), 53 #if VAX8600 54 MTRB(8), MTRB(9), MTRB(10), MTRB(11), 55 #endif 56 }; 57 58 #undef UTR 59 #undef UMA 60 #undef MTR 61 #endif 62 63 #if VAX750 64 #define UTR(i) ((struct uba_regs *)(NEX750+(i))) 65 #define UMA(i) ((caddr_t)UMEM750(i)+UBAIOADDR) 66 #define MTR(i) ((struct mba_regs *)(NEX750+(i))) 67 68 struct uba_regs *ubaddr750[] = { UTR(8), UTR(9) }; 69 caddr_t uioaddr750[] = { UMA(0), UMA(1) }; 70 struct mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) }; 71 72 #undef UTR 73 #undef UMA 74 #undef MTR 75 #endif 76 77 #if VAX730 78 #define UTR(i) ((struct uba_regs *)(NEX730+(i))) 79 #define UMA ((caddr_t)UMEM730+UBAIOADDR) 80 81 struct uba_regs *ubaddr730[] = { UTR(3) }; 82 caddr_t uioaddr730[] = { UMA }; 83 84 #undef UTR 85 #undef UMA 86 #endif 87 88 #if VAX630 89 /* 90 * The map registers start at 20088000 on the ka630, so 91 * subtract a 2k offset to make things work. 92 * 93 * This could stand serious cleanup. 94 */ 95 struct uba_regs *ubaddr630[] = 96 { (struct uba_regs *)((caddr_t)QBAMAP630 - 0x800) }; 97 caddr_t uioaddr630[] = { (caddr_t)QIOPAGE630 }; 98 #endif 99 100 int cpuspeed = 1; 101 102 configure() 103 { 104 union cpusid cpusid; 105 register int nmba, nuba, i; 106 107 cpusid.cpusid = mfpr(SID); 108 cpu = cpusid.cpuany.cp_type; 109 switch (cpu) { 110 111 #if VAX8600 112 case VAX_8600: 113 nmba = sizeof (mbaddr780) / sizeof (mbaddr780[0]); 114 nuba = sizeof (ubaddr780) / sizeof (ubaddr780[0]); 115 mbaddr = mbaddr780; 116 ubaddr = ubaddr780; 117 uioaddr = uioaddr780; 118 cpuspeed = 6; 119 break; 120 #endif 121 122 #if VAX780 123 case VAX_780: 124 nmba = 4; 125 nuba = 4; 126 mbaddr = mbaddr780; 127 ubaddr = ubaddr780; 128 uioaddr = uioaddr780; 129 cpuspeed = 2; 130 break; 131 #endif 132 133 #if VAX8200 134 case VAX_8200: { 135 register struct bi_node *bi; 136 137 nmba = 0; 138 nuba = 0; 139 for (i = 0, bi = BI_BASE(0); i < NNODEBI; i++, bi++) { 140 if (badaddr((caddr_t)bi, sizeof (long))) 141 continue; 142 #ifdef notdef 143 /* clear bus errors */ 144 bi->biic.bi_ber = ~(BIBER_MBZ|BIBER_NMR|BIBER_UPEN); 145 #endif 146 switch (bi->biic.bi_dtype) { 147 148 case BIDT_DWBUA: 149 if (nuba >= MAXNUBA) /* sorry */ 150 break; 151 ubaddr8200[nuba] = (struct uba_regs *)bi; 152 uioaddr8200[nuba] = (caddr_t)UMEM8200(i); 153 ((struct dwbua_regs *)bi)->bua_csr |= 154 BUACSR_UPI; 155 nuba++; 156 break; 157 158 case BIDT_KDB50: 159 if (nkdb < MAXNKDB) 160 kdbaddr[nkdb++] = (caddr_t)bi; 161 break; 162 } 163 } 164 ubaddr = ubaddr8200; 165 uioaddr = uioaddr8200; 166 } 167 break; 168 #endif 169 170 #if VAX750 171 case VAX_750: 172 mbaddr = mbaddr750; 173 ubaddr = ubaddr750; 174 uioaddr = uioaddr750; 175 nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]); 176 nuba = 0; 177 break; 178 #endif 179 180 #if VAX730 181 case VAX_730: 182 ubaddr = ubaddr730; 183 uioaddr = uioaddr730; 184 nmba = 0; 185 nuba = 0; 186 break; 187 #endif 188 189 #if VAX630 190 case VAX_630: 191 ubaddr = ubaddr630; 192 uioaddr = uioaddr630; 193 nmba = 0; 194 nuba = 0; 195 break; 196 #endif 197 } 198 199 /* 200 * Forward into the past... 201 */ 202 /* 203 for (i = 0; i < nmba; i++) 204 if (!badaddr(mbaddr[i], sizeof(long))) 205 mbaddr[i]->mba_cr = MBCR_INIT; 206 */ 207 switch (cpu) { 208 209 #if VAX8600 || VAX780 210 case VAX_8600: 211 case VAX_780: 212 for (i = 0; i < nuba; i++) 213 if (!badaddr(ubaddr[i], sizeof(long))) 214 ubaddr[i]->uba_cr = UBACR_ADINIT; 215 break; 216 #endif 217 218 #if VAX750 || VAX730 219 case VAX_750: 220 case VAX_730: 221 mtpr(IUR, 0); 222 break; 223 #endif 224 225 #if VAX630 226 case VAX_630: 227 mtpr(IUR, 0); 228 *((char *)QIOPAGE630 + QIPCR) = Q_LMEAE; 229 break; 230 #endif 231 } 232 233 /* give unibus devices a chance to recover... */ 234 if (nuba > 0) 235 DELAY(2000000); 236 } 237